公开(公告)号：US09047474B1

公开(公告)日：2015-06-02

申请号：US14187143

申请日：2014-02-21

Applicant: Xilinx, Inc.

Inventor： Sagheer Ahmad ,  Bradley L. Taylor ,  Ygal Arbel

IPC: H03K19/00 ,  G06F21/60 ,  H03K19/177

CPC classification number: H03K19/17768 ,  G06F21/575 ,  G06F21/74

Abstract: A circuit for providing isolation in an integrated circuit is described. The circuit comprises a first circuit block having circuits associated with a first security level; a second circuit block having circuits associated with a second security level; and a third circuit block having programmable resources, the third circuit block providing isolation between the first circuit block and the second circuit block and being programmable to enable connections between the first circuit block and the second circuit block.

Abstract translation: 描述了用于在集成电路中提供隔离的电路。 该电路包括具有与第一安全级相关联的电路的第一电路块; 具有与第二安全级相关联的电路的第二电路块; 以及具有可编程资源的第三电路块，所述第三电路块提供所述第一电路块和所述第二电路块之间的隔离并且可编程以使得所述第一电路块和所述第二电路块之间能够连接。

公开(公告)号：US09130559B1

公开(公告)日：2015-09-08

申请号：US14495024

申请日：2014-09-24

Applicant: Xilinx, Inc.

Inventor： Sagheer Ahmad ,  Bradley L. Taylor ,  Ygal Arbel

IPC: H03K19/177 ,  H03K19/003 ,  H03K19/007 ,  G06F15/78

CPC classification number: H03K19/003 ,  G06F15/7867 ,  H03K19/007 ,  H03K19/177 ,  H03K19/17764 ,  H03K19/17768

Abstract: A programmable IC is disclosed that includes a programmable logic sub-system, a processing sub-system, and a safety sub-system. The programmable logic sub-system includes programmable logic circuits configured to form a hardware portion of a user design. The processing sub-system includes processing circuits configured to execute a software portion of a user design. The safety sub-system is configured to perform a safety functions that detect and/or mitigate errors in circuits of the programmable IC. The safety sub-system includes hard-wired circuits configured to perform hardware-based safety functions for a first subset of circuits of the programmable IC. The safety sub-system also includes a processing circuit configured to execute software-based safety functions for a second subset of circuits of the programmable IC.

Abstract translation: 公开了一种可编程IC，其包括可编程逻辑子系统，处理子系统和安全子系统。 可编程逻辑子系统包括被配置为形成用户设计的硬件部分的可编程逻辑电路。 处理子系统包括被配置为执行用户设计的软件部分的处理电路。 安全子系统被配置为执行检测和/或减轻可编程IC的电路中的错误的安全功能。 安全子系统包括被配置为对可编程IC的电路的第一子集执行基于硬件的安全功能的硬连线电路。 安全子系统还包括处理电路，其被配置为对可编程IC的电路的第二子集执行基于软件的安全功能。

公开(公告)号：US09304174B1

公开(公告)日：2016-04-05

申请号：US14463560

申请日：2014-08-19

Applicant: Xilinx, Inc.

Inventor： Bradley L. Taylor ,  Sagheer Ahmad

IPC: H03K19/177 ,  G06F1/00 ,  G01R31/40 ,  G01R17/02 ,  G01R19/00 ,  G01K17/00

CPC classification number: G01R31/40 ,  G01K3/005 ,  G01K17/00 ,  G01R17/02 ,  G01R19/0084 ,  H03K19/177 ,  H03K19/17784

Abstract: Method and apparatus for monitoring system operations in an integrated circuit. A method includes receiving a first power supply voltage from a first processing domain, comparing the first power supply voltage to a first reference voltage, receiving the second power supply voltage from the second processing domain, comparing the second power supply voltage to a second reference voltage, determining that the first power supply voltage exceeds the first reference voltage or that the second power supply voltage exceeds the second reference voltage, and transmitting one or more alarms corresponding to one or more of the first power supply voltage and the second power supply voltage in response to determining that the first power supply voltage exceeds the first reference voltage or that the second power supply voltage exceeds the second reference voltage. An integrated circuit and system monitor are also provided.

Abstract translation: 用于监控集成电路中的系统操作的方法和装置。 一种方法包括从第一处理域接收第一电源电压，将第一电源电压与第一参考电压进行比较，从第二处理域接收第二电源电压，将第二电源电压与第二参考电压 确定所述第一电源电压超过所述第一参考电压或者所述第二电源电压超过所述第二参考电压，并且将与所述第一电源电压和所述第二电源电压中的一个或多个相对应的一个或多个警报发送到 响应于确定第一电源电压超过第一参考电压或第二电源电压超过第二参考电压。 还提供集成电路和系统监视器。

公开(公告)号：US09378102B1

公开(公告)日：2016-06-28

申请号：US14452858

申请日：2014-08-06

Applicant: Xilinx, Inc.

Inventor： Sagheer Ahmad ,  Bradley L. Taylor ,  Giulio Corradi

IPC: G06F11/07 ,  G06F11/20 ,  H03K19/177 ,  H03K19/007

CPC classification number: G06F11/2007 ,  H03K19/007 ,  H03K19/17764

Abstract: A system on a chip (SoC) for providing safety hardware fault tolerance and/or safety software fault tolerance includes a first safety sub-system having a first safety channel; a second safety sub-system having a second safety channel; and a third sub-system. The first safety sub-system is independent of the second safety sub-system to allow the second safety sub-system to communicate through the second safety channel when the first safety sub-system or the third subsystem fails, and further to allow the first safety sub-system to communicate through the first safety channel when the second safety sub-system or the third subsystem fails.

Abstract translation: 用于提供安全硬件容错和/或安全软件容错的芯片系统（SoC）包括具有第一安全通道的第一安全子系统; 具有第二安全通道的第二安全子系统; 和第三个子系统。 第一安全子系统独立于第二安全子系统，以允许第二安全子系统在第一安全子系统或第三子系统失效时通过第二安全通道进行通信，并且还允许第一安全子系统 子系统在第二安全子系统或第三子系统出现故障时通过第一安全通道进行通信。

公开(公告)号：US09495239B1

公开(公告)日：2016-11-15

申请号：US14466845

申请日：2014-08-22

Applicant: Xilinx, Inc.

Inventor： Sagheer Ahmad ,  Bradley L. Taylor ,  Ahmad R. Ansari ,  Tomai Knopp

IPC: G06F11/07 ,  G06F11/14

CPC classification number: G06F11/0793 ,  G06F11/0706 ,  G06F11/0772 ,  G06F11/142 ,  G06F11/1441

Abstract: A method for operating a programmable IC is disclosed. A set of circuits specified by a set of configuration data is operated in a set of programmable resources. In response to one of a set of status signals indicating an error, a value indicative of an error is stored in a respective one of a plurality of error status registers. The values stored in the plurality of error status registers are provided to an error handling circuit included in the set of circuits specified by the set of configuration data and operated in the programmable resources. At least one error handling process is performed by the error handling circuit as a function of values stored in the plurality of error status registers.

Abstract translation: 公开了一种用于操作可编程IC的方法。 由一组配置数据指定的一组电路在一组可编程资源中操作。 响应于指示错误的一组状态信号中的一个，指示错误的值被存储在多个错误状态寄存器中的相应一个中。 存储在多个错误状态寄存器中的值被提供给由该组配置数据指定并在可编程资源中操作的电路集合中包括的错误处理电路。 由错误处理电路执行至少一个错误处理过程作为存储在多个错误状态寄存器中的值的函数。

公开(公告)号：US09454498B1

公开(公告)日：2016-09-27

申请号：US14194498

申请日：2014-02-28

Applicant: Xilinx, Inc.

Inventor： William E. Allaire ,  Bradley L. Taylor ,  Ting Lu ,  Sandeep Dutta ,  Patrick J. Crotty ,  Hassan K. Bazargan ,  Hy V. Nguyen ,  Shashank Bhonge

IPC: G06F13/10 ,  G06F15/78 ,  G06F1/26

CPC classification number: G06F13/10 ,  G06F1/26 ,  G06F1/3287 ,  G06F15/7867 ,  G06F15/7871 ,  Y02D10/171

Abstract: An integrated circuit can include a processor system configured to execute program code. The processor system can be hard-wired and include a processor hardware resource. The IC also can include a programmable circuitry configurable to implement different physical circuits. The programmable circuitry can be coupled to the processor system. The programmable circuitry can be configurable to share usage of the processor hardware resource of the processor system. The processor system further can control aspects of the programmable circuitry such as power on and/or off and also configuration of the programmable circuitry to implement one or more different physical circuits therein.

Abstract translation: 集成电路可以包括被配置为执行程序代码的处理器系统。 处理器系统可以是硬连线的并且包括处理器硬件资源。 IC还可以包括可配置为实现不同物理电路的可编程电路。 可编程电路可以耦合到处理器系统。 可编程电路可以被配置为共享处理器系统的处理器硬件资源的使用。 处理器系统还可以控制诸如上电和/或关断的可编程电路的方面，并且还可以配置可编程电路以在其中实现一个或多个不同的物理电路。