Methods for producing bipolar transistors with improved stability
    2.
    发明授权
    Methods for producing bipolar transistors with improved stability 有权
    制造稳定性提高的双极晶体管的方法

    公开(公告)号:US09466687B2

    公开(公告)日:2016-10-11

    申请号:US14157317

    申请日:2014-01-16

    摘要: Instability and drift sometimes observed in bipolar transistors, having a portion of the base extending to the transistor surface between the emitter and base contact, can be reduced or eliminated by providing a further doped region of the same conductivity type as the emitter at the transistor surface between the emitter and the base contact. The further region is desirably more heavily doped than the base region at the surface and less heavily doped than the adjacent emitter. In another embodiment, a still or yet further region of the same conductivity type as the emitter is provided either between the further region and the emitter or laterally within the emitter. The still or yet further region is desirably more heavily doped than the further region. Such further regions shield the near surface base region from trapped charge that may be present in dielectric layers or interfaces overlying the transistor surface.

    摘要翻译: 通过提供与晶体管表面上的发射极相同的导电类型的另外的掺杂区域,可以减少或消除具有延伸到发射极和基极接触之间的晶体管表面的基极的一部分的双极晶体管中的不稳定性和漂移 在发射极和基极之间。 另外的区域期望比表面上的基极区域重掺杂,并且比相邻的发射极更重掺杂。 在另一个实施例中,与发射器相同的导电类型的仍然还是另外的区域被提供在另外的区域和发射极之间或者在发射极内侧。 仍然还是进一步的区域期望比其他区域更重掺杂。 这样的另外的区域屏蔽近表面碱基区域可能存在于覆盖晶体管表面的电介质层或界面中的俘获电荷。

    Resurf High Voltage Diode
    3.
    发明申请
    Resurf High Voltage Diode 有权
    Resurf高压二极管

    公开(公告)号:US20150155350A1

    公开(公告)日:2015-06-04

    申请号:US14622068

    申请日:2015-02-13

    IPC分类号: H01L29/06 H01L29/861

    摘要: A trench-isolated RESURF diode structure (100) is provided which includes a substrate (150) in which is formed anode (130, 132) and cathode (131) contact regions separated from one another by a shallow trench isolation region (114, 115), along with a buried cathode extension region (104) formed under a RESURF anode extension region (106, 107) such that the cathode extension region (104) extends beyond the cathode contact (131) to be sandwiched between upper and lower regions (103, 106, 107) of opposite conductivity type.

    摘要翻译: 提供了沟槽隔离的RESURF二极管结构(100),其包括衬底(150),其中形成阳极(130,132)和阴极(131)接触区域,所述接触区域由浅沟槽隔离区域(114,115) ),以及形成在RESURF阳极延伸区域(106,107)下方的掩埋阴极延伸区域(104),使得阴极延伸区域(104)延伸超出阴极接触(131)以夹在上部和下部区域之间 103,106,107)。

    Semiconductor device with drain-end drift diminution
    4.
    发明授权
    Semiconductor device with drain-end drift diminution 有权
    漏极端漂移的半导体器件减少

    公开(公告)号:US08853780B2

    公开(公告)日:2014-10-07

    申请号:US13465761

    申请日:2012-05-07

    IPC分类号: H01L29/66

    摘要: A device includes a semiconductor substrate, source and drain regions in the semiconductor substrate, a channel region in the semiconductor substrate between the source and drain regions through which charge carriers flow during operation from the source region to the drain region, and a drift region in the semiconductor substrate, on which the drain region is disposed, and through which the charge carriers drift under an electric field arising from application of a bias voltage between the source and drain regions. A PN junction along the drift region includes a first section at the drain region and a second section not at the drain region. The drift region has a lateral profile that varies such that the first section of the PN junction is shallower than the second section of the PN junction.

    摘要翻译: 一种器件包括半导体衬底,半导体衬底中的源极和漏极区域,在源极和漏极区域之间的半导体衬底中的沟道区域,电荷载体在从源极区域到漏极区域的工作期间流过该沟道区域,以及漂移区域 其上设置有漏极区的半导体衬底,并且电荷载流子在源极和漏极区域之间施加偏压产生的电场下漂移。 沿着漂移区域的PN结包括在漏极区域处的第一部分和不在漏极区域的第二部分。 漂移区域具有变化的横向轮廓,使得PN结的第一部分比PN结的第二部分浅。

    BIPOLAR TRANSISTOR WITH IMPROVED STABILITY
    5.
    发明申请
    BIPOLAR TRANSISTOR WITH IMPROVED STABILITY 有权
    双极晶体管具有改进的稳定性

    公开(公告)号:US20120098095A1

    公开(公告)日:2012-04-26

    申请号:US12908586

    申请日:2010-10-20

    IPC分类号: H01L29/73 H01L21/8222

    摘要: Instability and drift sometimes observed in bipolar transistors, having a portion of the base extending to the transistor surface between the emitter and base contact, can be reduced or eliminated by providing a further doped region of the same conductivity type as the emitter at the transistor surface between the emitter and the base contact. The further region is desirably more heavily doped than the base region at the surface and less heavily doped than the adjacent emitter. In another embodiment, a still or yet further region of the same conductivity type as the emitter is provided either between the further region and the emitter or laterally within the emitter. The still or yet further region is desirably more heavily doped than the further region. Such further regions shield the near surface base region from trapped charge that may be present in dielectric layers or interfaces overlying the transistor surface.

    摘要翻译: 通过提供与晶体管表面上的发射极相同的导电类型的另外的掺杂区域,可以减少或消除具有延伸到发射极和基极接触之间的晶体管表面的基极的一部分的双极晶体管中的不稳定性和漂移 在发射极和基极之间。 另外的区域期望比表面上的基极区域重掺杂,并且比相邻的发射极更重掺杂。 在另一个实施例中,与发射器相同的导电类型的仍然还是另外的区域被提供在另外的区域和发射极之间或者在发射极内侧。 仍然还是进一步的区域期望比其他区域更重掺杂。 这样的另外的区域屏蔽近表面碱基区域可能存在于覆盖晶体管表面的电介质层或界面中的俘获电荷。

    SCHOTTKY DIODES
    6.
    发明申请
    SCHOTTKY DIODES 有权
    肖特基二极管

    公开(公告)号:US20110227135A1

    公开(公告)日:2011-09-22

    申请号:US13150831

    申请日:2011-06-01

    摘要: Improved Schottky diodes with reduced leakage current and improved breakdown voltage are provided by building a JFET with its current path of a first conductivity type serially located between a first terminal comprising a Schottky contact and a second terminal. The current path lies (i) between multiple substantially parallel finger regions of a second, opposite, conductivity type substantially laterally outboard of the Schottky contact, and (ii) partly above a buried region of the second conductivity type that underlies a portion of the current path, which regions are electrically coupled to the first terminal and the Schottky contact and which portion is electrically coupled to the second terminal. When reverse bias is applied to the first terminal and Schottky contact, the current path is substantially pinched off in vertical or horizontal directions or both, thereby reducing the leakage current and improving the breakdown voltage of the device.

    摘要翻译: 通过以串联位于包括肖特基接触和第二端子的第一端子之间的第一导电类型的电流路径构建JFET来提供具有减小的漏电流和改善的击穿电压的改进的肖特基二极管。 电流通路是(i)在肖特基接触的基本上横向外侧的第二相对导电类型的多个基本上平行的手指区域之间,以及(ii)部分地位于第二导电类型的掩埋区域之下, 路径,哪些区域电耦合到第一端子和肖特基接触,哪个部分电耦合到第二端子。 当对第一端子和肖特基触点施加反向偏压时,电流路径在垂直或水平方向或两者上基本上被夹断,从而减小漏电流并提高器件的击穿电压。

    Semiconductor devices and related fabrication methods
    7.
    发明授权
    Semiconductor devices and related fabrication methods 有权
    半导体器件及相关制造方法

    公开(公告)号:US09306060B1

    公开(公告)日:2016-04-05

    申请号:US14548616

    申请日:2014-11-20

    摘要: Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure includes a body region of semiconductor material having a first conductivity type, a source region of semiconductor material having a second conductivity type within the body region, a junction isolation region of semiconductor material having the second conductivity type, a drain region of semiconductor material having the second conductivity type, and first and second drift regions of semiconductor material having the second conductivity type. The first drift region resides laterally between the drain region and the junction isolation region, the junction isolation region resides laterally between the first drift region and the second drift region, and the second drift region resides laterally between the body region and the junction isolation region.

    摘要翻译: 提供半导体器件结构和相关的制造方法。 示例性的半导体器件结构包括具有第一导电类型的半导体材料的主体区域,在体区内具有第二导电类型的半导体材料的源极区域,具有第二导电类型的半导体材料的结隔离区域,漏极区域 具有第二导电类型的半导体材料以及具有第二导电类型的半导体材料的第一和第二漂移区。 第一漂移区域横向地位于漏极区域和结隔离区域之间,结隔离区域横向位于第一漂移区域和第二漂移区域之间,并且第二漂移区域横向居住在体区域和结隔离区域之间。

    Resurf high voltage diode
    8.
    发明授权
    Resurf high voltage diode 有权
    Resurf高压二极管

    公开(公告)号:US09059008B2

    公开(公告)日:2015-06-16

    申请号:US13656103

    申请日:2012-10-19

    摘要: A trench-isolated RESURF diode structure (100) is provided which includes a substrate (150) in which is formed anode (130, 132) and cathode (131) contact regions separated from one another by a shallow trench isolation region (114, 115), along with a buried cathode extension region (104) formed under a RESURF anode extension region (106, 107) such that the cathode extension region (104) extends beyond the cathode contact (131) to be sandwiched between upper and lower regions (103, 106, 107) of opposite conductivity type.

    摘要翻译: 提供了沟槽隔离的RESURF二极管结构(100),其包括衬底(150),其中形成阳极(130,132)和阴极(131)的接触区域,所述接触区域通过浅沟槽隔离区域(114,115) ),以及形成在RESURF阳极延伸区域(106,107)下方的掩埋阴极延伸区域(104),使得阴极延伸区域(104)延伸超出阴极接触(131)以夹在上部和下部区域之间 103,106,107)。

    Semiconductor Device with Buried Conduction Path
    9.
    发明申请
    Semiconductor Device with Buried Conduction Path 有权
    具有埋地导电路径的半导体器件

    公开(公告)号:US20150097265A1

    公开(公告)日:2015-04-09

    申请号:US14047222

    申请日:2013-10-07

    IPC分类号: H01L29/735 H01L29/66

    摘要: A device includes a semiconductor substrate, emitter and collector regions disposed in the semiconductor substrate, having a first conductivity type, and laterally spaced from one another, and a composite base region disposed in the semiconductor substrate, having a second conductivity type, and including a base contact region, a buried region through which a buried conduction path between the emitter and collector regions is formed during operation, and a base link region electrically connecting the base contact region and the buried region. The base link region has a dopant concentration level higher than the buried region and is disposed laterally between the emitter and collector regions.

    摘要翻译: 一种器件包括设置在半导体衬底中的半导体衬底,发射极和集电极区域,具有第一导电类型并且彼此横向间隔开;以及复合衬底区域,设置在半导体衬底中,具有第二导电类型,并且包括 基极接触区域,在工作期间形成发射极和集电极区域之间的掩埋传导路径的埋入区域和电连接基极接触区域和埋入区域的基极连接区域。 基极区域的掺杂剂浓度水平高于掩埋区域,并且横向设置在发射极和集电极区域之间。