Linearization systems and methods for variable attenuators
    1.
    发明授权
    Linearization systems and methods for variable attenuators 有权
    可变衰减器的线性化系统和方法

    公开(公告)号:US08179205B2

    公开(公告)日:2012-05-15

    申请号:US12784723

    申请日:2010-05-21

    IPC分类号: H01P1/22

    CPC分类号: H01P1/22 H03G1/007 H03H11/245

    摘要: Systems and methods for provided for linearization systems and methods for variable attenuators. The variable attenuators can include series transistors along a main signal path from the input to output, as well as shunt transistors. A bootstrapping body bias circuit can be used with one or of the series transistors to allow the body of a connected transistor to swing responsive to a received RF input signal. As the RF signal increases and affects the gate-to-source voltage difference of a transistor, a bootstrapping body bias circuit can adaptively adjust the threshold voltage of the connected transistor and compensate the channel resistance variation resulting from gate-to-source voltage swing. The bootstrapping body bias circuit can be implemented using passive elements, active elements, or a combination thereof.

    摘要翻译: 为可变衰减器的线性化系统和方法提供的系统和方法。 可变衰减器可以包括沿着从输入到输出的主信号路径的串联晶体管,以及分流晶体管。 自举体偏置电路可以与一个或串联晶体管一起使用,以允许连接的晶体管的主体响应于接收到的RF输入信号而摆动。 随着RF信号增加并影响晶体管的栅极 - 源极电压差,自举体偏置电路可以自适应地调节连接的晶体管的阈值电压,并补偿由栅极至源极电压摆幅引起的沟道电阻变化。 自举体偏置电路可以使用无源元件,有源元件或其组合来实现。

    LINEARIZATION SYSTEMS AND METHODS FOR VARIABLE ATTENUATORS
    2.
    发明申请
    LINEARIZATION SYSTEMS AND METHODS FOR VARIABLE ATTENUATORS 有权
    线性化系统和变量衰减器的方法

    公开(公告)号:US20110285481A1

    公开(公告)日:2011-11-24

    申请号:US12784723

    申请日:2010-05-21

    IPC分类号: H01P1/22

    CPC分类号: H01P1/22 H03G1/007 H03H11/245

    摘要: Systems and methods for provided for linearization systems and methods for variable attenuators. The variable attenuators can include series transistors along a main signal path from the input to output, as well as shunt transistors. A bootstrapping body bias circuit can be used with one or of the series transistors to allow the body of a connected transistor to swing responsive to a received RF input signal. As the RF signal increases and affects the gate-to-source voltage difference of a transistor, a bootstrapping body bias circuit can adaptively adjust the threshold voltage of the connected transistor and compensate the channel resistance variation resulting from gate-to-source voltage swing. The bootstrapping body bias circuit can be implemented using passive elements, active elements, or a combination thereof.

    摘要翻译: 为可变衰减器的线性化系统和方法提供的系统和方法。 可变衰减器可以包括沿着从输入到输出的主信号路径的串联晶体管,以及分流晶体管。 自举体偏置电路可以与一个或串联晶体管一起使用,以允许连接的晶体管的主体响应于接收到的RF输入信号而摆动。 随着RF信号增加并影响晶体管的栅极 - 源极电压差,自举体偏置电路可以自适应地调节连接的晶体管的阈值电压,并补偿由栅极至源极电压摆幅引起的沟道电阻变化。 自举体偏置电路可以使用无源元件,有源元件或其组合来实现。

    Systems and methods for a SPDT switch or SPMT switch with transformer
    3.
    发明授权
    Systems and methods for a SPDT switch or SPMT switch with transformer 有权
    具有变压器的SPDT开关或SPMT开关的系统和方法

    公开(公告)号:US08044540B2

    公开(公告)日:2011-10-25

    申请号:US12565137

    申请日:2009-09-23

    IPC分类号: H01H31/10

    CPC分类号: H03K17/693 Y10T307/76

    摘要: A SPDT or SPMT switch may include a transformer having a primary winding and a secondary winding, where a first end of the secondary winding is connected to a single pole port, where a first end of the primary winding is connected to a first throw port; a first switch having a first end and a second end, where the first end is connected to ground; and a second switch, where a second end of the secondary winding is connected to both a second end of the first switch and a first end of the second switch, where a second end of the second switch is connected to a second throw port, where the first switch controls a first communication path between the single pole port and the first throw port, and where the second switch controls a second communication path between the second throw port and the single pole port.

    摘要翻译: SPDT或SPMT开关可以包括具有初级绕组和次级绕组的变压器,其中次级绕组的第一端连接到单极端口,其中初级绕组的第一端连接到第一端口; 第一开关,其具有第一端和第二端,其中第一端连接到地; 以及第二开关,其中所述次级绕组的第二端连接到所述第一开关的第二端和所述第二开关的第一端,其中所述第二开关的第二端连接到第二突出端口,其中 第一开关控制单极端口和第一端口之间的第一通信路径,并且其中第二开关控制第二端口和单极端口之间的第二通信路径。

    Systems, methods, and apparatuses for complementary metal oxide semiconductor (CMOS) antenna switches using body switching in multistacking structure
    4.
    发明授权
    Systems, methods, and apparatuses for complementary metal oxide semiconductor (CMOS) antenna switches using body switching in multistacking structure 有权
    在多层结构中使用身体切换的互补金属氧化物半导体(CMOS)天线开关的系统,方法和装置

    公开(公告)号:US07890063B2

    公开(公告)日:2011-02-15

    申请号:US11857322

    申请日:2007-09-18

    IPC分类号: H04B1/44

    摘要: Embodiments of the invention may provide for a CMOS antenna switch, which may be referred to as a CMOS SP4T switch. The CMOS antenna switch may operate at a plurality of frequencies, perhaps around 900 MHz and 1.9 GHz according to an embodiment of the invention. The CMOS antenna switch may include both a receiver switch and a transmit switch. The receiver switch may utilize a multi-stack transistor with body substrate tuning to block high power signals from the transmit path as well as to maintain low insertion loss at the receiver path. On the other hand, in the transmit switch, a body substrate tuning technique may be applied to maintain high power delivery to the antenna. Example embodiments of the CMOS antenna switch may provide for 31 dBm P 1 dB at both bands (e.g., 900 MHz and 1.8 GHz). In addition, a 0.9 dB and −1.1 dB insertion loss at 900 MHz and 1.9 GHz, respectively, may be obtained according to example embodiments of the invention.

    摘要翻译: 本发明的实施例可以提供CMOS天线开关,其可以被称为CMOS SP4T开关。 根据本发明的实施例,CMOS天线开关可以以多个频率操作,可能大约在900MHz和1.9GHz。 CMOS天线开关可以包括接收器开关和发送开关。 接收器开关可以利用具有主体衬底调谐的多层晶体管来阻挡来自发射路径的高功率信号以及在接收器路径处保持低的插入损耗。 另一方面,在发送开关中,可以应用主体衬底调谐技术来保持对天线的高功率输送。 CMOS天线开关的示例实施例可以在两个频带(例如,900MHz和1.8GHz)处提供31dBm的P 1 dB。 此外,根据本发明的示例实施例,可以分别获得在900MHz和1.9GHz处的0.9dB和-1.1dB的插入损耗。

    Systems, Methods and Apparatuses for High Power Complementary Metal Oxide Semiconductor (CMOS) Antenna Switches Using Body Switching and External Component in Multi-Stacking Structure
    7.
    发明申请
    Systems, Methods and Apparatuses for High Power Complementary Metal Oxide Semiconductor (CMOS) Antenna Switches Using Body Switching and External Component in Multi-Stacking Structure 有权
    大功率互补金属氧化物半导体(CMOS)天线开关的系统,方法和装置在多堆叠结构中使用主体开关和外部元件

    公开(公告)号:US20090073078A1

    公开(公告)日:2009-03-19

    申请号:US11855950

    申请日:2007-09-14

    IPC分类号: H01Q3/24

    摘要: Embodiments of the invention may provide for a CMOS antenna switch, which may be referred to as a CMOS SPDT switch. The CMOS antenna switch may operate at a plurality of frequencies, perhaps around 900 MHz, 1.9 GHz and 2.1 GHz according to an embodiment of the invention. The CMOS antenna switch may include both a receiver switch and a transmit switch. The receiver switch may utilize a multi-stack transistor with body substrate switching and attachment of external capacitor between drain and gate to block high power signals from the transmit path as well as to maintain low insertion loss at the receiver path. Exemplary embodiments of the CMOS antenna switch may provide for 38 dBm P 0.1 dB at multi bands (e.g., 900 MHz, 1.8 GHz, and 2.1 GHz). In addition, −60 dBc second and third harmonic performance up to 30 dBm input, may be obtained according to example embodiments of the invention.

    摘要翻译: 本发明的实施例可以提供可被称为CMOS SPDT开关的CMOS天线开关。 根据本发明的实施例,CMOS天线开关可以以多个频率操作,可能约为900MHz,1.9GHz和2.1GHz。 CMOS天线开关可以包括接收器开关和发送开关。 接收器开关可以利用具有主体衬底切换的多层晶体管,并且在漏极和栅极之间附接外部电容器以阻挡来自发射路径的高功率信号以及在接收器路径处保持较低的插入损耗。 CMOS天线开关的示例性实施例可以在多频带(例如,900MHz,1.8GHz和2.1GHz)处提供38dBm P 0.1dB。 此外,根据本发明的示例性实施例,可以获得高达30dBm输入的-60dBc的二次和三次谐波性能。

    Systems, methods, and apparatuses for implementing a load regulation tuner for linear regulation
    8.
    发明申请
    Systems, methods, and apparatuses for implementing a load regulation tuner for linear regulation 有权
    用于实现用于线性调节的负载调节调谐器的系统,方法和装置

    公开(公告)号:US20080088286A1

    公开(公告)日:2008-04-17

    申请号:US11872519

    申请日:2007-10-15

    IPC分类号: G05F1/565

    CPC分类号: G05F1/56

    摘要: Embodiments of the invention may provide for a load regulation tuner that reduces the load regulation effect. The load regulation tuner may include a load current controlled current source that is responsive to a load current from a power transistor of a linear regulator, where the load current controlled current source includes a sensing transistor that generates a fraction of the load current as a sensed partial load current. The load regulation tuner may also include a resistor in parallel with a load current controlled current source, and where the paralleled resistor and the load current controlled current source form at least a portion of a feedback block that adjusts an operation of the linear regulator to provide a substantially constant load voltage.

    摘要翻译: 本发明的实施例可以提供减轻负载调节效应的负载调节调谐器。 负载调节调谐器可以包括响应于来自线性调节器的功率晶体管的负载电流的负载电流受控电流源,其中负载电流受控电流源包括感测晶体管,其产生负载电流的一部分作为感测 部分负载电流。 负载调节调谐器还可以包括与负载电流控制的电流源并联的电阻器,并且其中并联的电阻器和负载电流受控电流源形成至少一部分反馈块,其调整线性调节器的操作以提供 基本恒定的负载电压。

    Systems, methods, and apparatuses for high power complementary metal oxide semiconductor (CMOS) antenna switches using body switching and substrate junction diode controlling in multistacking structure
    9.
    发明授权
    Systems, methods, and apparatuses for high power complementary metal oxide semiconductor (CMOS) antenna switches using body switching and substrate junction diode controlling in multistacking structure 有权
    在多层结构中使用体开关和衬底结二极管控制的大功率互补金属氧化物半导体(CMOS)天线开关的系统,方法和装置

    公开(公告)号:US07843280B2

    公开(公告)日:2010-11-30

    申请号:US11943378

    申请日:2007-11-20

    IPC分类号: H01P1/15 H04B1/44

    摘要: Embodiments of the invention may provide for a CMOS antenna switch, which may be referred to as a CMOS SPDT switch. The CMOS antenna switch may operate at a plurality of frequencies, perhaps around 900 MHz 1.9 GHz and 2.1 GHz according to an embodiment of the invention. The CMOS antenna switch may include both a receiver switch and a transmit switch. The receiver switch may utilize a multi-stack transistor with body substrate switching and source and body connection along with body floating technique to block high power signals from the transmit path by preventing channel formation of the device in OFF state as well as to maintain low insertion loss at the receiver path. Example embodiments of the CMOS antenna switch may provide for 35 dBm P 1 dB at both bands (e.g., 900 MHz and 1.9 GHz and 2.1 GHz). In addition, a −60 dBc second and third harmonic up to 28 dBm input power to the switch, may be obtained according to example embodiments of the invention.

    摘要翻译: 本发明的实施例可以提供可被称为CMOS SPDT开关的CMOS天线开关。 根据本发明的实施例,CMOS天线开关可以以多个频率操作,可能约为900MHz 1.9GHz和2.1GHz。 CMOS天线开关可以包括接收器开关和发送开关。 接收器开关可以利用具有主体衬底切换和源和体连接以及身体浮动技术的多堆叠晶体管,以通过防止器件在OFF状态下的通道形成以及保持低插入来阻止来自发射路径的高功率信号 在接收机路径损失。 CMOS天线开关的示例实施例可以在两个频带(例如,900MHz和1.9GHz和2.1GHz)处提供35dBm的P 1dB。 此外,根据本发明的示例性实施例,可以获得高达28dBm的输入功率对于开关的-60dBc的二次和三次谐波。

    Systems, Methods, and Apparatuses for Complementary Metal Oxide Semiconductor (CMOS) Antenna Switches Using Body Switching in Multistacking Structure
    10.
    发明申请
    Systems, Methods, and Apparatuses for Complementary Metal Oxide Semiconductor (CMOS) Antenna Switches Using Body Switching in Multistacking Structure 有权
    使用多层结构中的主体切换的互补金属氧化物半导体(CMOS)天线开关的系统,方法和装置

    公开(公告)号:US20080079653A1

    公开(公告)日:2008-04-03

    申请号:US11857322

    申请日:2007-09-18

    IPC分类号: H03K17/687 H01Q1/00

    摘要: Embodiments of the invention may provide for a CMOS antenna switch, which may be referred to as a CMOS SP4T switch. The CMOS antenna switch may operate at a plurality of frequencies, perhaps around 900 MHz and 1.9 GHz according to an embodiment of the invention. The CMOS antenna switch may include both a receiver switch and a transmit switch. The receiver switch may utilize a multi-stack transistor with body substrate tuning to block high power signals from the transmit path as well as to maintain low insertion loss at the receiver path. On the other hand, in the transmit switch, a body substrate tuning technique may be applied to maintain high power delivery to the antenna. Example embodiments of the CMOS antenna switch may provide for 31 dBm P 1 dB at both bands (e.g., 900 MHz and 1.8 GHz). In addition, a 0.9 dB and −1.1 dB insertion loss at 900 MHz and 1.9 GHz, respectively, may be obtained according to example embodiments of the invention.

    摘要翻译: 本发明的实施例可以提供CMOS天线开关,其可以被称为CMOS SP4T开关。 根据本发明的实施例,CMOS天线开关可以以多个频率操作,可能大约在900MHz和1.9GHz。 CMOS天线开关可以包括接收器开关和发送开关。 接收器开关可以利用具有主体衬底调谐的多层晶体管来阻挡来自发射路径的高功率信号以及在接收器路径处保持低的插入损耗。 另一方面,在发送开关中,可以应用主体衬底调谐技术来保持对天线的高功率输送。 CMOS天线开关的示例实施例可以在两个频带(例如,900MHz和1.8GHz)处提供31dBm的P 1 dB。 此外,根据本发明的示例实施例,可以分别获得在900MHz和1.9GHz处的0.9dB和-1.1dB的插入损耗。