公开(公告)号：US06333528B1

公开(公告)日：2001-12-25

申请号：US09071795

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US6015987A

公开(公告)日：2000-01-18

申请号：US71122

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L27/108 ,  H01L29/00 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5624864A

公开(公告)日：1997-04-29

申请号：US284984

申请日：1994-08-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US06169304A

公开(公告)日：2001-01-02

申请号：US09071534

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5780351A

公开(公告)日：1998-07-14

申请号：US844108

申请日：1997-04-28

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/20 ,  H01L21/00

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semi conductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种半导体器件，其在形成集成电路的半导体衬底上通过层间绝缘层形成电容器。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US06294438B1

公开(公告)日：2001-09-25

申请号：US09589520

申请日：2000-06-08

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2100

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US6107657A

公开(公告)日：2000-08-22

申请号：US71121

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/72

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5837591A

公开(公告)日：1998-11-17

申请号：US803144

申请日：1997-02-19

申请人： Yasuhiro Shimada ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Yoshihisa Nagano ,  Akihiro Matsuda

发明人： Yasuhiro Shimada ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Yoshihisa Nagano ,  Akihiro Matsuda

IPC分类号： H01L21/28 ,  H01L21/02 ,  H01L21/822 ,  H01L27/04 ,  H01L27/10 ,  H01L27/115 ,  H01L21/20

CPC分类号： H01L27/11502 ,  H01L28/40

摘要： A semiconductor device comprises silicon substrate 1 on which an integrated circuit is formed, first insulating layer 6 formed on silicon substrate 1, a capacitor comprising lower electrode 7 formed on first insulating layer 6, dielectric film 8 having a high dielectric constant and upper electrode 9, a second insulating film 11 having contact holes 13 which lead to lower electrode 7 and upper electrode 9 independently, diffusion barrier layer 17 which touches lower electrode 7 and upper electrode 9 at bottom of contact holes 13, and interconnection layer 15 formed on diffusion barrier layer 17. In diffusion barrier layer 17 at the bottom of contact hole 13, a lamellar region made of granular crystal is formed.

摘要翻译： 半导体器件包括其上形成有集成电路的硅衬底1，形成在硅衬底1上的第一绝缘层6，包括形成在第一绝缘层6上的下电极7的电容器，具有高介电常数的电介质膜8和上电极9 具有独立地引导到下电极7和上电极9的接触孔13的第二绝缘膜11，在接触孔13的底部接触下电极7和上电极9的扩散阻挡层17和形成在扩散阻挡层上的互连层15 在接触孔13的底部的扩散阻挡层17中，形成由粒状晶体构成的层状区域。

公开(公告)号：US5627391A

公开(公告)日：1997-05-06

申请号：US492913

申请日：1995-06-20

申请人： Yasuhiro Shimada ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Yoshihisa Nagano ,  Akihiro Matsuda

发明人： Yasuhiro Shimada ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Yoshihisa Nagano ,  Akihiro Matsuda

IPC分类号： H01L21/28 ,  H01L21/02 ,  H01L21/822 ,  H01L27/04 ,  H01L27/10 ,  H01L27/115 ,  H01L29/76 ,  H01L23/48 ,  H01L27/108

CPC分类号： H01L27/11502 ,  H01L28/40

摘要： A semiconductor device comprises silicon substrate 1 on which an integrated circuit is formed, first insulating layer 6 formed on silicon substrate 1, a capacitor comprising lower electrode 7 formed on first insulating layer 6, dielectric film 8 having a high dielectric constant and upper electrode 9, a second insulating film 11 having contact holes 13 which lead to lower electrode 7 and upper electrode 9 independently, diffusion barrier layer 17 which touches lower electrode 7 and upper electrode 9 at the bottom of contact holes 13, and interconnection layer 15 formed on diffusion barrier layer 17. In diffusion barrier layer 17 at the bottom of contact hole 13, a lamellar region made of granular crystal is formed.

摘要翻译： 半导体器件包括其上形成有集成电路的硅衬底1，形成在硅衬底1上的第一绝缘层6，包括形成在第一绝缘层6上的下电极7的电容器，具有高介电常数的电介质膜8和上电极9 具有接触孔13的第二绝缘膜11，其独立地引导到下电极7和上电极9，在接触孔13的底部接触下电极7和上电极9的扩散阻挡层17和扩散形成的互连层15 在接触孔13的底部的扩散阻挡层17中形成由粒状晶体构成的层状区域。

公开(公告)号：US5591663A

公开(公告)日：1997-01-07

申请号：US388502

申请日：1995-02-14

申请人： Toru Nasu ,  Atsuo Inoue ,  Yoshihisa Nagano ,  Akihiro Matsuda ,  Koji Arita

发明人： Toru Nasu ,  Atsuo Inoue ,  Yoshihisa Nagano ,  Akihiro Matsuda ,  Koji Arita

IPC分类号： H01L23/522 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115

CPC分类号： H01L27/11502

摘要： A manufacturing method of a semiconductor device comprises the steps:(a) forming a ferroelectric capacitor on a semiconductor substrate on which a MOS transistor is formed, (b) forming an interlayer insulating film which covers the whole semiconductor substrate, (c) forming first contact holes which reach diffusion layers of the MOS transistor, (d) after forming the first contact holes, providing a heat treatment in hydrogen atmosphere, (e) after the heat treatment, forming second contact holes which reach upper and lower electrodes of the ferroelectric capacitor on the interlayer insulating film, and (f) forming metal interconnection. Since the heat treatment in hydrogen atmosphere is provided before forming the second contact holes, a surface state density at interface between the semiconductor and a gate insulating film of the MOS transistor can be lowered without degrading the characteristics of ferroelectric capacitor.

摘要翻译： 半导体器件的制造方法包括以下步骤：（a）在形成有MOS晶体管的半导体衬底上形成强电介质电容器，（b）形成覆盖整个半导体衬底的层间绝缘膜，（c） 接触孔到达MOS晶体管的扩散层，（d）在形成第一接触孔之后，在氢气氛中进行热处理，（e）在热处理之后，形成到铁电体的上下电极的第二接触孔 层间绝缘膜上的电容器，（f）形成金属互连。 由于在形成第二接触孔之前提供氢气氛中的热处理，所以可以降低MOS晶体管的半导体与栅极绝缘膜之间的界面处的表面状态密度，而不降低铁电电容器的特性。