公开(公告)号：US08410817B2

公开(公告)日：2013-04-02

申请号：US12858295

申请日：2010-08-17

申请人： Yuji Kuwana ,  Naoki Matsumoto ,  Yasuhiro Urabe

发明人： Yuji Kuwana ,  Naoki Matsumoto ,  Yasuhiro Urabe

IPC分类号： H03K19/0175 ,  H03B1/00

CPC分类号： H03K19/001 ,  H03K17/04126 ,  H03K19/0136 ,  H03K2217/0036

摘要： A level switch circuit receives a digital input signal, and generates a level signal having a voltage level that corresponds to the value of the input signal thus received. A buffer circuit receives a level signal, and outputs the level signal via an output terminal thereof. A bias current generating circuit generates a bias current including a DC component having a constant level and a variable component that changes according to the input signal, and supplies the bias current thus generated to a buffer circuit. The bias current generating circuit detects an edge of the input signal, and raises the bias current by a predetermined amount for a predetermined period of time after the edge thus detected.

摘要翻译： 电平开关电路接收数字输入信号，并产生具有与所接收的输入信号的值对应的电压电平的电平信号。 缓冲电路接收电平信号，并通过其输出端输出电平信号。 偏置电流产生电路产生包括具有恒定电平的DC分量和根据输入信号而变化的可变分量的偏置电流，并将由此产生的偏置电流提供给缓冲电路。 偏置电流产生电路检测输入信号的边缘，并且在如此检测到的边缘之后的预定时间段内将偏置电流提高预定量。

公开(公告)号：US07795897B1

公开(公告)日：2010-09-14

申请号：US12412364

申请日：2009-03-27

申请人： Yasuhiro Urabe ,  Naoki Matsumoto ,  Yuji Kuwana

发明人： Yasuhiro Urabe ,  Naoki Matsumoto ,  Yuji Kuwana

IPC分类号： G01R31/26

CPC分类号： G01R31/2889 ,  G01R31/31924

摘要： Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern, and supplies the output signal to the device under test; and a measuring section that measures a response signal output by the device under test to judge the acceptability of the device under test, wherein the driver circuit includes an input gate drive section that selects one of a plurality of input drive voltages supplied thereto, according to a logic value of the input pattern, and outputs the selected input drive voltage; a voltage switching section that includes a transistor and that outputs the output signal according to the drain voltage of the transistor, the transistor having a gate terminal that receives the input drive voltage output by the input gate drive section and a source terminal to which is applied a prescribed reference voltage; and an input drive voltage supplying section that generates the input drive voltages according to the reference voltage, and supplies the input drive voltages to the input gate drive section.

摘要翻译： 提供了一种测试被测设备的测试装置，包括根据规定的输入模式产生输出信号的驱动电路，并将输出信号提供给被测器件; 以及测量部，其测量由所述被测设备输出的响应信号，判断被测设备的可接受性，其中，所述驱动电路包括：输入栅极驱动部，其根据所述输入栅极驱动部选择供给的多个输入驱动电压中的一个， 输入图案的逻辑值，并输出所选择的输入驱动电压; 电压切换部，其包括晶体管，并且根据所述晶体管的漏极电压输出所述输出信号，所述晶体管具有接收由所述输入栅极驱动部输出的输入驱动电压的栅极端子和施加到所述输入栅极驱动部的源极端子 规定的参考电压; 以及输入驱动电压供给部，其根据所述基准电压生成所述输入驱动电压，并将所述输入驱动电压提供给所述输入栅极驱动部。

公开(公告)号：US08013626B2

公开(公告)日：2011-09-06

申请号：US12414681

申请日：2009-03-31

申请人： Yasuhiro Urabe ,  Naoki Matsumoto ,  Yuji Kuwana

发明人： Yasuhiro Urabe ,  Naoki Matsumoto ,  Yuji Kuwana

IPC分类号： G01R31/02 ,  G01R31/26

CPC分类号： G01R31/31924 ,  H04L25/0278

摘要： Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern and supplies the output signal to the device under test; and a measuring section that judges acceptability of the device under test by measuring a response signal output by the device under test. The driver circuit includes an input terminal that receives the input pattern; a switching section that operates according to a logic value of the input pattern to generate the output signal; and an emphasized component generating section that is provided between the input terminal and the switching section, and that (i) generates an emphasized component according to a prescribed high frequency component of the input pattern and (ii) superimposes the emphasized component onto a voltage supplied to the switching section.

摘要翻译： 提供了一种测试被测设备的测试装置，包括根据规定的输入模式生成输出信号的驱动电路，并将输出信号提供给被测器件; 以及测量部，其通过测量被测设备输出的响应信号来判断被测设备的可接受性。 驱动器电路包括接收输入图案的输入端子; 切换部，其根据所述输入图案的逻辑值进行动作，生成所述输出信号; 以及设置在所述输入端子和所述开关部分之间的强调分量产生部分，以及（i）根据所述输入图案的规定的高频分量产生强调分量，以及（ii）将所述强调分量叠加到所提供的电压 到切换部分。

公开(公告)号：US20100244880A1

公开(公告)日：2010-09-30

申请号：US12412364

申请日：2009-03-27

申请人： Yasuhiro Urabe ,  Naoki Matsumoto ,  Yuji Kuwana

发明人： Yasuhiro Urabe ,  Naoki Matsumoto ,  Yuji Kuwana

IPC分类号： G01R31/26 ,  H03B1/00

CPC分类号： G01R31/2889 ,  G01R31/31924

摘要： Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern, and supplies the output signal to the device under test; and a measuring section that measures a response signal output by the device under test to judge the acceptability of the device under test, wherein the driver circuit includes an input gate drive section that selects one of a plurality of input drive voltages supplied thereto, according to a logic value of the input pattern, and outputs the selected input drive voltage; a voltage switching section that includes a transistor and that outputs the output signal according to the drain voltage of the transistor, the transistor having a gate terminal that receives the input drive voltage output by the input gate drive section and a source terminal to which is applied a prescribed reference voltage; and an input drive voltage supplying section that generates the input drive voltages according to the reference voltage, and supplies the input drive voltages to the input gate drive section.

摘要翻译： 提供了一种测试被测设备的测试装置，包括根据规定的输入模式产生输出信号的驱动电路，并将输出信号提供给被测器件; 以及测量部，其测量由所述被测设备输出的响应信号，判断被测设备的可接受性，其中，所述驱动电路包括：输入栅极驱动部，其根据所述输入栅极驱动部选择供给的多个输入驱动电压中的一个， 输入图案的逻辑值，并输出所选择的输入驱动电压; 电压切换部，其包括晶体管，并且根据所述晶体管的漏极电压输出所述输出信号，所述晶体管具有接收由所述输入栅极驱动部输出的输入驱动电压的栅极端子和施加到所述输入栅极驱动部的源极端子 规定的参考电压; 以及输入驱动电压供给部，其根据所述基准电压生成所述输入驱动电压，并将所述输入驱动电压提供给所述输入栅极驱动部。

公开(公告)号：US08368366B2

公开(公告)日：2013-02-05

申请号：US12553755

申请日：2009-09-03

申请人： Yuji Kuwana ,  Naoki Matsumoto ,  Yasuhiro Urabe

发明人： Yuji Kuwana ,  Naoki Matsumoto ,  Yasuhiro Urabe

IPC分类号： G05F1/40

CPC分类号： H03F3/45

摘要： Provided is a driver circuit that outputs, from an output end, an output signal corresponding to an input signal supplied thereto, comprising an output resistance section that is provided between a constant voltage source and the output end; an output switching section that switches voltage of the output end according to the input signal; and a switching section that switches a resistance value of the output resistance section. The output resistance section includes an output resistance FET having a source/drain connection between the constant voltage source and the output end, and the switching section supplies a control voltage to a gate of the output resistance FET such that the resistance between the source and the drain of the output resistance FET switches to a designated value.

摘要翻译： 提供了一种从输出端输出与提供给其的输入信号相对应的输出信号的驱动器电路，包括设置在恒定电压源和输出端之间的输出电阻部分; 输出切换部，其根据输入信号切换输出端的电压; 以及切换部，切换输出电阻部的电阻值。 输出电阻部分包括在恒定电压源和输出端之间具有源极/漏极连接的输出电阻FET，并且开关部分向输出电阻FET的栅极提供控制电压，使得源极和源极之间的电阻 输出电阻FET的漏极切换到指定值。

公开(公告)号：US08531187B2

公开(公告)日：2013-09-10

申请号：US12652550

申请日：2010-01-05

申请人： Yuji Kuwana ,  Naoki Matsumoto

发明人： Yuji Kuwana ,  Naoki Matsumoto

IPC分类号： H03K19/0175

CPC分类号： G01R31/31924 ,  G01R31/3191

摘要： Provided is a correction circuit for generating an output signal emphasizing a predetermined signal component of a supplied input signal, including: a first detection section that detects a waveform of the input signal; an amplifying section that amplifies the waveform detected by the first detection section; a correction signal generating section that generates a correction signal by extracting an alternate current component from the waveform amplified by the amplifying section; and an output signal generating section that superimposes the correction signal on the waveform of the input signal, thereby generating the output signal. The first detection section detects the waveform of the input signal and an inverted waveform thereof, the amplifying section amplifies the waveform and the inverted waveform of the input signal, the correction signal generating section generates a correction signal and an inverted correction signal by extracting an alternate current component respectively of the waveform and the inverted waveform of the input signal amplified by the amplifying section, and the output signal generating section generates a pair of differential signals for the output signal, by superimposing the correction signal on the waveform of the input signal and superimposing the inverted correction signal on the inverted waveform of the input signal.

摘要翻译： 提供了一种用于产生强调所提供的输入信号的预定信号分量的输出信号的校正电路，包括：第一检测部分，其检测输入信号的波形; 放大部，其放大由所述第一检测部检测出的波形; 校正信号生成部，其从由放大部放大的波形中提取交流分量，生成校正信号; 以及输出信号生成部，其将所述校正信号叠加在所述输入信号的波形上，从而生成所述输出信号。 第一检测部分检测输入信号的波形及其反相波形，放大部分放大输入信号的波形和反相波形，校正信号产生部分通过提取交替的方式产生校正信号和反相校正信号 分别由放大部分放大的输入信号的波形和反相波形的电流分量，并且输出信号产生部分通过将校正信号叠加在输入信号的波形上并产生一对差分信号用于输出信号， 将反相校正信号叠加在输入信号的反相波形上。

公开(公告)号：US20070176617A1

公开(公告)日：2007-08-02

申请号：US11343900

申请日：2006-01-31

申请人： Yuji Kuwana ,  Yoshiharu Umemura ,  Takashi Sekino

发明人： Yuji Kuwana ,  Yoshiharu Umemura ,  Takashi Sekino

IPC分类号： G01R31/02

CPC分类号： G01R31/3191 ,  G01R31/2874 ,  H03K17/14 ,  H03K17/30

摘要： A temperature compensation circuit for effectively compensating the difference of a switching timing due to temperature change of a switching element included in a logic circuit is provided. The temperature compensation circuit includes a temperature detecting section for detecting a value corresponding to the temperature of the switching element, and a correction section for correcting the voltage of a logic signal inputted from a previous circuit to the logic circuit in order to reduce the difference of the switching timing due to the temperature change of the switching element based on the value corresponding to the temperature.

摘要翻译： 提供一种温度补偿电路，用于有效地补偿由逻辑电路中包括的开关元件的温度变化导致的开关时序差。 温度补偿电路包括温度检测部分，用于检测与开关元件的温度相对应的值;以及校正部分，用于将从先前电路输入的逻辑信号的电压校正到逻辑电路，以便减小 基于与温度对应的值，由开关元件的温度变化引起的开关时序。

公开(公告)号：US07342407B2

公开(公告)日：2008-03-11

申请号：US11343900

申请日：2006-01-31

申请人： Yuji Kuwana ,  Yoshiharu Umemura ,  Takashi Sekino

发明人： Yuji Kuwana ,  Yoshiharu Umemura ,  Takashi Sekino

IPC分类号： G01R31/26 ,  G06F11/00 ,  H03K17/14

CPC分类号： G01R31/3191 ,  G01R31/2874 ,  H03K17/14 ,  H03K17/30

摘要： A temperature compensation circuit for effectively compensating the difference of a switching timing due to temperature change of a switching element included in a logic circuit is provided. The temperature compensation circuit includes a temperature detecting section for detecting a value corresponding to the temperature of the switching element, and a correction section for correcting the voltage of a logic signal inputted from a previous circuit to the logic circuit in order to reduce the difference of the switching timing due to the temperature change of the switching element based on the value corresponding to the temperature.

摘要翻译： 提供一种温度补偿电路，用于有效地补偿由逻辑电路中包括的开关元件的温度变化导致的开关时序差。 温度补偿电路包括温度检测部分，用于检测与开关元件的温度相对应的值;以及校正部分，用于将从先前电路输入的逻辑信号的电压校正到逻辑电路，以便减小 基于与温度对应的值，由开关元件的温度变化引起的开关时序。

公开(公告)号：US20070099590A1

公开(公告)日：2007-05-03

申请号：US10596790

申请日：2004-12-16

申请人： Hideyuki Okabe ,  Yuji Kuwana ,  Masayuki Kimishima

发明人： Hideyuki Okabe ,  Yuji Kuwana ,  Masayuki Kimishima

IPC分类号： H04B1/26

CPC分类号： H03D7/1408

摘要： The frequency characteristic of a conversion loss is kept generally constant during conversion of a high frequency received signal into an intermediate frequency signal. There is provided a frequency converter including a balanced balun (10) which branches a locally oscillated signal (Lo) into two signals which have the same amplitude and are different from each other in phase by 180 degrees, low-pass filters (12a, 12b) through which the two signals pass, and antiparallel diode pairs (16a, 16b) which respectively mix outputs from the low-pass filters (12a, 12b) with a high frequency received signal (RF) to produce an intermediate frequency signal (IF) The low-pass filters (12a, 12b) exhibit generally constant impedances in the frequency band of the high frequency received signal (RF). Accordingly, the impedances of the anti-parallel diode pairs (16a, 16b) as viewed from an anti-parallel diode connection point (17) are generally constant in the frequency band of the high frequency received signal (RF), with the result that the frequency characteristic of the conversion loss can be kept generally constant.

摘要翻译： 在将高频接收信号转换成中频信号期间，转换损耗的频率特性保持一般恒定。 提供了一种包括平衡不平衡变换器（10）的频率转换器，其将本地振荡信号（Lo）分成两个相位相同振幅和相互相差180度的信号，低通滤波器（12a， 12b）和两个信号通过的反并联二极管对（16a，16b）分别混合来自低通滤波器（12a，12b）的输出与高频接收信号（RF），以产生 中频信号（IF）低通滤波器（12a，12b）在高频接收信号（RF）的频带中呈现大致恒定的阻抗。 因此，从反并联二极管连接点（17）观察的反并联二极管对（16a，16b）的阻抗在高频接收信号（RF）的频带中通常是恒定的，其中 导致转换损耗的频率特性可以保持一般恒定。