公开(公告)号：US07875554B2

公开(公告)日：2011-01-25

申请号：US12044537

申请日：2008-03-07

申请人： Yezdi Dordi ,  John Boyd ,  William Thie ,  Bob Maraschin ,  Fred C. Redeker ,  Joel M. Cook

发明人： Yezdi Dordi ,  John Boyd ,  William Thie ,  Bob Maraschin ,  Fred C. Redeker ,  Joel M. Cook

IPC分类号： H01L21/44

CPC分类号： C23C18/1612 ,  C23C18/14 ,  C23C18/161 ,  C23C18/1619 ,  C23C18/1651 ,  C23C18/1667 ,  C23C18/168 ,  C23C18/31 ,  H01L21/288

摘要： Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer (“wafer”). More specifically, the method and apparatus provide for selective heating of a surface of the wafer exposed to an electroless plating solution. The selective heating is provided by applying radiant energy to the wafer surface. The selective heating of the wafer surface causes a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase at the interface in turn causes a plating reaction to occur at the wafer surface. Thus, material is deposited on the wafer surface through an electroless plating reaction that is initiated and controlled by varying the temperature of the wafer surface using an appropriately defined radiant energy source.

摘要翻译： 概括地说，提供了一种在半导体晶片（“晶片”）上沉积材料的方法和装置。 更具体地，该方法和装置提供了暴露于化学镀溶液的晶片的表面的选择性加热。 通过向晶片表面施加辐射能来提供选择性加热。 晶片表面的选择性加热导致晶片表面和化学镀溶液之间的界面处的温度升高。 界面处的温度升高又导致在晶片表面发生电镀反应。 因此，通过化学镀反应将材料沉积在晶片表面上，该电镀反应通过使用适当限定的辐射能源改变晶片表面的温度来启动和控制。

公开(公告)号：US07358186B2

公开(公告)日：2008-04-15

申请号：US10735216

申请日：2003-12-12

申请人： Yezdi Dordi ,  John Boyd ,  William Thie ,  Bob Maraschin ,  Fred C. Redeker ,  Joel M. Cook

发明人： Yezdi Dordi ,  John Boyd ,  William Thie ,  Bob Maraschin ,  Fred C. Redeker ,  Joel M. Cook

IPC分类号： H01L21/44 ,  B05C5/12

CPC分类号： C23C18/1612 ,  C23C18/14 ,  C23C18/161 ,  C23C18/1619 ,  C23C18/1651 ,  C23C18/1667 ,  C23C18/168 ,  C23C18/31 ,  H01L21/288

摘要： Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer (“wafer”). More specifically, the method and apparatus provide for selective heating of a surface of the wafer exposed to an electroless plating solution. The selective heating is provided by applying radiant energy to the wafer surface. The selective heating of the wafer surface causes a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase at the interface in turn causes a plating reaction to occur at the wafer surface. Thus, material is deposited on the wafer surface through an electroless plating reaction that is initiated and controlled by varying the temperature of the wafer surface using an appropriately defined radiant energy source.

摘要翻译： 概括地说，提供了一种在半导体晶片（“晶片”）上沉积材料的方法和装置。 更具体地，该方法和装置提供了暴露于化学镀溶液的晶片的表面的选择性加热。 通过向晶片表面施加辐射能来提供选择性加热。 晶片表面的选择性加热导致晶片表面和化学镀溶液之间的界面处的温度升高。 界面处的温度升高又导致在晶片表面发生电镀反应。 因此，通过化学镀反应将材料沉积在晶片表面上，该电镀反应通过使用适当限定的辐射能源改变晶片表面的温度来启动和控制。

公开(公告)号：US08490573B2

公开(公告)日：2013-07-23

申请号：US12968114

申请日：2010-12-14

申请人： Yezdi Dordi ,  John Boyd ,  William Thie ,  Bob Maraschin ,  Fred C. Redeker ,  Joel M. Cook

发明人： Yezdi Dordi ,  John Boyd ,  William Thie ,  Bob Maraschin ,  Fred C. Redeker ,  Joel M. Cook

IPC分类号： B05C3/02 ,  B05D1/18

CPC分类号： C23C18/1612 ,  C23C18/14 ,  C23C18/161 ,  C23C18/1619 ,  C23C18/1651 ,  C23C18/1667 ,  C23C18/168 ,  C23C18/31 ,  H01L21/288

摘要： Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer (“wafer”). More specifically, the method and apparatus provide for selective heating of a surface of the wafer exposed to an electroless plating solution. The selective heating is provided by applying radiant energy to the wafer surface. The selective heating of the wafer surface causes a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase at the interface in turn causes a plating reaction to occur at the wafer surface. Thus, material is deposited on the wafer surface through an electroless plating reaction that is initiated and controlled by varying the temperature of the wafer surface using an appropriately defined radiant energy source.

摘要翻译： 概括地说，提供了一种在半导体晶片（“晶片”）上沉积材料的方法和装置。 更具体地，该方法和装置提供了暴露于化学镀溶液的晶片的表面的选择性加热。 通过向晶片表面施加辐射能来提供选择性加热。 晶片表面的选择性加热导致晶片表面和化学镀溶液之间的界面处的温度升高。 界面处的温度升高又导致在晶片表面发生电镀反应。 因此，通过化学镀反应将材料沉积在晶片表面上，该电镀反应通过使用适当限定的辐射能源改变晶片表面的温度来启动和控制。

公开(公告)号：US20080153291A1

公开(公告)日：2008-06-26

申请号：US12044537

申请日：2008-03-07

申请人： Yezdi Dordi ,  John Boyd ,  William Thie ,  Bob Maraschin ,  Fred C. Redeker ,  Joel M. Cook

发明人： Yezdi Dordi ,  John Boyd ,  William Thie ,  Bob Maraschin ,  Fred C. Redeker ,  Joel M. Cook

IPC分类号： H01L21/44 ,  C23C16/00

CPC分类号： C23C18/1612 ,  C23C18/14 ,  C23C18/161 ,  C23C18/1619 ,  C23C18/1651 ,  C23C18/1667 ,  C23C18/168 ,  C23C18/31 ,  H01L21/288

摘要： Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer (“wafer”). More specifically, the method and apparatus provide for selective heating of a surface of the wafer exposed to an electroless plating solution. The selective heating is provided by applying radiant energy to the wafer surface. The selective heating of the wafer surface causes a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase at the interface in turn causes a plating reaction to occur at the wafer surface. Thus, material is deposited on the wafer surface through an electroless plating reaction that is initiated and controlled by varying the temperature of the wafer surface using an appropriately defined radiant energy source.

摘要翻译： 概括地说，提供了一种在半导体晶片（“晶片”）上沉积材料的方法和装置。 更具体地，该方法和装置提供了暴露于化学镀溶液的晶片的表面的选择性加热。 通过向晶片表面施加辐射能来提供选择性加热。 晶片表面的选择性加热导致晶片表面和化学镀溶液之间的界面处的温度升高。 界面处的温度升高又导致在晶片表面发生电镀反应。 因此，通过化学镀反应将材料沉积在晶片表面上，该电镀反应通过使用适当限定的辐射能源改变晶片表面的温度来启动和控制。

公开(公告)号：US20110081779A1

公开(公告)日：2011-04-07

申请号：US12968114

申请日：2010-12-14

申请人： Yezdi Dordi ,  John Boyd ,  William Thie ,  Bob Maraschin ,  Fred C. Redeker ,  Joel M. Cook

发明人： Yezdi Dordi ,  John Boyd ,  William Thie ,  Bob Maraschin ,  Fred C. Redeker ,  Joel M. Cook

IPC分类号： H01L21/445

CPC分类号： C23C18/1612 ,  C23C18/14 ,  C23C18/161 ,  C23C18/1619 ,  C23C18/1651 ,  C23C18/1667 ,  C23C18/168 ,  C23C18/31 ,  H01L21/288

摘要： Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer (“wafer”). More specifically, the method and apparatus provide for selective heating of a surface of the wafer exposed to an electroless plating solution. The selective heating is provided by applying radiant energy to the wafer surface. The selective heating of the wafer surface causes a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase at the interface in turn causes a plating reaction to occur at the wafer surface. Thus, material is deposited on the wafer surface through an electroless plating reaction that is initiated and controlled by varying the temperature of the wafer surface using an appropriately defined radiant energy source.

摘要翻译： 概括地说，提供了一种在半导体晶片（“晶片”）上沉积材料的方法和装置。 更具体地，该方法和装置提供了暴露于化学镀溶液的晶片的表面的选择性加热。 通过向晶片表面施加辐射能来提供选择性加热。 晶片表面的选择性加热导致晶片表面和化学镀溶液之间的界面处的温度升高。 界面处的温度升高又导致在晶片表面发生电镀反应。 因此，通过化学镀反应将材料沉积在晶片表面上，该电镀反应通过使用适当限定的辐射能源改变晶片表面的温度来启动和控制。

公开(公告)号：US07368017B2

公开(公告)日：2008-05-06

申请号：US10734704

申请日：2003-12-12

申请人： Fred C. Redeker ,  John Boyd ,  Yezdi Dordi ,  William Thie ,  Bob Maraschin

发明人： Fred C. Redeker ,  John Boyd ,  Yezdi Dordi ,  William Thie ,  Bob Maraschin

IPC分类号： B05C3/02

CPC分类号： H01L21/7684 ,  C23C18/06 ,  C23C18/1216 ,  C23C18/1225 ,  C23C18/1291 ,  C23C18/14 ,  H01L21/288

摘要： Broadly speaking, the present invention provides a method and an apparatus for planarizing a semiconductor wafer (“wafer”). More specifically, the present invention provides for depositing a planarizing layer over the wafer, wherein the planarizing layer serves to fill recessed areas present on a surface of the wafer. A planar member is positioned over and proximate to a top surface of the wafer. Positioning of the planar member serves to entrap electroless plating solution between the planar member and the wafer surface. Radiant energy is applied to the wafer surface to cause a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase in turn causes plating reactions to occur at the wafer surface. Material deposited through the plating reactions forms a planarizing layer that conforms to a planarity of the planar member.

摘要翻译： 广义而言，本发明提供了一种用于平面化半导体晶片（“晶片”）的方法和装置。 更具体地，本发明提供了在晶片上沉积平坦化层，其中平坦化层用于填充存在于晶片表面上的凹陷区域。 平面构件定位在晶片的顶表面上方并靠近晶片的顶表面。 平面构件的定位用于在平面构件和晶片表面之间夹带化学镀溶液。 辐射能量被施加到晶片表面以在晶片表面和化学镀溶液之间的界面处引起温度升高。 温度升高又会导致电镀反应发生在晶片表面。 通过电镀反应沉积的材料形成符合平面构件平坦度的平坦化层。

公开(公告)号：US07582565B2

公开(公告)日：2009-09-01

申请号：US12054311

申请日：2008-03-24

申请人： Fred C. Redeker ,  John Boyd ,  Yezdi Dordi ,  William Thie ,  Bob Maraschin

发明人： Fred C. Redeker ,  John Boyd ,  Yezdi Dordi ,  William Thie ,  Bob Maraschin

IPC分类号： H01L21/461 ,  H01L21/302 ,  H01L21/769 ,  B05C3/02

CPC分类号： H01L21/7684 ,  C23C18/06 ,  C23C18/1216 ,  C23C18/1225 ,  C23C18/1291 ,  C23C18/14 ,  H01L21/288

摘要： Broadly speaking, the present invention provides a method and an apparatus for planarizing a semiconductor wafer (“wafer”). More specifically, the present invention provides for depositing a planarizing layer over the wafer, wherein the planarizing layer serves to fill recessed areas present on a surface of the wafer. A planar member is positioned over and proximate to a top surface of the wafer. Positioning of the planar member serves to entrap electroless plating solution between the planar member and the wafer surface. Radiant energy is applied to the wafer surface to cause a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase in turn causes plating reactions to occur at the wafer surface. Material deposited through the plating reactions forms a planarizing layer that conforms to a planarity of the planar member.

摘要翻译： 广义而言，本发明提供了一种用于平面化半导体晶片（“晶片”）的方法和装置。 更具体地，本发明提供了在晶片上沉积平坦化层，其中平坦化层用于填充存在于晶片表面上的凹陷区域。 平面构件定位在晶片的顶表面上方并靠近晶片的顶表面。 平面构件的定位用于在平面构件和晶片表面之间夹带化学镀溶液。 辐射能量被施加到晶片表面以在晶片表面和化学镀溶液之间的界面处引起温度升高。 温度升高又会导致电镀反应发生在晶片表面。 通过电镀反应沉积的材料形成符合平面构件平坦度的平坦化层。

公开(公告)号：US20080166885A1

公开(公告)日：2008-07-10

申请号：US12054311

申请日：2008-03-24

申请人： Fred C. Redeker ,  John Boyd ,  Yezdi Dordi ,  William Thie ,  Bob Maraschin

发明人： Fred C. Redeker ,  John Boyd ,  Yezdi Dordi ,  William Thie ,  Bob Maraschin

IPC分类号： H01L21/31

CPC分类号： H01L21/7684 ,  C23C18/06 ,  C23C18/1216 ,  C23C18/1225 ,  C23C18/1291 ,  C23C18/14 ,  H01L21/288

摘要： Broadly speaking, the present invention provides a method and an apparatus for planarizing a semiconductor wafer (“wafer”). More specifically, the present invention provides for depositing a planarizing layer over the wafer, wherein the planarizing layer serves to fill recessed areas present on a surface of the wafer. A planar member is positioned over and proximate to a top surface of the wafer. Positioning of the planar member serves to entrap electroless plating solution between the planar member and the wafer surface. Radiant energy is applied to the wafer surface to cause a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase in turn causes plating reactions to occur at the wafer surface. Material deposited through the plating reactions forms a planarizing layer that conforms to a planarity of the planar member.

摘要翻译： 广义而言，本发明提供了一种用于平面化半导体晶片（“晶片”）的方法和装置。 更具体地，本发明提供了在晶片上沉积平坦化层，其中平坦化层用于填充存在于晶片表面上的凹陷区域。 平面构件定位在晶片的顶表面上方并靠近晶片的顶表面。 平面构件的定位用于在平面构件和晶片表面之间夹带化学镀溶液。 辐射能量被施加到晶片表面以在晶片表面和化学镀溶液之间的界面处引起温度升高。 温度升高又会导致电镀反应发生在晶片表面。 通过电镀反应沉积的材料形成符合平面构件平坦度的平坦化层。

公开(公告)号：US08048283B2

公开(公告)日：2011-11-01

申请号：US12724379

申请日：2010-03-15

申请人： Yezdi Dordi ,  Bob Maraschin ,  John Boyd ,  Fred C. Redeker ,  Carl Woods

发明人： Yezdi Dordi ,  Bob Maraschin ,  John Boyd ,  Fred C. Redeker ,  Carl Woods

IPC分类号： C25D5/02

CPC分类号： C25D17/14 ,  C25D5/06 ,  C25D7/123 ,  C25D17/001 ,  C25D17/12 ,  H01L21/2885

摘要： First and second electrodes are disposed at first and second locations, respectively, proximate to a periphery of a wafer support, wherein the first and second location are substantially opposed to each other relative to the wafer support. Each of the first and second electrodes can be moved to electrically connect with and disconnect from a wafer held by the wafer support. An anode is disposed over and proximate to the wafer such that a meniscus of electroplating solution is maintained between the anode and the wafer. As the anode moves over the wafer from the first location to the second location, an electric current is applied through the meniscus between the anode and the wafer. Also, as the anode is moved over the wafer, the first and second electrodes are controlled to connect with the wafer while ensuring that the anode does not pass over an electrode that is connected.

摘要翻译： 第一和第二电极分别设置在靠近晶片支撑件的周边的第一和第二位置处，其中第一和第二位置相对于晶片支撑件彼此基本相对。 可以使第一和第二电极中的每一个移动以与由晶片支撑件保持的晶片电连接和断开。 阳极设置在晶片上方并且靠近晶片，使得电镀溶液的弯液面保持在阳极和晶片之间。 当阳极从晶片从第一位置移动到第二位置时，通过阳极和晶片之间的弯液面施加电流。 此外，当阳极移动到晶片上时，第一和第二电极被控制以与晶片连接，同时确保阳极不通过连接的电极。

公开(公告)号：US07563348B2

公开(公告)日：2009-07-21

申请号：US10879396

申请日：2004-06-28

申请人： Yezdi Dordi ,  Bob Maraschin ,  John Boyd ,  Fred C. Redeker

发明人： Yezdi Dordi ,  Bob Maraschin ,  John Boyd ,  Fred C. Redeker

IPC分类号： C25D17/00

CPC分类号： C25D5/026 ,  C25D5/02 ,  C25D5/06 ,  C25D17/14

摘要： An electroplating head including a chamber having a fluid entrance and a fluid exit is provided. The chamber is configured to contain a flow of electroplating solution from the fluid entrance to the fluid exit. The electroplating head also includes an anode disposed within the chamber. The anode is configured to be electrically connected to a power supply. The electroplating head further includes a porous resistive material disposed at the fluid exit such that the flow of electroplating solution is required to traverse through the porous resistive material.

摘要翻译： 提供一种包括具有流体入口和流体出口的室的电镀头。 腔室被配置成包含从流体入口到流体出口的电镀溶液流。 电镀头还包括设置在室内的阳极。 阳极被配置为电连接到电源。 电镀头还包括设置在流体出口处的多孔电阻材料，使得电镀溶液的流动需要穿过多孔电阻材料。