公开(公告)号：US20060228847A1

公开(公告)日：2006-10-12

申请号：US10907342

申请日：2005-03-30

申请人： Yi-Cheng Liu ,  Wen-Chi Chen ,  Tzu-Yun Chang ,  Bang-Chiang Lan ,  Cheng-Tung Huang ,  Wei-Tsun Shiau ,  Kuan-Yang Liao

发明人： Yi-Cheng Liu ,  Wen-Chi Chen ,  Tzu-Yun Chang ,  Bang-Chiang Lan ,  Cheng-Tung Huang ,  Wei-Tsun Shiau ,  Kuan-Yang Liao

IPC分类号： H01L21/8238 ,  H01L21/336

CPC分类号： H01L21/823864 ,  H01L21/823807 ,  H01L21/823814

摘要： First, a substrate having a plurality of NMOS transistor regions and PMOS transistor regions is provided. The substrate further includes a plurality of gate structures respectively positioned in the NMOS transistor regions and the PMOS transistor regions. A high-tensile thin film is then formed on the substrate and the plurality of gate structures. Subsequently, an annealing process is performed, and the high-tensile thin film is removed after the annealing process.

摘要翻译： 首先，提供具有多个NMOS晶体管区域和PMOS晶体管区域的衬底。 衬底还包括分别位于NMOS晶体管区域和PMOS晶体管区域中的多个栅极结构。 然后在基板和多个栅极结构上形成高拉伸薄膜。 随后，进行退火处理，并且在退火处理之后去除高拉伸薄膜。

公开(公告)号：US07135365B2

公开(公告)日：2006-11-14

申请号：US10907342

申请日：2005-03-30

申请人： Yi-Cheng Liu ,  Wen-Chi Chen ,  Tzu-Yun Chang ,  Bang-Chiang Lan ,  Cheng-Tung Huang ,  Wei-Tsun Shiau ,  Kuan-Yang Liao

发明人： Yi-Cheng Liu ,  Wen-Chi Chen ,  Tzu-Yun Chang ,  Bang-Chiang Lan ,  Cheng-Tung Huang ,  Wei-Tsun Shiau ,  Kuan-Yang Liao

IPC分类号： H01L21/8238 ,  H01L21/336

CPC分类号： H01L21/823864 ,  H01L21/823807 ,  H01L21/823814

摘要： First, a substrate having a plurality of NMOS transistor regions and PMOS transistor regions is provided. The substrate further includes a plurality of gate structures respectively positioned in the NMOS transistor regions and the PMOS transistor regions. A high-tensile thin film is then formed on the substrate and the plurality of gate structures. Subsequently, an annealing process is performed, and the high-tensile thin film is removed after the annealing process.

摘要翻译： 首先，提供具有多个NMOS晶体管区域和PMOS晶体管区域的衬底。 衬底还包括分别位于NMOS晶体管区域和PMOS晶体管区域中的多个栅极结构。 然后在基板和多个栅极结构上形成高拉伸薄膜。 随后，进行退火处理，并且在退火处理之后去除高拉伸薄膜。

公开(公告)号：US07326622B2

公开(公告)日：2008-02-05

申请号：US11164031

申请日：2005-11-08

申请人： Yi-Cheng Liu ,  Jiunn-Ren Hwang ,  Wei-Tsun Shiau ,  Cheng-Tung Huang ,  Kuan-Yang Liao

发明人： Yi-Cheng Liu ,  Jiunn-Ren Hwang ,  Wei-Tsun Shiau ,  Cheng-Tung Huang ,  Kuan-Yang Liao

IPC分类号： H01L21/336

CPC分类号： H01L29/7843 ,  H01L21/265 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A method of manufacturing a metal-oxide-semiconductor (MOS) transistor device is disclosed. A semiconductor substrate having a main surface is prepared. A gate dielectric layer is formed on the main surface. A gate electrode is patterned on the gate dielectric layer. The gate electrode has vertical sidewalls and a top surface. A liner is formed on the vertical sidewalls of the gate electrode. A silicon nitride spacer is formed on the liner. The main surface is then ion implanted using the gate electrode and the silicon nitride spacer as an implantation mask, thereby forming a source/drain region of the MOS transistor device in the main surface. The silicon nitride spacer is removed. A silicon nitride cap layer that borders the liner is deposited. The silicon nitride cap layer has a specific stress status.

摘要翻译： 公开了一种制造金属氧化物半导体（MOS）晶体管器件的方法。 制备具有主表面的半导体衬底。 在主表面上形成栅介质层。 在栅极电介质层上形成栅电极。 栅电极具有垂直侧壁和顶表面。 衬套形成在栅电极的垂直侧壁上。 在衬套上形成氮化硅衬垫。 然后使用栅电极和氮化硅间隔物作为注入掩模离子注入主表面，从而在主表面形成MOS晶体管器件的源/漏区。 去除氮化硅间隔物。 与衬垫相邻的氮化硅覆盖层被沉积。 氮化硅盖层具有特定的应力状态。

公开(公告)号：US20060094195A1

公开(公告)日：2006-05-04

申请号：US11164031

申请日：2005-11-08

申请人： Yi-Cheng Liu ,  Jiunn-Ren Hwang ,  Wei-Tsun Shiau ,  Cheng-Tung Huang ,  Kuan-Yang Liao

发明人： Yi-Cheng Liu ,  Jiunn-Ren Hwang ,  Wei-Tsun Shiau ,  Cheng-Tung Huang ,  Kuan-Yang Liao

IPC分类号： H01L21/336

CPC分类号： H01L29/7843 ,  H01L21/265 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A method of manufacturing a metal-oxide-semiconductor (MOS) transistor device is disclosed. A semiconductor substrate having a main surface is prepared. A gate dielectric layer is formed on the main surface. A gate electrode is patterned on the gate dielectric layer. The gate electrode has vertical sidewalls and a top surface. A liner is formed on the vertical sidewalls of the gate electrode. A silicon nitride spacer is formed on the liner. The main surface is then ion implanted using the gate electrode and the silicon nitride spacer as an implantation mask, thereby forming a source/drain region of the MOS transistor device in the main surface. The silicon nitride spacer is removed. A silicon nitride cap layer that borders the liner is deposited. The silicon nitride cap layer has a specific stress status.

摘要翻译： 公开了一种制造金属氧化物半导体（MOS）晶体管器件的方法。 制备具有主表面的半导体衬底。 在主表面上形成栅介质层。 在栅极电介质层上形成栅电极。 栅电极具有垂直侧壁和顶表面。 衬套形成在栅电极的垂直侧壁上。 在衬套上形成氮化硅衬垫。 然后使用栅电极和氮化硅间隔物作为注入掩模离子注入主表面，从而在主表面形成MOS晶体管器件的源/漏区。 去除氮化硅间隔物。 与衬垫相邻的氮化硅覆盖层被沉积。 氮化硅盖层具有特定的应力状态。

公开(公告)号：US20060099763A1

公开(公告)日：2006-05-11

申请号：US10904210

申请日：2004-10-28

申请人： Yi-Cheng Liu ,  Jiunn-Ren Hwang ,  Wei-Tsun Shiau ,  Cheng-Tung Huang ,  Kuan-Yang Liao

发明人： Yi-Cheng Liu ,  Jiunn-Ren Hwang ,  Wei-Tsun Shiau ,  Cheng-Tung Huang ,  Kuan-Yang Liao

IPC分类号： H01L21/336

CPC分类号： H01L29/7843 ,  H01L21/265 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A method of manufacturing a metal-oxide-semiconductor (MOS) transistor device is disclosed. A semiconductor substrate having a main surface is prepared. A gate dielectric layer is formed on the main surface. A gate electrode is patterned on the gate dielectric layer. The gate electrode has vertical sidewalls and a top surface. A liner is formed on the vertical sidewalls of the gate electrode. A silicon nitride spacer is formed on the liner. The main surface is then ion implanted using the gate electrode and the silicon nitride spacer as an implantation mask, thereby forming a source/drain region of the MOS transistor device in the main surface. The silicon nitride spacer is removed. A silicon nitride cap layer that borders the liner is deposited. The silicon nitride cap layer has a specific stress status.

公开(公告)号：US20090068810A1

公开(公告)日：2009-03-12

申请号：US12273517

申请日：2008-11-18

申请人： Chen-Hua Tsai ,  Bang-Chiang Lan ,  Yu-Hsin Lin ,  Yi-Cheng Liu ,  Cheng-Tzung Tsai

发明人： Chen-Hua Tsai ,  Bang-Chiang Lan ,  Yu-Hsin Lin ,  Yi-Cheng Liu ,  Cheng-Tzung Tsai

IPC分类号： H01L21/336

CPC分类号： H01L29/7848 ,  H01L21/823807 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7834 ,  Y10S438/931 ,  Y10S438/933 ,  Y10S438/938

摘要： A method of fabrication of a metal oxide semiconductor field effect transistor includes first providing a substrate on which a gate structure is formed. Afterwards, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a number of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.

摘要翻译： 制造金属氧化物半导体场效应晶体管的方法包括首先提供其上形成有栅极结构的衬底。 之后，去除衬底的一部分以在栅极结构的两端形成衬底中的第一凹槽。 另外，源极/漏极延伸层沉积在第一凹槽中，并且在栅极结构的两端形成多个间隔物。 随后，去除源极/漏极延伸部分和衬底的一部分以在源极/漏极延伸部中形成第二凹部，并且在衬垫的外部形成衬底的一部分。 另外，源极/漏极层沉积在第二凹部中。 由于源极/漏极延伸部和源极/漏极层具有特定的材料和结构，因此提高了沟道效应，提高了金属氧化物半导体场效应晶体管的效率。

公开(公告)号：US20120199849A1

公开(公告)日：2012-08-09

申请号：US13446124

申请日：2012-04-13

申请人： Chen-Hua Tsai ,  Bang-Chiang Lan ,  Yu-Hsin Lin ,  Yi-Cheng Liu ,  Cheng-Tzung Tsai

发明人： Chen-Hua Tsai ,  Bang-Chiang Lan ,  Yu-Hsin Lin ,  Yi-Cheng Liu ,  Cheng-Tzung Tsai

IPC分类号： H01L29/161 ,  H01L29/772

CPC分类号： H01L29/7848 ,  H01L21/823807 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7834 ,  Y10S438/931 ,  Y10S438/933 ,  Y10S438/938

摘要： A method of fabrication of a metal oxide semiconductor field effect transistor includes first providing a substrate on which a gate structure is formed. Afterwards, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a number of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.

摘要翻译： 制造金属氧化物半导体场效应晶体管的方法包括首先提供其上形成有栅极结构的衬底。 之后，去除衬底的一部分以在栅极结构的两端形成衬底中的第一凹槽。 另外，源极/漏极延伸层沉积在第一凹槽中，并且在栅极结构的两端形成多个间隔物。 随后，去除源极/漏极延伸部分和衬底的一部分以在源极/漏极延伸部中形成第二凹部，并且在衬垫的外部形成衬底的一部分。 另外，源极/漏极层沉积在第二凹部中。 由于源极/漏极延伸部和源极/漏极层具有特定的材料和结构，因此提高了沟道效应，提高了金属氧化物半导体场效应晶体管的效率。

公开(公告)号：US08207523B2

公开(公告)日：2012-06-26

申请号：US11308718

申请日：2006-04-26

申请人： Chen-Hua Tsai ,  Bang-Chiang Lan ,  Yu-Hsin Lin ,  Yi-Cheng Liu ,  Cheng-Tzung Tsai

发明人： Chen-Hua Tsai ,  Bang-Chiang Lan ,  Yu-Hsin Lin ,  Yi-Cheng Liu ,  Cheng-Tzung Tsai

IPC分类号： H01L29/06 ,  H01L31/00

CPC分类号： H01L29/7848 ,  H01L21/823807 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7834 ,  Y10S438/931 ,  Y10S438/933 ,  Y10S438/938

摘要： A method of fabrication of a metal oxide semiconductor field effect transistor is disclosed. At first, a substrate on which a gate structure is formed is provided. Afterward, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a plurality of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.

摘要翻译： 公开了一种制造金属氧化物半导体场效应晶体管的方法。 首先，设置形成有栅极结构的基板。 之后，去除衬底的一部分以在栅极结构的两端形成衬底中的第一凹部。 此外，源极/漏极延伸层沉积在第一凹槽中，并且在栅极结构的两端形成多个间隔物。 随后，去除源极/漏极延伸部分和衬底的一部分以在源极/漏极延伸部中形成第二凹部，并且在衬垫的外部形成衬底的一部分。 另外，源极/漏极层沉积在第二凹部中。 由于源极/漏极延伸部和源极/漏极层具有特定的材料和结构，因此提高了沟道效应，提高了金属氧化物半导体场效应晶体管的效率。

公开(公告)号：US20070254421A1

公开(公告)日：2007-11-01

申请号：US11308718

申请日：2006-04-26

申请人： Chen-Hua Tsai ,  Bang-Chiang Lan ,  Yu-Hsin Lin ,  Yi-Cheng Liu ,  Cheng-Tzung Tsai

发明人： Chen-Hua Tsai ,  Bang-Chiang Lan ,  Yu-Hsin Lin ,  Yi-Cheng Liu ,  Cheng-Tzung Tsai

IPC分类号： H01L21/8234 ,  H01L21/336

CPC分类号： H01L29/7848 ,  H01L21/823807 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7834 ,  Y10S438/931 ,  Y10S438/933 ,  Y10S438/938

摘要： A method of fabrication of a metal oxide semiconductor field effect transistor is disclosed. At first, a substrate on which a gate structure is formed is provided. Afterward, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a plurality of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.

摘要翻译： 公开了一种制造金属氧化物半导体场效应晶体管的方法。 首先，设置形成有栅极结构的基板。 之后，去除衬底的一部分以在栅极结构的两端形成衬底中的第一凹部。 此外，源极/漏极延伸层沉积在第一凹槽中，并且在栅极结构的两端形成多个间隔物。 随后，去除源极/漏极延伸部分和衬底的一部分以在源极/漏极延伸部中形成第二凹部，并且在衬垫的外部形成衬底的一部分。 另外，源极/漏极层沉积在第二凹部中。 由于源极/漏极延伸部和源极/漏极层具有特定的材料和结构，因此提高了沟道效应，提高了金属氧化物半导体场效应晶体管的效率。

公开(公告)号：US08058133B2

公开(公告)日：2011-11-15

申请号：US12273517

申请日：2008-11-18

申请人： Chen-Hua Tsai ,  Bang-Chiang Lan ,  Yu-Hsin Lin ,  Yi-Cheng Liu ,  Cheng-Tzung Tsai

发明人： Chen-Hua Tsai ,  Bang-Chiang Lan ,  Yu-Hsin Lin ,  Yi-Cheng Liu ,  Cheng-Tzung Tsai

IPC分类号： H01L21/336

CPC分类号： H01L29/7848 ,  H01L21/823807 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7834 ,  Y10S438/931 ,  Y10S438/933 ,  Y10S438/938

摘要： A method of fabrication of a metal oxide semiconductor field effect transistor includes first providing a substrate on which a gate structure is formed. Afterwards, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a number of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.

摘要翻译： 制造金属氧化物半导体场效应晶体管的方法包括首先提供其上形成有栅极结构的衬底。 之后，去除衬底的一部分以在栅极结构的两端形成衬底中的第一凹槽。 另外，源极/漏极延伸层沉积在第一凹槽中，并且在栅极结构的两端形成多个间隔物。 随后，去除源极/漏极延伸部分和衬底的一部分以在源极/漏极延伸部中形成第二凹部，并且在衬垫的外部形成衬底的一部分。 另外，源极/漏极层沉积在第二凹部中。 由于源极/漏极延伸部和源极/漏极层具有特定的材料和结构，因此提高了沟道效应，提高了金属氧化物半导体场效应晶体管的效率。