Efficient data storage in multi-plane memory devices
    1.
    发明授权
    Efficient data storage in multi-plane memory devices 有权
    在多平面存储设备中高效的数据存储

    公开(公告)号:US08456905B2

    公开(公告)日:2013-06-04

    申请号:US12332370

    申请日:2008-12-11

    IPC分类号: G11C11/34

    摘要: A method for data storage includes initially storing a sequence of data pages in a memory that includes multiple memory arrays, such that successive data pages in the sequence are stored in alternation in a first number of the memory arrays. The initially-stored data pages are rearranged in the memory so as to store the successive data pages in the sequence in a second number of the memory arrays, which is less than the first number. The rearranged data pages are read from the second number of the memory arrays.

    摘要翻译: 一种用于数据存储的方法包括:首先将数据页序列存储在包括多个存储器阵列的存储器中,使得序列中的连续数据页被交替地存储在第一数量的存储器阵列中。 将初始存储的数据页重新排列在存储器中,以便将序列中的连续数据页存储在小于第一数量的第二数量的存储器阵列中。 从第二数量的存储器阵列中读取重新排列的数据页。

    EFFICIENT DATA STORAGE IN MULTI-PLANE MEMORY DEVICES
    2.
    发明申请
    EFFICIENT DATA STORAGE IN MULTI-PLANE MEMORY DEVICES 有权
    多平面存储器件中的有效数据存储

    公开(公告)号:US20090157964A1

    公开(公告)日:2009-06-18

    申请号:US12332370

    申请日:2008-12-11

    IPC分类号: G06F12/02 G06F12/08

    摘要: A method for data storage includes initially storing a sequence of data pages in a memory that includes multiple memory arrays, such that successive data pages in the sequence are stored in alternation in a first number of the memory arrays. The initially-stored data pages are rearranged in the memory so as to store the successive data pages in the sequence in a second number of the memory arrays, which is less than the first number. The rearranged data pages are read from the second number of the memory arrays.

    摘要翻译: 一种用于数据存储的方法包括:首先将数据页序列存储在包括多个存储器阵列的存储器中,使得序列中的连续数据页被交替地存储在第一数量的存储器阵列中。 将初始存储的数据页重新排列在存储器中,以便将序列中的连续数据页存储在小于第一数量的第二数量的存储器阵列中。 从第二数量的存储器阵列中读取重新排列的数据页。

    Programming and erasure schemes for analog memory cells
    3.
    发明授权
    Programming and erasure schemes for analog memory cells 有权
    模拟存储单元的编程和擦除方案

    公开(公告)号:US09293194B2

    公开(公告)日:2016-03-22

    申请号:US13471484

    申请日:2012-05-15

    摘要: A method for data storage, in a memory that includes multiple analog memory cells, includes setting a parameter of an iterative process applied to a group of the memory cells based on one or more data values stored in at least one of the memory cells in the memory. The iterative process is performed in the group of the memory cells in accordance with the set parameter.

    摘要翻译: 一种用于在包括多个模拟存储器单元的存储器中的数据存储的方法,包括基于存储在存储器单元中的至少一个存储器单元中的一个或多个数据值来设置应用于一组存储器单元的迭代过程的参数 记忆。 根据设定的参数在存储单元组中执行迭代处理。

    WEAR LEVEL ESTIMATION IN ANALOG MEMORY CELLS
    4.
    发明申请
    WEAR LEVEL ESTIMATION IN ANALOG MEMORY CELLS 有权
    在模拟记忆细胞中磨损水平估计

    公开(公告)号:US20090168524A1

    公开(公告)日:2009-07-02

    申请号:US12344233

    申请日:2008-12-25

    IPC分类号: G11C16/04 G11C16/06

    摘要: A method for operating a memory includes applying at least one pulse to a group of analog memory cells, so as to cause the memory cells in the group to assume respective storage values. After applying the pulse, the respective storage values are read from the memory cells in the group. One or more statistical properties of the read storage values are computed. A wear level of the group of the memory cells is estimated responsively to the statistical properties.

    摘要翻译: 一种用于操作存储器的方法包括将至少一个脉冲施加到一组模拟存储器单元,以便使该组中的存储器单元呈现相应的存储值。 在应用脉冲之后,从组中的存储器单元读取相应的存储值。 计算读取存储值的一个或多个统计属性。 响应于统计属性来估计存储器单元组的磨损水平。

    PROGRAMMING AND ERASURE SCHEMES FOR ANALOG MEMORY CELLS
    5.
    发明申请
    PROGRAMMING AND ERASURE SCHEMES FOR ANALOG MEMORY CELLS 有权
    模拟记忆细胞的编程和擦除方案

    公开(公告)号:US20120224423A1

    公开(公告)日:2012-09-06

    申请号:US13471484

    申请日:2012-05-15

    IPC分类号: G11C16/04

    摘要: A method for data storage, in a memory that includes multiple analog memory cells, includes setting a parameter of an iterative process applied to a group of the memory cells based on one or more data values stored in at least one of the memory cells in the memory. The iterative process is performed in the group of the memory cells in accordance with the set parameter.

    摘要翻译: 一种用于在包括多个模拟存储器单元的存储器中的数据存储的方法,包括基于存储在存储器单元中的至少一个存储器单元中的一个或多个数据值来设置应用于一组存储器单元的迭代过程的参数 记忆。 根据设定的参数在存储单元组中执行迭代处理。

    ENHANCED PROGRAMMING AND ERASURE SCHEMES FOR ANALOG MEMORY CELLS
    6.
    发明申请
    ENHANCED PROGRAMMING AND ERASURE SCHEMES FOR ANALOG MEMORY CELLS 有权
    增强模拟记忆细胞的编程和擦除方案

    公开(公告)号:US20120224404A1

    公开(公告)日:2012-09-06

    申请号:US13471483

    申请日:2012-05-15

    IPC分类号: G11C27/00

    摘要: A method for data storage includes setting a group of analog memory cells to respective analog values by performing an iterative process that applies a sequence of pulses to the memory cells in the group. During the iterative process, a progress of the iterative process is assessed, and a parameter of the iterative process is modified responsively to the assessed progress. The iterative process is continued in accordance with the modified parameter.

    摘要翻译: 一种用于数据存储的方法包括:通过执行向组中的存储器单元应用脉冲序列的迭代过程来将一组模拟存储器单元设置为相应的模拟值。 在迭代过程中,评估迭代过程的进展,并根据评估的进度来修改迭代过程的参数。 根据修改的参数继续迭代过程。

    Enhanced programming and erasure schemes for analog memory cells
    7.
    发明授权
    Enhanced programming and erasure schemes for analog memory cells 有权
    增强的模拟存储单元的编程和擦除方案

    公开(公告)号:US08649200B2

    公开(公告)日:2014-02-11

    申请号:US13471483

    申请日:2012-05-15

    IPC分类号: G11C27/00

    摘要: A method for data storage includes setting a group of analog memory cells to respective analog values by performing an iterative process that applies a sequence of pulses to the memory cells in the group. During the iterative process, a progress of the iterative process is assessed, and a parameter of the iterative process is modified responsively to the assessed progress. The iterative process is continued in accordance with the modified parameter.

    摘要翻译: 一种用于数据存储的方法包括:通过执行向组中的存储器单元应用脉冲序列的迭代过程来将一组模拟存储器单元设置为相应的模拟值。 在迭代过程中,评估迭代过程的进展,并根据评估的进度来修改迭代过程的参数。 根据修改的参数继续迭代过程。

    MEMORY DEVICE WITH ADAPTIVE CAPACITY
    8.
    发明申请
    MEMORY DEVICE WITH ADAPTIVE CAPACITY 有权
    具有适应能力的存储器件

    公开(公告)号:US20100157641A1

    公开(公告)日:2010-06-24

    申请号:US12063544

    申请日:2007-05-10

    IPC分类号: G11C27/00 G11C8/00 G11C7/00

    摘要: A method for data storage in a memory (28) that includes a plurality of analog memory cells (32) includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.

    摘要翻译: 一种用于在包括多个模拟存储器单元(32)的存储器(28)中的数据存储的方法包括估计模拟存储器单元的各个可实现的存储容量。 根据估计的可实现的容量,为存储器单元分配相应的存储配置,其定义要存储在存储器单元中的数据量。 数据根据相应的分配的存储配置存储在存储器单元中。 在存储器已经安装在主机系统中并用于在主机系统中存储数据之后,重新估计模拟存储器单元的可实现的存储容量。 存储配置根据重新估计的可实现容量进行修改。

    Data storage with incremental redundancy
    10.
    发明授权
    Data storage with incremental redundancy 有权
    具有增量冗余的数据存储

    公开(公告)号:US08234545B2

    公开(公告)日:2012-07-31

    申请号:US12119069

    申请日:2008-05-12

    IPC分类号: G06F11/00

    CPC分类号: G06F11/1068 G11C2029/0411

    摘要: A method for operating a memory includes encoding input data with an Error Correction Code (ECC) to produce input encoded data including first and second sections, such that the ECC is decodable based on the first section at a first redundancy, and based on both the first and the second sections at a second redundancy that is higher than the first redundancy.Output encoded data is read and a condition is evaluated. The input data is reconstructed using a decoding level selected, responsively to the condition, from a first level, at which a first part of the output encoded data corresponding to the first section is processed to decode the ECC at the first redundancy, and a second level, at which the first part and a second part of the output encoded data corresponding to the second section are processed jointly to decode the ECC at the second redundancy.

    摘要翻译: 一种用于操作存储器的方法包括用错误校正码(ECC)对输入数据进行编码以产生包括第一和第二部分的输入编码数据,使得基于第一冗余部分的第一部分可以解码ECC,并且基于两者 第一和第二部分具有高于第一冗余的第二冗余。 读取输出编码数据并评估条件。 输入数据使用从第一级别选择的解码级别来重构,在第一级别处理对应于第一部分的输出编码数据的第一部分被处理以在第一冗余处解码ECC,以及第二级 级别,其中对应于第二部分的输出编码数据的第一部分和第二部分共同处理,以在第二冗余处对ECC进行解码。