公开(公告)号：US5365112A

公开(公告)日：1994-11-15

申请号：US959644

申请日：1992-10-13

申请人： Yoichi Ohshima

发明人： Yoichi Ohshima

IPC分类号： H01L21/28 ,  H01L21/60 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L21/31 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/48 ,  H01L2224/02126 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14

摘要： A contact plug formed in a contact hole formed in a boron-containing BPSG insulating film, and a pad bed formed under a bonding pad portion of a wiring are formed of a three-layered polysilicon film, thus reducing the number of fabrication steps. A protective film may be provided on the pad bed. This structure facilitates the formation of the pad bed and protects the pad bed that prevents film shearing at the bonding pad portion, thereby improving the adhesion to the insulating film.

摘要翻译： 形成在形成于含硼BPSG绝缘膜中的接触孔中的接触插塞和形成在布线的接合焊盘部分下方的垫床由三层多晶硅膜形成，从而减少了制造步骤的数量。 可以在垫床上设置保护膜。 这种结构便于形成垫床，并且保护垫板免于在接合焊盘部分处的膜剪切，从而提高对绝缘膜的粘合性。

公开(公告)号：US5194929A

公开(公告)日：1993-03-16

申请号：US837087

申请日：1992-02-10

申请人： Yoichi Ohshima ,  Masaki Sato

发明人： Yoichi Ohshima ,  Masaki Sato

IPC分类号： H01L21/8247 ,  H01L29/788 ,  H01L29/792 ,  H01L29/68 ,  H01L23/48 ,  H01L29/06 ,  H01L29/78

CPC分类号： H01L27/11521 ,  H01L29/7885

摘要： In a semiconductor integrated circuit comprising an array of memory cells of floating gate type MOS transistors, an insulating film is formed on the top surface and the side walls of the gate electrode portion. The insulating films on the side walls serve as an offset region of a channel contacting with the drain region. The side end portions of the drain region, contacting the channel region has a lower impurity concentration than the remaining portion of the drain region. A conductive layer covers the surface of the drain region and at least the insulating films on the side walls of the gate electrode, which upstands above both ends of the drain region. A metal interconnection layer is deposited on the conductive layer. In a method of manufacturing a semiconductor integrated circuit, an array of memory cells each comprising a floating gate type MOS transistor is formed on a semiconductor substrate, insulating films are fomred on the top surface and the side walls of a gate electrode portion located above both ends of a drain region of the transistor. A conductive film covering the surface of the drain region and at least the insulating films is formed on the side walls of the gate electrode located above both ends of the drain region. An interlayer insulating film is formed over the entire major surface of the structure. A contact hole is formed by selectively etching the interlayer insulating film with a stopper of the conductive film. Finally a metal interconnection pattern is formed on the substrate containing the contact hole.

摘要翻译： 在包括浮置型MOS晶体管的存储单元阵列的半导体集成电路中，在栅电极部分的顶表面和侧壁上形成绝缘膜。 侧壁上的绝缘膜用作与漏区接触的通道的偏移区域。 与沟道区接触的漏极区的侧端部的杂质浓度比漏区的剩余部分低。 导电层覆盖漏极区域的表面，并且至少覆盖在栅极电极的侧壁上的绝缘膜，其位于漏极区域的两端。 金属互连层沉积在导电层上。 在半导体集成电路的制造方法中，在半导体基板上形成有各自包括浮置型MOS晶体管的存储单元阵列，绝缘膜分别位于位于上述两侧的栅电极部的顶面和侧壁 晶体管的漏极区域的端部。 覆盖漏极区域的表面的导电膜和至少绝缘膜形成在位于漏极区域两端上方的栅电极的侧壁上。 在结构的整个主表面上形成层间绝缘膜。 通过用导电膜的阻挡层选择性地蚀刻层间绝缘膜来形成接触孔。 最后，在包含接触孔的基板上形成金属互连图案。

公开(公告)号：US5920528A

公开(公告)日：1999-07-06

申请号：US872637

申请日：1997-06-10

申请人： Yoichi Ohshima ,  Minoru Hashimoto

发明人： Yoichi Ohshima ,  Minoru Hashimoto

IPC分类号： G11B7/085 ,  G11B7/09

CPC分类号： G11B7/08517 ,  G11B7/0901 ,  G11B7/08582

摘要： An optical disc apparatus for recording and/or reproducing with respect to an optical disc, comprises a light source for emitting a laser beam; an object lens for focusing the laser beam toward the optical disc; a supporting device which supports the object lens; a sled portion which holds this supporting device; a transporting means for moving the sled portion in the radial direction of the optical disc; a center point servo control means for detecting the movement of the object lens and moving the supporting device so that the object lens is maintained at a predetermined position; a tracking servo control means for generating a tracking error signal and moving the supporting device, so that the object lens is held on the desired track of the optical disc; a frequency detecting means for detecting the frequency of the tracking error signal; and a servo control selecting means for selectively selecting the center point servo control means or the tracking servo control means based on the frequency.

摘要翻译： 一种用于相对于光盘记录和/或再现的光盘装置，包括用于发射激光束的光源; 用于将激光束聚焦到光盘的物镜; 支撑物镜的支撑装置; 保持该支撑装置的滑板部; 用于在所述光盘的径向方向上移动所述滑板部分的传送装置; 中心点伺服控制装置，用于检测物镜的移动并移动支撑装置，使得物镜保持在预定位置; 跟踪伺服控制装置，用于产生跟踪误差信号并移动支持装置，使得物镜保持在光盘的期望轨道上; 频率检测装置，用于检测跟踪误差信号的频率; 以及伺服控制选择装置，用于基于该频率选择性地选择中心点伺服控制装置或跟踪伺服控制装置。

公开(公告)号：US5763321A

公开(公告)日：1998-06-09

申请号：US554753

申请日：1995-11-07

申请人： Yoichi Ohshima ,  Hideaki Aochi

发明人： Yoichi Ohshima ,  Hideaki Aochi

IPC分类号： H01L21/285 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L21/283

CPC分类号： H01L21/76879 ,  H01L2924/0002

摘要： A method of manufacturing semiconductor devices, includes the step of forming a first conductive region of a first conductive material for effecting a growth of a conductive film thereon by a selective growth method. Also, a second conductive region of a second conductive material for not effecting a growth of a conductive film is formed in the selective growth method. An insulating layer is covered with the first and second conductive regions. Further, a through hole in the insulating layer for filling the hole with the conductive film is formed. The conductive film is grown within the through hole over the first conductive region, thereby filling the through hole with the conductive film.

摘要翻译： 制造半导体器件的方法包括：通过选择性生长法形成第一导电材料的第一导电区域以使其上的导电膜生长的步骤。 此外，在选择生长方法中形成用于不影响导电膜生长的第二导电材料的第二导电区域。 绝缘层被第一和第二导电区域覆盖。 此外，形成用于用导电膜填充孔的绝缘层中的通孔。 导电膜在第一导电区域上的通孔内生长，从而用导电膜填充通孔。

公开(公告)号：US5547884A

公开(公告)日：1996-08-20

申请号：US351159

申请日：1994-11-30

申请人： Yoshiko Yamaguchi ,  Yoichi Ohshima

发明人： Yoshiko Yamaguchi ,  Yoichi Ohshima

IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/265

CPC分类号： H01L27/115

摘要： Field oxide films are formed on a semiconductor substrate of first conductivity type to be spaced from each other in the stripe shape. Gate insulating films are formed on the semiconductor substrate between the field oxide films. Word lines or control gate electrodes are formed on the field oxide films and the gate insulating films to be spaced from each other in the stripe shape along a direction perpendicular to the field oxide films. Grooves are formed in the gate insulating films and the field oxide films sandwiched by the word lines. Source regions of second conductivity type are formed in the semiconductor substrate in the grooves formed in the gate insulating films. A common source wiring region of second conductivity type for electrically connecting the respective source regions is formed in the semiconductor substrate in the grooves formed in the field oxide films. The impurity concentration of the common source wiring region is higher than that of the source regions, and the diffusion depth of the common source wiring region is deeper than that of the source regions.

摘要翻译： 场氧化物膜形成在第一导电类型的半导体衬底上，以条状彼此间隔开。 栅极绝缘膜形成在半导体衬底上的场氧化膜之间。 字线或控制栅电极形成在场氧化物膜和栅极绝缘膜上，沿着与场氧化膜垂直的方向以条形彼此间隔开。 沟槽形成在栅极绝缘膜和夹在字线之间的场氧化膜。 在栅极绝缘膜中形成的沟槽中的半导体衬底中形成第二导电类型的源区。 在形成在场氧化膜中的沟槽中的半导体衬底中形成用于电连接各个源极区的第二导电类型的公共源极布线区域。 公共源极配线区域的杂质浓度高于源极区域的杂质浓度，并且公共源极配线区域的扩散深度比源极区域的扩散深度更深。

公开(公告)号：US5394001A

公开(公告)日：1995-02-28

申请号：US65898

申请日：1993-05-25

申请人： Yoshiko Yamaguchi ,  Yoichi Ohshima

发明人： Yoshiko Yamaguchi ,  Yoichi Ohshima

IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C11/34

CPC分类号： H01L27/115

摘要： Field oxide films are formed on a semiconductor substrate of first conductivity type to be spaced from each other in the stripe shape. Gate insulating films are formed on the semiconductor substrate between the field oxide films. Word lines or control gate electrodes are formed on the field oxide films and the gate insulating films to be spaced from each other in the stripe shape along a direction perpendicular to the field oxide films. Grooves are formed in the gate insulating films and the field oxide films in regions sandwiched by the word lines. Source regions of second conductivity type are formed in the semiconductor substrate in the grooves formed in the gate insulating films. A common source wiring region of second conductivity type for electrically connecting the respective source regions is formed in the semiconductor substrate in the grooves formed in the field oxide films. The impurity concentration of the common source wiring region is higher than that of the source regions, and the diffusion depth of the common source wiring region is deeper than that of the source regions.

摘要翻译： 场氧化物膜形成在第一导电类型的半导体衬底上，以条状彼此间隔开。 栅极绝缘膜形成在半导体衬底上的场氧化膜之间。 字线或控制栅电极形成在场氧化物膜和栅极绝缘膜上，沿着与场氧化膜垂直的方向以条形彼此间隔开。 在由字线夹着的区域中的栅绝缘膜和场氧化膜形成沟槽。 在栅极绝缘膜中形成的沟槽中的半导体衬底中形成第二导电类型的源区。 在形成在场氧化膜中的沟槽中的半导体衬底中形成用于电连接各个源极区的第二导电类型的公共源极布线区域。 公共源极配线区域的杂质浓度高于源极区域的杂质浓度，并且公共源极配线区域的扩散深度比源极区域的扩散深度更深。

公开(公告)号：US5476814A

公开(公告)日：1995-12-19

申请号：US267432

申请日：1994-06-29

申请人： Yoichi Ohshima ,  Hideaki Aochi

发明人： Yoichi Ohshima ,  Hideaki Aochi

IPC分类号： H01L21/285 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L21/283

CPC分类号： H01L21/76879 ,  H01L2924/0002

摘要： A method of manufacturing semiconductor devices includes the step of forming a first conductive region of a first conductive material for effecting a growth of a conductive film thereon by a selective growth method. Also, a second conductive region of a second conductive material for not effecting a growth of a conductive film is formed in the selective growth method. An insulating layer is covered with the first and second conductive regions. Further, a through hole in the insulating layer for filling the hole with the conductive film is formed. The conductive film is grown within the through hole over the first conductive region, thereby filling the through hole with the conductive film.

摘要翻译： 制造半导体器件的方法包括：通过选择性生长法形成第一导电材料的第一导电区域以使其上的导电膜生长的步骤。 此外，在选择生长方法中形成用于不影响导电膜生长的第二导电材料的第二导电区域。 绝缘层被第一和第二导电区域覆盖。 此外，形成用于用导电膜填充孔的绝缘层中的通孔。 导电膜在第一导电区域上的通孔内生长，从而用导电膜填充通孔。

公开(公告)号：US5019527A

公开(公告)日：1991-05-28

申请号：US564768

申请日：1990-08-09

申请人： Yoichi Ohshima ,  Seiichi Mori

发明人： Yoichi Ohshima ,  Seiichi Mori

IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L21/60 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L21/76897 ,  H01L21/28273 ,  H01L27/11517 ,  H01L29/66825 ,  H01L29/78 ,  H01L29/7835

摘要： There is formed on a surface of a first conductivity type semiconductor substrate strip shaped first insulator separately extending in parallel with one another. A plurality of stacked gate structures, each comprising a second insulator, a floating gate, a third insulator, a control gate, a fourth insulator and an etching stopper having a slower etching speed than the fourth insulator, are formed on the substrate and the first insulator. Those portions of each first insulator that are located between the parallel extending gate structures and are present at prospective source regions are self-aligningly removed with using one end side of each gate structure as a part of a mask, so as to expose those portions of the substrate that are located at the prospective source regions. Impurities of a second conductivity type are self-aligningly introduced into each prospective source region with using one end side of each gate structure as a part of a mask to form a fifth insulator on a side wall of each gate structure. Impurities of the second conductivity type are self-aligningly introduced into each of prospective drain regions with using a drain side end of each gate structure as a part of a mask. Conductive layers are formed to contact with surfaces of the exposed drain regions and cover at least those parts of the fifth insulator that are laid on the walls at the drain regions of any two adjacent gate structures with corresponding one of the exposed drain regions between them. Sixth insulator is deposited on the resultant structure and are selectively removed with using the conductive layers as stoppers to make contact holes.