公开(公告)号：USD578909S1

公开(公告)日：2008-10-21

申请号：US29298132

申请日：2007-11-29

申请人： Yong-Seok Chung ,  Young-Seok Bae ,  Young-Bin Kim ,  Jin-Seok Kim

设计人： Yong-Seok Chung ,  Young-Seok Bae ,  Young-Bin Kim ,  Jin-Seok Kim

公开(公告)号：US6094317A

公开(公告)日：2000-07-25

申请号：US997977

申请日：1997-12-24

申请人： Yong-Seok Chung

发明人： Yong-Seok Chung

IPC分类号： G06F3/06 ,  G11B19/04 ,  G11B20/10 ,  G11B20/12 ,  G11B20/18 ,  G11B21/02 ,  G11B27/10 ,  G11B5/09

CPC分类号： G11B20/1883 ,  G11B19/04 ,  G11B2220/20 ,  G11B27/105

摘要： A method for controlling a data read/write operation of a disk drive recording device provided with re-allocated reserve sectors as a substitute for defective sectors, includes the steps of: reading data written on the reserve sectors when turning the power on and further storing the data, and disposing the data stored after being retrieved from the re-allocated reserve sectors as a substitute for defective sectors to the rear of data retrieved from a sector preceding the defective sector when accessing a random data section containing the defective sector, and further transferring the resulting data.

摘要翻译： 一种用于控制设置有重新分配的备用扇区作为缺陷扇区的替代的磁盘驱动器记录装置的数据读/写操作的方法，包括以下步骤：读取在打开电源时在备用扇区上写入的数据，并进一步存储 数据，并且在访问包含缺陷扇区的随机数据部分时，将从重分配的预留扇区检索出的数据存储在从缺陷扇区之前的扇区中检索出的数据的后面，将从缺陷扇区替换出来的数据作为替代， 传输结果数据。

公开(公告)号：US20090286369A1

公开(公告)日：2009-11-19

申请号：US12453676

申请日：2009-05-19

申请人： Jee-Hyun Park ,  Jeong-Uk Han ,  Jae-Min Yu ,  Young-Cheon Jeong ,  Sang-Hoon Park ,  Kwan-Jong Roh ,  Byeong-Cheol Lim ,  Yong-Seok Chung

发明人： Jee-Hyun Park ,  Jeong-Uk Han ,  Jae-Min Yu ,  Young-Cheon Jeong ,  Sang-Hoon Park ,  Kwan-Jong Roh ,  Byeong-Cheol Lim ,  Yong-Seok Chung

IPC分类号： H01L21/336

CPC分类号： H01L29/4234 ,  H01L27/11568 ,  H01L27/11573

摘要： In a method of manufacturing a semiconductor device, a tunnel insulation layer is formed on a substrate. A charge trapping layer is formed on the tunnel insulation layer. A protection layer pattern or a mold is formed on the charge trapping layer. Charge trapping layer patterns are formed on the tunnel insulation layer by etching the charge trapping layer using the protection layer pattern or the mold. The charge trapping layer patterns may be spaced apart from each other. Blocking layers are formed on the charge trapping layer patterns, respectively. A gate electrode is formed on the blocking layers and the tunnel insulation layer using the protection layer pattern or the mold.

摘要翻译： 在制造半导体器件的方法中，在衬底上形成隧道绝缘层。 在隧道绝缘层上形成电荷捕获层。 在电荷捕获层上形成保护层图案或模具。 通过使用保护层图案或模具蚀刻电荷捕获层，在隧道绝缘层上形成电荷俘获层图案。 电荷捕获层图案可以彼此间隔开。 阻挡层分别形成在电荷俘获层图案上。 使用保护层图案或模具在阻挡层和隧道绝缘层上形成栅电极。

公开(公告)号：US10163976B2

公开(公告)日：2018-12-25

申请号：US15712130

申请日：2017-09-21

申请人： Ki-Seok Suh ,  Jae-Chul Shim ,  Kil-Ho Lee ,  Yong-Seok Chung ,  Gwan-Hyeob Koh ,  Yoon-Jong Song

发明人： Ki-Seok Suh ,  Jae-Chul Shim ,  Kil-Ho Lee ,  Yong-Seok Chung ,  Gwan-Hyeob Koh ,  Yoon-Jong Song

IPC分类号： H01L27/22 ,  H01L43/12

摘要： A method of manufacturing an MRAM device includes sequentially forming a first insulating interlayer and an etch-stop layer on a substrate. A lower electrode is formed through the etch-stop layer and the first insulating interlayer. An MTJ structure layer and an upper electrode are sequentially formed on the lower electrode and the etch-stop layer. The MTJ structure layer is patterned by a physical etching process using the upper electrode as an etching mask to form an MTJ structure at least partially contacting the lower electrode. The first insulating interlayer is protected by the etch-stop layer so not to be etched by the physical etching process.

公开(公告)号：US09853087B2

公开(公告)日：2017-12-26

申请号：US15157403

申请日：2016-05-17

申请人： Ki-Seok Suh ,  Jae-Chul Shim ,  Kil-Ho Lee ,  Yong-Seok Chung ,  Gwan-Hyeob Koh ,  Yoon-Jong Song

发明人： Ki-Seok Suh ,  Jae-Chul Shim ,  Kil-Ho Lee ,  Yong-Seok Chung ,  Gwan-Hyeob Koh ,  Yoon-Jong Song

IPC分类号： H01L27/22 ,  H01L43/12

CPC分类号： H01L27/222 ,  H01L43/12

摘要： A method of manufacturing an MRAM device includes sequentially forming a first insulating interlayer and an etch-stop layer on a substrate. A lower electrode is formed through the etch-stop layer and the first insulating interlayer. An MTJ structure layer and an upper electrode are sequentially formed on the lower electrode and the etch-stop layer. The MTJ structure layer is patterned by a physical etching process using the upper electrode as an etching mask to form an MTJ structure at least partially contacting the lower electrode. The first insulating interlayer is protected by the etch-stop layer so not to be etched by the physical etching process.

公开(公告)号：US09793472B2

公开(公告)日：2017-10-17

申请号：US15179971

申请日：2016-06-10

申请人： Yong-Seok Chung ,  Yoonjong Song ,  Yongkyu Lee ,  Gwanhyeob Koh

发明人： Yong-Seok Chung ,  Yoonjong Song ,  Yongkyu Lee ,  Gwanhyeob Koh

IPC分类号： H01L21/302 ,  H01L43/12 ,  H01L21/266 ,  H01L21/027

CPC分类号： H01L43/12 ,  H01L21/0273 ,  H01L21/266 ,  H01L27/228

摘要： The inventive concepts provide a method for forming a hard mask pattern. The method includes forming a hard mask layer on an etch target layer disposed on a substrate, forming a photoresist pattern having an opening exposing one region of the hard mask layer, performing an oxygen ion implantation process on the one region using the photoresist pattern as a mask to form an oxidized portion in the one region, and patterning the hard mask layer using the oxidized portion as an etch mask.

公开(公告)号：US07932149B2

公开(公告)日：2011-04-26

申请号：US12453676

申请日：2009-05-19

申请人： Jae-Hyun Park ,  Jeong-Uk Han ,  Jae-Min Yu ,  Young-Cheon Jeong ,  Sang-Hoon Park ,  Kwan-Jong Roh ,  Byeong-Cheol Lim ,  Yong-Seok Chung

发明人： Jae-Hyun Park ,  Jeong-Uk Han ,  Jae-Min Yu ,  Young-Cheon Jeong ,  Sang-Hoon Park ,  Kwan-Jong Roh ,  Byeong-Cheol Lim ,  Yong-Seok Chung

IPC分类号： H01L21/336

CPC分类号： H01L29/4234 ,  H01L27/11568 ,  H01L27/11573

摘要： In a method of manufacturing a semiconductor device, a tunnel insulation layer is formed on a substrate. A charge trapping layer is formed on the tunnel insulation layer. A protection layer pattern or a mold is formed on the charge trapping layer. Charge trapping layer patterns are formed on the tunnel insulation layer by etching the charge trapping layer using the protection layer pattern or the mold. The charge trapping layer patterns may be spaced apart from each other. Blocking layers are formed on the charge trapping layer patterns, respectively. A gate electrode is formed on the blocking layers and the tunnel insulation layer using the protection layer pattern or the mold.

摘要翻译： 在制造半导体器件的方法中，在衬底上形成隧道绝缘层。 在隧道绝缘层上形成电荷捕获层。 在电荷捕获层上形成保护层图案或模具。 通过使用保护层图案或模具蚀刻电荷捕获层，在隧道绝缘层上形成电荷俘获层图案。 电荷捕获层图案可以彼此间隔开。 阻挡层分别形成在电荷俘获层图案上。 使用保护层图案或模具在阻挡层和隧道绝缘层上形成栅电极。