公开(公告)号：US20050112818A1

公开(公告)日：2005-05-26

申请号：US10973240

申请日：2004-10-27

申请人： Yoshiki Nagatomo ,  Shoji Yo ,  Osamu Nanba ,  Hiroaki Uchida ,  Kazuya Suzuki

发明人： Yoshiki Nagatomo ,  Shoji Yo ,  Osamu Nanba ,  Hiroaki Uchida ,  Kazuya Suzuki

IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L21/8238 ,  H01L21/8242 ,  H01L27/108

CPC分类号： H01L27/10852 ,  H01L27/10817 ,  H01L27/10885 ,  H01L28/84 ,  H01L28/91

摘要： A first insulating layer is formed on semiconductor substrate, and a trench is formed in the first insulating layer. An amorphous silicon layer doped with impurities is formed on a side and bottom walls of the trench. Next, a resist material is partially filled in the trench so that an upper portion of the amorphous silicon layer is exposed. The exposed portion is implanted with impurity ions. After removal of the resist material, the amorphous silicon layer is heat treated so as to grow hemispherical grains on its surface.

摘要翻译： 在半导体衬底上形成第一绝缘层，并且在第一绝缘层中形成沟槽。 掺杂有杂质的非晶硅层形成在沟槽的侧壁和底壁上。 接下来，将抗蚀剂材料部分地填充在沟槽中，使得非晶硅层的上部露出。 暴露部分注入杂质离子。 在去除抗蚀剂材料之后，非晶硅层被热处理以便在其表面上生长半球状晶粒。

公开(公告)号：US06828207B2

公开(公告)日：2004-12-07

申请号：US10352947

申请日：2003-01-29

申请人： Yoshiki Nagatomo ,  Shoji Yo ,  Osamu Nanba ,  Hiroaki Uchida ,  Kazuya Suzuki

发明人： Yoshiki Nagatomo ,  Shoji Yo ,  Osamu Nanba ,  Hiroaki Uchida ,  Kazuya Suzuki

IPC分类号： H01L2120

CPC分类号： H01L27/10852 ,  H01L27/10817 ,  H01L27/10885 ,  H01L28/84 ,  H01L28/91

摘要： A first insulating layer is formed on semiconductor substrate, and a trench is formed in the first insulating layer. An amorphous silicon layer doped with impurities is formed on a side and bottom walls of the trench. Next, a resist material is partially filled in the trench so that an upper portion of the amorphous silicon layer is exposed. The exposed portion is implanted with impurity ions. After removal of the resist material, the amorphous silicon layer is heat treated so as to grow hemispherical grains on its surface.

摘要翻译： 在半导体衬底上形成第一绝缘层，并且在第一绝缘层中形成沟槽。 掺杂有杂质的非晶硅层形成在沟槽的侧壁和底壁上。 接下来，将抗蚀剂材料部分地填充在沟槽中，使得非晶硅层的上部露出。 暴露部分注入杂质离子。 在去除抗蚀剂材料之后，非晶硅层被热处理以便在其表面上生长半球状晶粒。

公开(公告)号：US5937311A

公开(公告)日：1999-08-10

申请号：US747026

申请日：1996-11-07

申请人： Yoshiki Nagatomo

发明人： Yoshiki Nagatomo

IPC分类号： H01L21/76 ,  H01L21/762

CPC分类号： H01L21/76202 ,  H01L21/76205

摘要： A method of forming an isolation region exerts no adverse influence upon steps after forming the isolation region and is, besides, capable of forming the isolation region having a narrow isolation width. After a mask has been formed of an oxidationproof material such as Si.sub.3 N.sub.4 on a silicon substrate, a field oxide is formed by effecting selective oxidation in a high-pressure dry oxygen atmosphere. Thereafter, a portion, protruded from the silicon substrate, of the formed field oxide is removed, thereby forming the isolation region.

摘要翻译： 形成隔离区域的方法不会对形成隔离区域之后的步骤产生不利影响，而且能够形成隔离宽度窄的隔离区域。 在硅衬底上形成诸如Si 3 N 4之类的防氧化材料的掩模之后，通过在高压干氧气氛中进行选择性氧化来形成场氧化物。 此后，除去形成的场氧化物的从硅衬底突出的部分，从而形成隔离区域。

公开(公告)号：US5541428A

公开(公告)日：1996-07-30

申请号：US355156

申请日：1994-12-08

申请人： Yoshiki Nagatomo

发明人： Yoshiki Nagatomo

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

CPC分类号： H01L27/10844 ,  H01L27/10817 ,  Y10S257/908

摘要： In a semiconductor memory device, storage electrodes of two memory cells adjacent to each other are superimposed with each other, with their contours being substantially aligned. As a result, the storage electrodes are extended to cover two memory cell regions. The superimposed storage electrodes are electrically insulated from each other, and the upper storage electrode extends through the lower storage electrode.

摘要翻译： 在半导体存储器件中，彼此相邻的两个存储单元的存储电极彼此叠加，其轮廓基本对齐。 结果，存储电极被延伸以覆盖两个存储单元区域。 叠加的存储电极彼此电绝缘，并且上部存储电极延伸穿过下部存储电极。

公开(公告)号：US20100263038A1

公开(公告)日：2010-10-14

申请号：US11606247

申请日：2006-11-30

申请人： Yoshiki Nagatomo

发明人： Yoshiki Nagatomo

IPC分类号： G06F7/04

CPC分类号： H04L9/3273 ,  H04L9/3231

摘要： A portable electronic device has an attribute memory such as a one-time programmable read-only memory that non-rewritably stores an original attribute characterizing an authenticatee. When the authenticatee uses the portable electronic device at an authentication terminal, the authenticatee inputs the same attribute to the authentication terminal. The input attribute is sent from the authentication terminal to the portable electronic device and compared with the original attribute in the portable electronic device. Alternatively, the original attribute is sent from the portable electronic device to the authentication terminal and compared with the input attribute in the authentication terminal. The use of a non-rewritable attribute memory improves the security of the authentication system.

摘要翻译： 便携式电子设备具有诸如一次性可编程只读存储器的属性存储器，其不可重写地存储表征认证者的原始属性。 当认证者在认证终端使用便携式电子设备时，认证者向认证终端输入相同的属性。 将输入属性从认证终端发送到便携式电子设备，并与便携式电子设备中的原始属性进行比较。 或者，将原始属性从便携式电子设备发送到认证终端，并与认证终端中的输入属性进行比较。 使用不可重写的属性内存提高了身份验证系统的安全性。

公开(公告)号：US5973347A

公开(公告)日：1999-10-26

申请号：US610752

申请日：1996-03-04

申请人： Yoshiki Nagatomo

发明人： Yoshiki Nagatomo

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108

CPC分类号： H01L27/10808

摘要： An object of the present invention is to provide a semiconductor memory cell capable of ensuring a large surface area of each of a plurality of storage electrodes thereby to increase the capacity of a capacitive portion (capacitor) formed between the storage electrode and a cell plate electrode, in other words, greatly increasing the capacity of the memory cell and to provide a method of manufacturing the semiconductor memory cell. The storage electrode is structured so as to have oblique inclinations. A semiconductor memory cell is normally selected by applying a voltage to a word line so as to start up the word line. Thus, the reading of information from or writing of it into the selected semiconductor memory cell is performed. The information is transferred to the corresponding memory cell from the outside of the memory cell through its corresponding bit line. Alternatively, the information is transferred to the outside. The retention of the information in the memory cell is carried out by electric charges stored in the capacitor formed between the storage electrode and the cell plate electrode. Therefore, the greater the capacity of the capacitor, the higher the performance of the memory cell is made.

摘要翻译： 本发明的目的是提供一种能够确保多个存储电极中的每一个的大面积的半导体存储单元，从而增加在存储电极和单元板电极之间形成的电容部（电容器）的容量 ，换句话说，大大增加了存储单元的容量并提供了制造半导体存储单元的方法。 存储电极被构造成具有倾斜倾斜度。 通常通过对字线施加电压以便启动字线来选择半导体存储单元。 因此，执行从所选择的半导体存储单元读取信息或将其写入所选择的半导体存储单元。 该信息通过其对应的位线从存储器单元的外部传送到相应的存储器单元。 或者，信息被传送到外部。 通过存储在存储电极和单元板电极之间形成的电容器中的电荷进行信息的保存在存储单元中。 因此，电容器的容量越大，存储单元的性能就越高。

公开(公告)号：US5194404A

公开(公告)日：1993-03-16

申请号：US671525

申请日：1991-03-19

申请人： Yoshiki Nagatomo

发明人： Yoshiki Nagatomo

IPC分类号： H01L21/3205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H01L23/52

CPC分类号： H01L21/28525 ,  H01L21/28518

摘要： A method of manufacturing a low resistance contact structure for a semiconductor device wherein a polycide layer is formed on a semiconductor substrate, and the surface of the substrate is covered with an interlayer isolation layer which is provided with a contact hole over the polycide layer. After filling the contact hole with polycrystalline silicon or forming a polycrystalline silicon contact or a polycide structure contact which connects to the polycide layer at the contact hole, the structure is subjected to a short term and high temperature annealing treatment at a temperature over 900.degree. C.

摘要翻译： 一种制造用于半导体器件的低电阻接触结构的方法，其中在半导体衬底上形成多晶硅化物层，并且所述衬底的表面覆盖有在所述多晶硅化合物层上设置有接触孔的层间隔离层。 在多晶硅填充接触孔或形成多晶硅接触或者在接触孔处连接到多晶硅化物层的多晶硅结构接触点时，该结构在900℃以上的温度下进行短期和高温退火处理 。