Abstract:
A power supply device that switches one of a first power supply, a second power supply, and a third power supply, all of which supply power to an auxiliary device, to a transfer gate in a CMOS image sensor having a photodiode and outputs the corresponding power to the transfer gate is disclosed. The device includes: a first transistor driven by the second power supply and outputting power of the second power supply to the transfer gate; a second transistor driven by the second power supply and outputting power of the first power supply to the transfer gate; a third transistor driven by the third power supply and outputting power of the third power supply to the transfer gate; and a fourth transistor located before the second transistor, driven by the first power supply, and outputting power of the first power supply to a source of the second transistor.
Abstract:
Disclosed herein is a driving apparatus for driving a pixel, including a first pMOS type transistor connected to a first potential a first nMOS type transistor connected in series to the first pMOS type transistor and connected to a second potential; and a control section configured to control the first pMOS type transistor and the first nMOS type transistor individually using a first on-signal for controlling the timing of turning on of one of the first pMOS type transistor and the first nMOS type transistor; a signal of a potential at a node between the first pMOS type transistor and the first nMOS type transistor being inputted as a driving signal for driving the pixel to the pixel.
Abstract:
A solid-state imaging device includes: a pixel section wherein pixels including photoelectric conversion devices are arranged in a matrix; and a pixel driving section including a row selection circuit which controls the pixels to perform an electronic shutter operation and readout of the pixel section. The row selection circuit has a function of selecting a readout row from which a signal is read out and a shutter row on which reset is performed by discharging charge accumulated in the photoelectric conversion devices, in accordance with address and control signals. The row selection circuit can set, in accordance with the address and control signals, in the pixels of the selected row, at least a readout state, a discharge state where a smaller amount of the charge accumulated in the photoelectric conversion devices than the reset is discharged, an electronic shutter state, and a charge state where the charge is accumulated in the photoelectric conversion devices.
Abstract:
Disclosed herein is a driving apparatus for driving a pixel, including a first pMOS type transistor connected to a first potential a first nMOS type transistor connected in series to the first pMOS type transistor and connected to a second potential; and a control section configured to control the first pMOS type transistor and the first nMOS type transistor individually using a first on-signal for controlling the timing of turning on of one of the first pMOS type transistor and the first nMOS type transistor; a signal of a potential at a node between the first pMOS type transistor and the first nMOS type transistor being inputted as a driving signal for driving the pixel to the pixel.
Abstract:
A power supply device that switches one of a first power supply, a second power supply, and a third power supply, all of which supply power to an auxiliary device, to a transfer gate in a CMOS image sensor having a photodiode and outputs the corresponding power to the transfer gate is disclosed. The device includes: a first transistor driven by the second power supply and outputting power of the second power supply to the transfer gate; a second transistor driven by the second power supply and outputting power of the first power supply to the transfer gate; a third transistor driven by the third power supply and outputting power of the third power supply to the transfer gate; and a fourth transistor located before the second transistor, driven by the first power supply, and outputting power of the first power supply to a source of the second transistor.
Abstract:
A solid-state imaging device includes: a pixel section wherein pixels including photoelectric conversion devices are arranged in a matrix; and a pixel driving section including a row selection circuit which controls the pixels to perform an electronic shutter operation and readout of the pixel section. The row selection circuit has a function of selecting a readout row from which a signal is read out and a shutter row on which reset is performed by discharging charge accumulated in the photoelectric conversion devices, in accordance with address and control signals. The row selection circuit can set, in accordance with the address and control signals, in the pixels of the selected row, at least a readout state, a discharge state where a smaller amount of the charge accumulated in the photoelectric conversion devices than the reset is discharged, an electronic shutter state, and a charge state where the charge is accumulated in the photoelectric conversion devices.
Abstract:
A solid state imaging device able to make noise from a nonselected row small, able to suppress occurrence of vertical stripes in a bright scene, not requiring charging including a floating node capacity via a reset transistor, able to prevent an increase of a driver size of a drain line, and able to secure high speed operation and a camera system using this as the imaging device are provided.An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example −1V).
Abstract:
An image sensor that supplies a control signal together with an address specifying each of a plurality of pixels arrayed in a pixel array with predetermined rows and columns to thereby perform an electronic shutter operation on a pixel corresponding to the address or perform reading of a pixel signal of a pixel corresponding to the address, is disclosed. The sensor includes: address generating means for generating a shutter row address specifying a row of pixels, on which an electronic shutter operation is to be performed within one horizontal period, among the pixels arrayed in the pixel array and a read row address specifying a row of pixels on which reading of a pixel signal is to be performed within the same one horizontal period; first storage means for storing the shutter row address; and second storage means for storing the read row address.
Abstract:
The present invention relates to an adjuvant composition characterized by containing the following (A) and (B): (A) Sodium dialkylsulfosuccinate and polyoxyethylene alkyl ether, the total content being 45% to 85% by mass; (B) 5 to 40% by mass of component for pour-point depressant, and the adjuvant composition can uniformly adhere agrochemical active ingredients to crops, has an effect to stabilize the agrochemical efficacy and particularly exerts a pronounced effect when used in drift-reducing spraying.
Abstract:
An image sensor that has a pixel array section in which pixels are arrayed in a two-dimensional manner in vertical and horizontal directions and that controls an exposure time of each pixel in a rolling shutter method is disclosed. The sensor includes control means for determining an electronic shutter occurrence number within one horizontal scanning period, which is the number of rows where electronic shutters are simultaneously performed in one horizontal scanning period, by an operation based on an address addition amount (P1, P2, P3, . . . , PN) when a vertical address movement amount of the pixel array section for every one horizontal scanning period in an exposure regulation shutter, which is an electronic shutter for regulating exposure, executed corresponding to electric charge reading in each pixel is expressed as repetition of the address addition amount (P1, P2, P3, . . . , PN).