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公开(公告)号：US20120327555A1
公开(公告)日：2012-12-27
申请号：US13529766
申请日：2012-06-21
申请人： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
发明人： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
IPC分类号： H01G4/12
摘要： There is provided a chip type laminated capacitor, including: a ceramic body including a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 □m or less; first and second outer electrodes formed on both ends of the ceramic body in a length direction; first and second band parts formed to extend inwardly of the ceramic body in the length direction on a length-width (L-W) plane from the first and second outer electrodes and having different lengths; and third and fourth band parts formed to extend inwardly of the ceramic body in the length direction on a length-thickness (L-T) plane from the first and second outer electrodes and having different lengths.
摘要翻译： 提供了一种片式叠层电容器，其包括：陶瓷体，其包括厚度等于其中包含的晶粒的平均粒径的10倍以上且为3μm以下的电介质层; 第一外电极和第二外电极，其在长度方向上形成在陶瓷体的两端; 第一和第二带部分形成为在第一和第二外部电极的长度（L-W）平面上沿长度方向在陶瓷体的内部延伸并具有不同的长度; 以及第三和第四带部分，其形成为在长度方向上在距第一和第二外部电极的长度 - 厚度（L-T）平面上延伸到陶瓷体的内侧并具有不同的长度。
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公开(公告)号：US08385048B2
公开(公告)日：2013-02-26
申请号：US13529766
申请日：2012-06-21
申请人： Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
发明人： Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
IPC分类号： H01G4/06
摘要： There is provided a chip type laminated capacitor, including: a ceramic body including a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 □m or less; first and second outer electrodes formed on both ends of the ceramic body in a length direction; first and second band parts formed to extend inwardly of the ceramic body in the length direction on a length-width (L-W) plane from the first and second outer electrodes and having different lengths; and third and fourth band parts formed to extend inwardly of the ceramic body in the length direction on a length-thickness (L-T) plane from the first and second outer electrodes and having different lengths.
摘要翻译： 提供了一种片式叠层电容器，其包括：陶瓷体，其包括厚度等于其中包含的晶粒的平均粒径的10倍以上且为3μm以下的电介质层; 第一外电极和第二外电极，其在长度方向上形成在陶瓷体的两端; 第一和第二带部分形成为在第一和第二外部电极的长度（L-W）平面上沿长度方向在陶瓷体的内部延伸并具有不同的长度; 以及第三和第四带部分，其形成为在长度方向上在距第一和第二外部电极的长度 - 厚度（L-T）平面上延伸到陶瓷体的内侧并具有不同的长度。
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公开(公告)号：US08351181B1
公开(公告)日：2013-01-08
申请号：US13531242
申请日：2012-06-22
申请人： Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
发明人： Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
IPC分类号： H01G4/06
摘要： There is provided a chip type laminated capacitor including: a ceramic body formed by laminating a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 μm or less; first and second outer electrodes; a first inner electrode having one end forming a first margin together with one end surface of the ceramic body at which the second outer electrode is formed and the other end leading to the first outer electrode; and a second inner electrode having one end forming a second margin together with the other end surface of the ceramic body at which the first outer electrode is formed and the other end leading to the second outer electrode, wherein the first and second margins have different widths under a condition that they are 200 μm or less.
摘要翻译： 提供一种芯片型层叠电容器，其包括：陶瓷体，其通过层叠厚度等于其中包含的晶粒的平均粒径的10倍以上且为3μm以下的电介质层而形成; 第一和第二外部电极; 第一内部电极，其一端与形成有第二外部电极的陶瓷体的一个端面一起形成第一边缘，而另一端通向第一外部电极; 以及第二内部电极，其一端与形成有第一外部电极的陶瓷体的另一个端面一起形成第二边缘，另一端通向第二外部电极，其中第一和第二边缘具有不同的宽度 在200μm以下的条件下。
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公开(公告)号：US20120327557A1
公开(公告)日：2012-12-27
申请号：US13531242
申请日：2012-06-22
申请人： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
发明人： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
IPC分类号： H01G4/12
摘要： There is provided a chip type laminated capacitor including: a ceramic body formed by laminating a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 μm or less; first and second outer electrodes; a first inner electrode having one end forming a first margin together with one end surface of the ceramic body at which the second outer electrode is formed and the other end leading to the first outer electrode; and a second inner electrode having one end forming a second margin together with the other end surface of the ceramic body at which the first outer electrode is formed and the other end leading to the second outer electrode, wherein the first and second margins have different widths under a condition that they are 200 μm or less.
摘要翻译： 提供一种芯片型层叠电容器，其包括：陶瓷体，其通过层叠厚度等于其中包含的晶粒的平均粒径的10倍以上且为3μm以下的电介质层而形成; 第一和第二外部电极; 第一内部电极，其一端与形成有第二外部电极的陶瓷体的一个端面一起形成第一边缘，而另一端通向第一外部电极; 以及第二内部电极，其一端与形成有第一外部电极的陶瓷体的另一个端面一起形成第二边缘，另一端通向第二外部电极，其中第一和第二边缘具有不同的宽度 在200μm以下的条件下。
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公开(公告)号：US08351180B1
公开(公告)日：2013-01-08
申请号：US13531237
申请日：2012-06-22
IPC分类号： H01G4/06
摘要： There is provided a multilayer ceramic capacitor, including: a multilayer body in which a plurality of dielectric layers are stacked in a thickness direction; and inner electrode layers formed within the multilayer body and including first and second inner electrodes disposed to be opposed to each other; wherein a ratio (MA1/CA1) of MA1 to CA1 is between 0.07 and 0.20, wherein CA1 represents an area of the multilayer body in a cross section of the multilayer body taken in a length and thickness direction, and MA1 represents an area of a first margin part in the cross section of the multilayer body taken in the length and thickness direction, the first margin part being a portion of the multilayer body, other than a first capacitance forming part thereof in which the first and second inner electrodes overlap in the thickness direction.
摘要翻译： 提供了一种多层陶瓷电容器，包括：多层体，其中多个电介质层在厚度方向上堆叠; 以及形成在所述多层体内并且包括彼此相对设置的第一和第二内部电极的内部电极层; 其中MA1与CA1的比率（MA1 / CA1）在0.07和0.20之间，其中CA1表示在长度和厚度方向上取下的多层体的横截面中的多层体的面积，MA1表示 第一边缘部分是沿着长度和厚度方向截取的第一边缘部分，第一边缘部分是多层体的一部分，除了第一电容形成部分之外，第一和第二内部电极在其中重叠 厚度方向。
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公开(公告)号：US08373964B2
公开(公告)日：2013-02-12
申请号：US13064153
申请日：2011-03-08
摘要： There is provided a multi-layered ceramic capacitor with reduced internal resistance by forming internal electrode groups including internal electrodes having different lengths. The multi-layered ceramic capacitor of the present invention includes a sintered ceramic body part in which cover layers are provided on both surfaces thereof as an outermost layer and a plurality of ceramic layers are stacked therebetween, first and second external electrodes each formed on an outer surface of the sintered ceramic body part, a plurality of first and second internal electrode groups adjacent to each other in a stacking direction of the plurality of ceramic layers, having the ceramic layer therebetween, and including 2N or 2N+1 (N is an integer number larger than 1) internal electrodes electrically connected to the first and second external electrodes, wherein the 2N or 2N+1 (N is an integer number larger than 1) internal electrodes are disposed to face at least one internal electrode of other adjacent internal electrode groups. A length of each internal electrode has a pyramid shape.
摘要翻译： 通过形成具有不同长度的内部电极的内部电极组，提供具有降低的内部电阻的多层陶瓷电容器。 本发明的多层陶瓷电容器包括烧结陶瓷体部分，其两面上设有覆盖层作为最外层，并且多个陶瓷层堆叠在其间，第一和第二外部电极各自形成在外部 烧结陶瓷体部的表面，在多个陶瓷层的堆叠方向上彼此相邻的多个第一和第二内部电极组，其间具有陶瓷层，并且包括2N或2N + 1（N是整数 大于1的数字）电连接到第一和第二外部电极的内部电极，其中设置2N或2N + 1（N为大于1的整数）的内部电极，以面对其他相邻内部电极的至少一个内部电极 团体 每个内部电极的长度具有金字塔形状。
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公开(公告)号：US20110317327A1
公开(公告)日：2011-12-29
申请号：US13064153
申请日：2011-03-08
IPC分类号： H01G4/30
摘要： There is provided a multi-layered ceramic capacitor with reduced internal resistance by forming internal electrode groups including internal electrodes having different lengths. The multi-layered ceramic capacitor of the present invention includes a sintered ceramic body part in which cover layers are provided on both surfaces thereof as an outermost layer and a plurality of ceramic layers are stacked therebetween, first and second external electrodes each formed on an outer surface of the sintered ceramic body part, a plurality of first and second internal electrode groups adjacent to each other in a stacking direction of the plurality of ceramic layers, having the ceramic layer therebetween, and including 2N or 2N+1 (N is an integer number larger than 1) internal electrodes electrically connected to the first and second external electrodes, wherein the 2N or 2N+1 (N is an integer number larger than 1) internal electrodes are disposed to face at least one internal electrode of other adjacent internal electrode groups. A length of each internal electrode has a pyramid shape.
摘要翻译： 通过形成具有不同长度的内部电极的内部电极组，提供具有降低的内部电阻的多层陶瓷电容器。 本发明的多层陶瓷电容器包括烧结陶瓷体部分，其两面上设有覆盖层作为最外层，并且多个陶瓷层堆叠在其间，第一和第二外部电极各自形成在外部 烧结陶瓷体部的表面，在多个陶瓷层的堆叠方向上彼此相邻的多个第一和第二内部电极组，其间具有陶瓷层，并且包括2N或2N + 1（N是整数 大于1的数字）电连接到第一和第二外部电极的内部电极，其中设置2N或2N + 1（N为大于1的整数）的内部电极，以面对其他相邻内部电极的至少一个内部电极 团体 每个内部电极的长度具有金字塔形状。
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8.发明授权Mounting structure of circuit board having multi-layered ceramic capacitor thereon 有权具有多层陶瓷电容器的电路板的安装结构公开(公告)号：US08681475B2
公开(公告)日：2014-03-25
申请号：US13590270
申请日：2012-08-21
IPC分类号： H01G4/06
摘要： Disclosed herein is a mounting structure of a circuit board having a multi-layered ceramic capacitor thereon, the multi-layered ceramic capacitor including dielectric sheets laminated thereon and external terminal electrodes formed at both ends thereof, the dielectric sheets having internal electrodes formed thereon, and the external terminal electrodes being connected in parallel with the internal electrode, wherein the internal electrodes are disposed to be in parallel with the circuit board, the external terminal electrodes are bonded to lands of the circuit board by a conductive material, and a bonding height (Ts) of the conductive material is lower than a sum of a gap (Ta) between the circuit board and a bottom surface of the multi-layered ceramic capacitor and a thickness (Tc) of a cover layer on a lower portion of the multi-layered ceramic capacitor, whereby vibration noise can be greatly reduced.
摘要翻译： 这里公开了一种其上具有多层陶瓷电容器的电路板的安装结构，其中层叠有电介质片的多层陶瓷电容器和形成在其两端的外部端子电极，其上形成有内部电极的电介质片，以及 外部端子电极与内部电极并联连接，其中内部电极被设置为与电路板平行，外部端子电极通过导电材料接合到电路板的焊盘，并且接合高度 Ts）低于多层陶瓷电容器的电路板和底面之间的间隙（Ta）和多层陶瓷电容器的下表面的覆盖层的厚度（Tc）之和， 层状陶瓷电容器，从而可以大大降低振动噪声。
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9.发明申请MOUNTING STRUCTURE OF CIRCUIT BOARD HAVING MULTI-LAYERED CERAMIC CAPACITOR THEREON 有权具有多层陶瓷电容器的电路板的安装结构公开(公告)号：US20120298407A1
公开(公告)日：2012-11-29
申请号：US13481348
申请日：2012-05-25
IPC分类号： H05K1/16
CPC分类号： H05K1/111 , H01G4/12 , H01G4/30 , H05K3/3442 , H05K2201/10015 , H05K2201/2045 , Y02P70/611 , Y02P70/613
摘要： Disclosed herein is a mounting structure of a circuit board having a multi-layered ceramic capacitor thereon. The mounting structure of a circuit board having a multi-layered ceramic capacitor thereon, in which a dielectric layer on which inner electrodes are disposed is stacked and external electrode terminals connecting the inner electrodes in parallel are disposed on both ends thereof, wherein the inner electrodes of the multi-layered ceramic capacitor and the circuit board are disposed so as to be a horizontal direction to connect the external electrode terminals with a land on the circuit board by a conductive material and a ratio of a bonding area ASOLEDER of the conductive material to the area AMLCC of the external electrode terminals AMLCC is set to be less than 1.4, thereby remarkably reducing the vibration noise.
摘要翻译： 这里公开了一种其上具有多层陶瓷电容器的电路板的安装结构。 其上设置有多层陶瓷电容器的电路板的安装结构，其中布置有内部电极的电介质层，并且将其内部电极并联连接的外部电极端子设置在其两端，其中内部电极 将多层陶瓷电容器和电路板设置成水平方向，以通过导电材料将导电材料的外部电极端子与电路板上的焊盘接合，并且将导电材料的接合面积ASOLEDER与 外部电极端子AMLCC的面积AMLCC被设定为小于1.4，从而显着地降低了振动噪声。
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10.发明申请公开(公告)号：US20120152604A1
公开(公告)日：2012-06-21
申请号：US13331619
申请日：2011-12-20
CPC分类号： H01G2/065 , H01G4/232 , H01G4/30 , H05K3/3442 , H05K13/022 , H05K2201/10015 , H05K2203/166 , Y02P70/613 , Y10T29/49124
摘要： The present invention provides a method of mounting a circuit board having thereon a multi-layered ceramic capacitor and a land pattern of a circuit board for the same. The method of mounting a circuit board having thereon a multi-layered ceramic capacitor on which a plurality of dielectric sheet having internal electrodes formed thereon are stacked and the external terminal electrodes connected to the internal electrodes in parallel are formed on both ends thereof includes conductively connecting lands of a circuit board to the external terminal electrodes in such a way that internal electrode layers of the multi-layered ceramic capacitor and the circuit board are arranged in a horizontal direction, wherein a height TS of conductive material to conductively connect the external terminal electrodes to the lands is less than ⅓ of a thickness TMLCC of the multi-layered ceramic capacitor.
摘要翻译： 本发明提供了一种安装电路板的方法，其上具有多层陶瓷电容器和用于其的电路板的焊盘图案。 在其上堆叠有多层陶瓷电容器的电路板的方法，其上形成有形成有内部电极的多个电介质层，并且在其两端形成有与内部电极并联连接的外部端子电极的方法包括导电连接 电路板的接地部分以外部端子电极的方式使多层陶瓷电容器和电路板的内部电极层沿水平方向排列，其中导电材料的高度TS导电连接外部端子电极 到土地的厚度小于多层陶瓷电容器的厚度TMLCC的1/3。
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