公开(公告)号：US11923422B2

公开(公告)日：2024-03-05

申请号：US17027712

申请日：2020-09-22

申请人： GlobalWafers Co., Ltd.

发明人： Ming-Shien Hu ,  Chien-Jen Sun ,  I-Ching Li ,  Wen-Ching Hsu

IPC分类号： H01L29/207 ,  H01L29/20 ,  H01L29/36 ,  H01L29/778 ,  H01L29/10

CPC分类号： H01L29/207 ,  H01L29/365 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/7786

摘要： A semiconductor device includes a substrate, an initial layer, and a superlattice stack. The initial layer is located on the substrate and includes aluminum nitride (AlN). The superlattice stack is located on the initial layer and includes a plurality of first films, a plurality of second films and at least one doped layer, and the first films and the second films are alternately stacked on the initial layer, wherein the at least one doped layer is arranged in one of the first films and the second films, and dopants of the at least one doped layer are selected from a group consisting of carbon, iron, and the combination thereof.

公开(公告)号：US20240011191A1

公开(公告)日：2024-01-11

申请号：US18371423

申请日：2023-09-21

申请人： Resonac Corporation

发明人： Kensho TANAKA ,  Yoshikazu Umeta

IPC分类号： H01L29/04 ,  H01L29/16 ,  H01L29/36 ,  C30B29/36

CPC分类号： H01L29/045 ,  H01L29/1608 ,  H01L29/365 ,  C30B29/36

摘要： A SiC epitaxial wafer includes a SiC substrate and an epitaxial layer laminated on the SiC substrate, wherein the epitaxial layer contains an impurity element which determines the conductivity type of the epitaxial layer and boron which has a conductivity type different from the conductivity type of the impurity element, and the concentration of boron is less than 1.0×1014 cm−3 at any position in the plane of the epitaxial layer.

公开(公告)号：US09870925B1

公开(公告)日：2018-01-16

申请号：US13964192

申请日：2013-08-12

申请人： Anatoly Feygenson

发明人： Anatoly Feygenson

IPC分类号： H01L21/20 ,  H01L21/36 ,  H01L21/223 ,  H01L29/36 ,  H01L21/225 ,  H01L29/15 ,  H01L21/67 ,  H01L21/02 ,  H01L29/8605 ,  H01L29/772 ,  H01L21/3215 ,  H01L21/203 ,  H01L29/66

CPC分类号： H01L29/7725 ,  H01L21/02 ,  H01L21/02381 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02543 ,  H01L21/02557 ,  H01L21/02565 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02584 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/203 ,  H01L21/2254 ,  H01L21/3215 ,  H01L21/32155 ,  H01L21/67167 ,  H01L21/67207 ,  H01L29/0847 ,  H01L29/122 ,  H01L29/155 ,  H01L29/157 ,  H01L29/1606 ,  H01L29/365 ,  H01L29/66 ,  H01L29/7782 ,  H01L29/8605

摘要： A novel doping technology for semiconductor wafers has been developed, referred to as a “quantum doping” process that permits the deposition of only a fixed, controlled number of atoms in the form of a monolayer in a substitutional condition where only unterminated surface bonds react with the dopant, thus depositing only a number of atoms equal to the atomic surface density of the substrate material. This technique results in providing a “quantized” set of possible dopant concentration values that depend only on the additional number of layers of substrate material formed over the single layer of dopant atoms.

公开(公告)号：US20170358667A1

公开(公告)日：2017-12-14

申请号：US15666465

申请日：2017-08-01

申请人： Skyworks Solutions, Inc.

发明人： Peter J. Zampardi, JR. ,  Kai Hay Kwok

IPC分类号： H01L29/737 ,  H01L29/08 ,  H01L29/732 ,  H01L29/205 ,  H01L29/66 ,  H01L29/165 ,  H01L23/66 ,  H01L29/36 ,  H01L29/73 ,  H03F3/213 ,  H03F3/195

CPC分类号： H01L29/7378 ,  H01L23/66 ,  H01L29/0821 ,  H01L29/0826 ,  H01L29/165 ,  H01L29/205 ,  H01L29/36 ,  H01L29/365 ,  H01L29/66242 ,  H01L29/73 ,  H01L29/7325 ,  H01L29/737 ,  H01L29/7371 ,  H01L2223/665 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2223/6683 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/451

摘要： This disclosure relates to methods of forming bipolar transistors, such as heterojunction bipolar transistors. The methods may include forming a sub-collector over a substrate, forming a first portion of a collector over the sub-collector and doping a second portion of the collector to form a doping spike. The method may further include forming a third portion of the collector over the doping spike and forming a base of the bipolar transistor over the third portion of the collector.

公开(公告)号：US09711638B2

公开(公告)日：2017-07-18

申请号：US15039505

申请日：2014-11-25

申请人： DENSO CORPORATION

发明人： Kazuhiro Oyama ,  Toshiharu Makino ,  Masahiko Ogura ,  Hiromitsu Kato ,  Daisuke Takeuchi ,  Satoshi Yamasaki ,  Norio Tokuda ,  Takao Inokuma ,  Takuma Minamiyama

IPC分类号： H01L21/04 ,  H01L29/78 ,  H01L29/47 ,  H01L29/872 ,  H01L29/16 ,  H01L29/36 ,  H01L29/66 ,  H01L29/417

CPC分类号： H01L29/7813 ,  H01L29/1602 ,  H01L29/365 ,  H01L29/41766 ,  H01L29/47 ,  H01L29/66045 ,  H01L29/7827 ,  H01L29/7839 ,  H01L29/872

摘要： A semiconductor device includes a MISFET having: a diamond substrate; a drift layer having a first layer with a first density for providing a hopping conduction and a second layer with a second density lower than the first density, and having a δ dope structure; a body layer on the drift layer; a source region in an upper portion of the body layer; a gate insulation film on a surface of the body layer; a gate electrode on a surface of the gate insulation film; a first electrode electrically connected to the source region and a channel region; and a second electrode electrically connected to the diamond substrate. The MISFET flows current in the drift layer in a vertical direction, and the current flows between the first electrode and the second electrode.

公开(公告)号：US20170148879A1

公开(公告)日：2017-05-25

申请号：US15424979

申请日：2017-02-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ziwei FANG ,  Tsan-Chun WANG

IPC分类号： H01L29/10 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/02 ,  H01L27/092 ,  H01L21/324 ,  H01L21/225 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/66 ,  H01L21/265

CPC分类号： H01L29/1083 ,  H01L21/02129 ,  H01L21/0217 ,  H01L21/02271 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/31 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/31155 ,  H01L21/324 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823892 ,  H01L27/0921 ,  H01L27/0924 ,  H01L29/165 ,  H01L29/365 ,  H01L29/66537 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/7851

摘要： A method includes forming fin semiconductor features on a substrate. A dopant-containing dielectric material layer is formed on sidewalls of the fin semiconductor features and the substrate. A precise material modification (PMM) process is performed to the dopant-containing dielectric material layer. The PMM process includes forming a first dielectric material layer over the dopant-containing dielectric material layer; performing a tilted ion implantation to the first dielectric material layer so that a top portion of the first dielectric material layer is doped to have a modified etch characteristic different from an etch characteristic of a bottom portion of the first dielectric material layer; and performing an etch process to selectively remove the top portion of the first dielectric material layer and the top portion of the dopant-containing dielectric material layer.

公开(公告)号：US09627532B2

公开(公告)日：2017-04-18

申请号：US14308054

申请日：2014-06-18

申请人： Nuance Communications, Inc.

发明人： Roberto Gemello ,  Franco Mana ,  Dario Albesano

IPC分类号： G06E1/00 ,  G06E3/00 ,  G06F15/18 ,  G06G7/00 ,  H01L29/78 ,  G06N3/04 ,  G10L15/16 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165

CPC分类号： H01L27/1211 ,  G06N3/04 ,  G10L15/16 ,  H01L21/28132 ,  H01L21/823437 ,  H01L21/823468 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/365 ,  H01L29/41775 ,  H01L29/41783 ,  H01L29/41791 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L2029/7858 ,  H01L2924/13067

摘要： Methods and apparatus for training a multi-layer artificial neural network for use in speech recognition. The method comprises determining for a first speech pattern of the plurality of speech patterns, using a first processing pipeline, network activations for a plurality of nodes of the artificial neural network in response to providing the first speech pattern as input to the artificial neural network, determining based, at least in part, on the network activations and a selection criterion, whether the artificial neural network should be trained on the first speech pattern, and updating, using a second processing pipeline, network weights between nodes of the artificial neural network based, at least in part, on the network activations when it is determined that the artificial neural network should be trained on the first speech pattern.

公开(公告)号：US20170104094A1

公开(公告)日：2017-04-13

申请号：US15389255

申请日：2016-12-22

申请人： Intel Corporation

发明人： Han Wui Then ,  Marko Radosavljevic ,  Uday Shah ,  Niloy Mukherjee ,  Ravi Pillarisetty ,  Benjamin Chu-Kung ,  Jack T. Kavalieros ,  Robert S. Chau

IPC分类号： H01L29/778 ,  H01L29/205 ,  H01L29/40 ,  H01L21/02 ,  H01L29/36 ,  H01L21/311 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66 ,  H01L21/268 ,  H01L29/20 ,  H01L21/306

CPC分类号： H01L29/7787 ,  H01L21/02241 ,  H01L21/02252 ,  H01L21/02255 ,  H01L21/02258 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/268 ,  H01L21/30604 ,  H01L21/30612 ,  H01L21/31111 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/365 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/512 ,  H01L29/518 ,  H01L29/66462

摘要： III-N transistors with recessed gates. An epitaxial stack includes a doped III-N source/drain layer and a III-N etch stop layer disposed between a the source/drain layer and a III-N channel layer. An etch process, e.g., utilizing photochemical oxidation, selectively etches the source/drain layer over the etch stop layer. A gate electrode is disposed over the etch stop layer to form a recessed-gate III-N HEMT. At least a portion of the etch stop layer may be oxidized with a gate electrode over the oxidized etch stop layer for a recessed gate III-N MOS-HEMT including a III-N oxide. A high-k dielectric may be formed over the oxidized etch stop layer with a gate electrode over the high-k dielectric to form a recessed gate III-N MOS-HEMT having a composite gate dielectric stack.

公开(公告)号：US20170077263A1

公开(公告)日：2017-03-16

申请号：US15255615

申请日：2016-09-02

申请人： Toyota Jidosha Kabushiki Kaisha

发明人： Yuta Furumura

IPC分类号： H01L29/66 ,  H01L21/266 ,  H01L21/324 ,  H01L29/06 ,  H01L21/265 ,  H01L21/268

CPC分类号： H01L29/6609 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/268 ,  H01L27/0711 ,  H01L29/0834 ,  H01L29/365 ,  H01L29/407 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/8613

摘要： A manufacturing method includes an implantation of impurities and laser irradiation. In the implantation, impurities are implanted to first and second areas so as to obtain a relationship that a total amount of the first impurities is larger than a total amount of the second impurities in a first depth range and a total amount of the second impurities is larger than a total amount of the first impurities in a second depth range (deeper range). In the irradiation, the first and second areas are irradiated with laser so that an energy density of the laser is larger on the second area than on the first area. A first conductivity type region is formed on the first area so as to be exposed on the surface, and a second conductivity type region is formed on the second area so as to be exposed on the surface.

摘要翻译： 制造方法包括杂质的注入和激光照射。 在植入时，将杂质注入第一和第二区域，以获得第一杂质总量大于第一深度范围内的第二杂质的总量和第二杂质的总量的关系 大于第二深度范围（较深范围）中的第一杂质的总量。 在照射中，用激光照射第一和第二区域，使得第二区域上的激光的能量密度大于第一区域上的能量密度。 第一导电类型区域形成在第一区域上以暴露在表面上，并且在第二区域上形成第二导电类型区域以露出在表面上。

公开(公告)号：US20170051434A1

公开(公告)日：2017-02-23

申请号：US15346959

申请日：2016-11-09

申请人： MITSUBISHI CHEMICAL CORPORATION

发明人： Yutaka MIKAWA ,  Hideo FUJISAWA ,  Kazunori KAMADA ,  Hirobumi NAGAOKA ,  Shinichiro KAWABATA ,  Yuji KAGAMITANI

IPC分类号： C30B29/40 ,  C01B21/06 ,  H01L21/02 ,  H01L29/20 ,  H01S5/30 ,  H01L29/36 ,  H01L33/00 ,  H01L33/32 ,  H01L33/02 ,  H01S5/323 ,  C30B7/10 ,  H01L29/207

CPC分类号： C30B29/406 ,  C01B21/0632 ,  C01P2004/50 ,  C01P2006/40 ,  C01P2006/90 ,  C30B7/105 ,  C30B29/403 ,  H01L21/02389 ,  H01L21/0254 ,  H01L21/02634 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/365 ,  H01L33/0075 ,  H01L33/025 ,  H01L33/32 ,  H01L33/325 ,  H01S5/3086 ,  H01S5/32341 ,  H01S2304/00 ,  Y02P20/544 ,  Y10T428/2982

摘要： A high-quality nitride crystal can be produced efficiently by charging a nitride crystal starting material that contains tertiary particles having a maximum diameter of from 1 to 120 mm and formed through aggregation of secondary particles having a maximum diameter of from 100 to 1000 μm, in the starting material charging region of a reactor, followed by crystal growth in the presence of a solvent in a supercritical state and/or a subcritical state in the reactor, wherein the nitride crystal starting material is charged in the starting material charging region in a bulk density of from 0.7 to 4.5 g/cm3 for the intended crystal growth.

摘要翻译： 通过对含有最大直径为1〜120mm的三次粒子的氮化物晶体原料进行充电，通过使最大直径为100〜1000μm的二次粒子的聚集而形成，可以有效地制造高质量的氮化物晶体， 反应器的起始原料充电区，然后在反应器中在超临界状态和/或亚临界状态的溶剂存在下进行晶体生长，其中将氮化物晶体起始材料以体积方式装入原料充电区域 对于期望的晶体生长，密度为0.7至4.5g / cm 3。