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公开(公告)号：US08687437B2
公开(公告)日：2014-04-01
申请号：US13111231
申请日：2011-05-19
申请人： Young Seog Kim , Young Suk Kim
发明人： Young Seog Kim , Young Suk Kim
IPC分类号： G11C7/00
CPC分类号： G11C11/419 , G11C8/08
摘要： A circuit includes a word line driver for driving a world line and a tracking word line driver for driving a tracking word line. The pulse width of a world line signal on the world line is driven to be larger than that of a tracking world line signal on the tracking world line to assist writing under difficult conditions. Because the tracking word line signal is activated later than the word line signal being activated but is deactivated at the same time with the word line, the pulse width of the word line signal is larger.
摘要翻译： 电路包括用于驱动世界线的字线驱动器和用于驱动跟踪字线的跟踪字线驱动器。 世界线上的世界线信号的脉冲宽度被驱动为大于跟踪世界线上的跟踪世界线信号的脉冲宽度，以帮助在困难条件下进行写入。 由于跟踪字线信号比字线信号被激活的时间晚，而且与字线同时被去激活，所以字线信号的脉冲宽度较大。
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公开(公告)号：US08587991B2
公开(公告)日：2013-11-19
申请号：US13429082
申请日：2012-03-23
CPC分类号： G11C11/412
摘要： A circuit includes a first node; a second node; a first PMOS transistor having a source coupled to the first node, a drain coupled to a first control transistor, and a gate driven by a first voltage; and a first NMOS transistor having a source coupled to the second node, a drain coupled to the first control transistor, and a gate driven by a second voltage. The first PMOS transistor is configured to automatically turn off based on the first voltage and a first node voltage at the first node. The first NMOS transistor is configured to automatically turn off based on the second voltage and a second node voltage at the second node. When the first PMOS transistor, the control transistor, and the first NMOS transistor are on, the first node voltage is lowered while the second voltage is raised.
摘要翻译： 电路包括第一节点; 第二个节点; 具有耦合到第一节点的源极的第一PMOS晶体管，耦合到第一控制晶体管的漏极和由第一电压驱动的栅极; 以及第一NMOS晶体管，其具有耦合到第二节点的源极，耦合到第一控制晶体管的漏极和由第二电压驱动的栅极。 第一PMOS晶体管被配置为基于第一节点处的第一电压和第一节点电压自动关闭。 第一NMOS晶体管被配置为基于第二节点处的第二电压和第二节点电压自动关闭。 当第一PMOS晶体管，控制晶体管和第一NMOS晶体管导通时，第一节点电压降低，而第二电压升高。
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公开(公告)号：US08159862B2
公开(公告)日：2012-04-17
申请号：US12843366
申请日：2010-07-26
CPC分类号： G11C11/412
摘要： A circuit includes a first node; a second node; a first PMOS transistor having a source coupled to the first node, a drain coupled to a first control transistor, and a gate driven by a first voltage; and a first NMOS transistor having a source coupled to the second node, a drain coupled to the first control transistor, and a gate driven by a second voltage. The first PMOS transistor is configured to automatically turn off based on the first voltage and a first node voltage at the first node. The first NMOS transistor is configured to automatically turn off based on the second voltage and a second node voltage at the second node. When the first PMOS transistor, the control transistor, and the first NMOS transistor are on, the first node voltage is lowered while the second voltage is raised.
摘要翻译： 电路包括第一节点; 第二个节点; 具有耦合到第一节点的源极的第一PMOS晶体管，耦合到第一控制晶体管的漏极和由第一电压驱动的栅极; 以及第一NMOS晶体管，其具有耦合到第二节点的源极，耦合到第一控制晶体管的漏极和由第二电压驱动的栅极。 第一PMOS晶体管被配置为基于第一节点处的第一电压和第一节点电压自动关闭。 第一NMOS晶体管被配置为基于第二节点处的第二电压和第二节点电压自动关闭。 当第一PMOS晶体管，控制晶体管和第一NMOS晶体管导通时，第一节点电压降低，而第二电压升高。
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公开(公告)号：US08305827B2
公开(公告)日：2012-11-06
申请号：US12835197
申请日：2010-07-13
申请人： Derek C. Tao , Kuoyuan (Peter) Hsu , Dong Sik Jeong , Young Suk Kim , Young Seog Kim , Yukit Tang
发明人： Derek C. Tao , Kuoyuan (Peter) Hsu , Dong Sik Jeong , Young Suk Kim , Young Seog Kim , Yukit Tang
IPC分类号： G11C5/14
CPC分类号： G11C5/14
摘要： A memory array comprises a plurality of memory cells arranged in a plurality of rows and a plurality of columns. A column of the plurality of columns includes a first power supply node configured to provide a first voltage, a second power supply node configured to provide a second voltage, and a plurality of internal supply nodes electrically coupled together and configured to receive the first voltage or the second voltage for a plurality of memory cells in the column and a plurality of internal ground nodes. The internal ground nodes are electrically coupled together and configured to provide at least two current paths for the plurality of memory cells in the column.
摘要翻译： 存储器阵列包括以多行和多列布置的多个存储单元。 多列的列包括被配置为提供第一电压的第一电源节点，被配置为提供第二电压的第二电源节点和电耦合在一起并被配置为接收第一电压的多个内部供电节点， 该列中的多个存储单元的第二电压和多个内部接地节点。 内部接地节点电耦合在一起并且被配置为为列中的多个存储器单元提供至少两个电流路径。
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公开(公告)号：US20140154554A1
公开(公告)日：2014-06-05
申请号：US14126039
申请日：2012-07-30
申请人： Jong Hwan Kim , Young Suk Kim , Chang Mook Hwang
发明人： Jong Hwan Kim , Young Suk Kim , Chang Mook Hwang
IPC分类号： H01M2/36
CPC分类号： H01M2/362 , H01M2/0207 , H01M2/18 , H01M2/36 , H01M2/361 , H01M2/38 , H01M10/049 , H01M10/0585
摘要： Provided is a battery module including: an electrode assembly including a plurality of cathode plates, a plurality of anode plates, and a plurality of separators each interposed between the plurality of cathode plates and the plurality of anode plates; a pouch receiving the electrode assembly therein; and an electrode retaining structure received together with the electrode assembly in the pouch and having a space capable of retaining an electrolyte.
摘要翻译： 提供一种电池模块，包括：电极组件，其包括多个阴极板，多个阳极板和多个分离器，每个隔板插入在所述多个阴极板和所述多个阳极板之间; 在其中容纳电极组件的袋; 以及与电极组件一起容纳在袋中并具有能够保持电解质的空间的电极保持结构。
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公开(公告)号：US20140115913A1
公开(公告)日：2014-05-01
申请号：US14081306
申请日：2013-11-15
申请人： Sang Wook Hong , Young Suk Kim , Hyun Seok Seo
发明人： Sang Wook Hong , Young Suk Kim , Hyun Seok Seo
IPC分类号： D06F58/04
摘要： The present invention relates to a laundry machine having a drying function for drying an object to be dried, especially clothes. The laundry machine according to one embodiment of the present invention may be a circulating drying machine that supplies the hot air to an object to be dried, so as to remove water, and then condenses the water from the hot air and heats the condensed water to supply the heat to the object to be dried. At this time, condensing may be carried out using natural convection.
摘要翻译： 本发明涉及具有用于干燥待干燥物体，特别是衣物的干燥功能的洗衣机。 根据本发明的一个实施方式的洗衣机可以是将热空气供给到待干燥物体的循环干燥机，以除去水，然后将来自热空气的水冷凝并将冷凝水加热至 将热量供给待干燥的物体。 此时，可以使用自然对流进行冷凝。
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7.发明授权Liquid crystal drop apparatus for dropping liquid crytal using an electric field wherein a nozzle is arranged between a liquid crystal container and an electrode and an extending direction of the nozzle is perpendicular to a surface of the electrode 有权使用其中喷嘴布置在液晶容器和电极之间并且喷嘴的延伸方向垂直于电极的表面的电场来降低液体冷凝液的液晶滴设备公开(公告)号：US08647529B2
公开(公告)日：2014-02-11
申请号：US12585331
申请日：2009-09-11
申请人： Young Suk Kim
发明人： Young Suk Kim
IPC分类号： C09K19/52 , C09K19/00 , G03C5/26 , G02F1/1341
CPC分类号： G02F1/1341 , G02F2001/13415 , Y10T428/10
摘要： A liquid crystal drop apparatus for dropping liquid crystal on a substrate includes a liquid crystal container filled with liquid crystal, a nozzle formed at an lower end of the liquid crystal container for dropping the liquid crystal of the liquid crystal container, and a control unit for controlling the nozzle when the nozzle drops the liquid crystal.
摘要翻译： 用于将液晶滴落在基板上的液晶滴落装置包括：充满液晶的液晶容器，形成在用于使液晶容器的液晶滴下的液晶容器的下端的喷嘴;以及控制单元， 当喷嘴下降液晶时控制喷嘴。
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公开(公告)号：US08518785B2
公开(公告)日：2013-08-27
申请号：US13603577
申请日：2012-09-05
申请人： Yosuke Shimamune , Masahiro Fukuda , Young Suk Kim , Akira Katakami , Akiyoshi Hatada , Naoyoshi Tamura , Hiroyuki Ohta
发明人： Yosuke Shimamune , Masahiro Fukuda , Young Suk Kim , Akira Katakami , Akiyoshi Hatada , Naoyoshi Tamura , Hiroyuki Ohta
IPC分类号： H01L21/336
CPC分类号： H01L29/7848 , H01L29/165 , H01L29/665 , H01L29/6653 , H01L29/6659 , H01L29/66636 , H01L29/7833
摘要： A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.
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公开(公告)号：US20130031797A1
公开(公告)日：2013-02-07
申请号：US13638666
申请日：2010-05-28
申请人： Sang Wook Hong , Young Suk Kim , Hyun Seok Seo
发明人： Sang Wook Hong , Young Suk Kim , Hyun Seok Seo
IPC分类号： F26B21/00
摘要： The present invention relates to a laundry machine having a drying function for drying an object to be dried, especially clothes. The laundry machine according to one embodiment of the present invention may be a circulating drying machine that supplies the hot air to an object to be dried, so as to remove water, and then condenses the water from the hot air and heats the condensed water to supply the heat to the object to be dried. At this time, condensing may be carried out using natural convection.
摘要翻译： 本发明涉及具有用于干燥待干燥物体，特别是衣物的干燥功能的洗衣机。 根据本发明的一个实施方式的洗衣机可以是将热空气供给到待干燥物体的循环干燥机，以除去水，然后将来自热空气的水冷凝并将冷凝水加热至 将热量供给待干燥的物体。 此时，可以使用自然对流进行冷凝。
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10.发明授权Memory circuits, systems, and methods for providing bit line equalization voltages 有权用于提供位线均衡电压的存储器电路，系统和方法公开(公告)号：US08279686B2
公开(公告)日：2012-10-02
申请号：US12692512
申请日：2010-01-22
IPC分类号： G11C7/00
CPC分类号： G11C11/4094 , G11C11/4076
摘要： A memory circuit includes at least one memory cell for storing a charge representative of a datum. The memory cell is coupled with a word line and a first bit line. At least one bit line equalization transistor is coupled between the first bit line and a second bit line. A bit line equalization circuit is coupled with the bit line equalization transistor. The bit line equalization circuit is configured for providing a pulse to the bit line equalization transistor to substantially equalize voltages of the first bit line and the second bit line during a standby period before an access cycle of the memory cell.
摘要翻译： 存储电路包括至少一个用于存储表示数据的电荷的存储单元。 存储单元与字线和第一位线耦合。 至少一个位线均衡晶体管耦合在第一位线和第二位线之间。 位线均衡电路与位线均衡晶体管耦合。 位线均衡电路被配置为向位线均衡晶体管提供脉冲，以在存储单元的访问周期之前的待机期间基本上均衡第一位线和第二位线的电压。
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