公开(公告)号：US20120244662A1

公开(公告)日：2012-09-27

申请号：US13491279

申请日：2012-06-07

申请人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim ,  Young-Hwan Shin ,  Kyung-Ro Yoon

发明人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim ,  Young-Hwan Shin ,  Kyung-Ro Yoon

IPC分类号： H01L21/50

CPC分类号： H05K3/00 ,  H01L2224/16225 ,  H05K3/30 ,  Y10T29/49124

摘要： A single-layer board on chip package substrate and a manufacturing method thereof are disclosed. In accordance with an embodiment of the present invention, the single-layer board on chip package substrate includes an insulator, a circuit pattern and a flip-chip bonding pad, which are formed on an upper surface of the insulator, a conductive bump, which is in contact with a lower surface of the circuit pattern and penetrates through the insulator, a solder resist layer, which is formed on the upper surface of the insulator such that at least a portion of the flip-chip bonding pad is exposed, and a flip-chip bonding bump, which is formed on an upper surface of the flip-chip bonding pad in order to make a flip-chip connection with an electronic component.

摘要翻译： 公开了一种单层片上封装衬底及其制造方法。 根据本发明的实施例，片上封装衬底上的单层板包括形成在绝缘体上表面上的绝缘体，电路图案和倒装焊接焊盘，导体凸块， 与电路图案的下表面接触并穿透绝缘体，阻焊层，其形成在绝缘体的上表面上，使得至少一部分倒装芯片接合焊盘露出，并且 倒装芯片焊接凸块，其形成在倒装焊盘的上表面上，以便与电子部件进行倒装芯片连接。

公开(公告)号：US08889994B2

公开(公告)日：2014-11-18

申请号：US13018971

申请日：2011-02-01

申请人： Young-Ji Kim ,  Kyung-Ro Yoon ,  Sang-Duck Kim ,  Jung-Hyun Park ,  Nam-Keun Oh ,  Jong-Gyu Choi ,  Ji-Eun Kim

发明人： Young-Ji Kim ,  Kyung-Ro Yoon ,  Sang-Duck Kim ,  Jung-Hyun Park ,  Nam-Keun Oh ,  Jong-Gyu Choi ,  Ji-Eun Kim

IPC分类号： H05K1/16

CPC分类号： H05K1/11 ,  H05K3/06 ,  Y10T29/49144 ,  Y10T29/49156

摘要： A single layered printed circuit board and a method of manufacturing the same are disclosed. In accordance with an embodiment of the present invention, the method can include forming a bonding pad, a circuit pattern and a post on a surface of an insulation film, in which one end part of the post is electrically connected to at least a portion of the circuit pattern, pressing an insulator on the surface of the insulation film, in which the circuit pattern and the post are buried in the insulator, selectively etching the insulator such that the other end part of the post is exposed, and opening a portion of the insulation film such that at least a portion of the bonding pad is exposed.

摘要翻译： 公开了一种单层印刷电路板及其制造方法。 根据本发明的实施例，该方法可以包括在绝缘膜的表面上形成焊盘，电路图案和柱，其中柱的一个端部电连接到绝缘膜的至少一部分 电路图案，将电路图案和柱埋在绝缘体中的绝缘膜表面上的绝缘体按压绝缘体，选择性地蚀刻绝缘体，使得柱的另一端暴露，并且打开一部分 所述绝缘膜使得所述焊盘的至少一部分露出。

公开(公告)号：US20110186342A1

公开(公告)日：2011-08-04

申请号：US13018971

申请日：2011-02-01

申请人： Young-Ji KIM ,  Kyung-Ro Yoon ,  Sang-Duck Kim ,  Jung-Hyun Park ,  Nam-Keun Oh ,  Jong-Gyu Choi ,  Ji-Eun Kim

发明人： Young-Ji KIM ,  Kyung-Ro Yoon ,  Sang-Duck Kim ,  Jung-Hyun Park ,  Nam-Keun Oh ,  Jong-Gyu Choi ,  Ji-Eun Kim

IPC分类号： H05K1/11 ,  H05K3/06

CPC分类号： H05K1/11 ,  H05K3/06 ,  Y10T29/49144 ,  Y10T29/49156

摘要： A single layered printed circuit board and a method of manufacturing the same are disclosed. In accordance with an embodiment of the present invention, the method can include forming a bonding pad, a circuit pattern and a post on a surface of an insulation film, in which one end part of the post is electrically connected to at least a portion of the circuit pattern, pressing an insulator on the surface of the insulation film, in which the circuit pattern and the post are buried in the insulator, selectively etching the insulator such that the other end part of the post is exposed, and opening a portion of the insulation film such that at least a portion of the bonding pad is exposed.

摘要翻译： 公开了一种单层印刷电路板及其制造方法。 根据本发明的实施例，该方法可以包括在绝缘膜的表面上形成焊盘，电路图案和柱，其中柱的一个端部电连接到绝缘膜的至少一部分 电路图案，将电路图案和柱埋在绝缘体中的绝缘膜表面上的绝缘体按压绝缘体，选择性地蚀刻绝缘体，使得柱的另一端暴露，并且打开一部分 所述绝缘膜使得所述焊盘的至少一部分露出。

公开(公告)号：US20110110058A1

公开(公告)日：2011-05-12

申请号：US12748082

申请日：2010-03-26

申请人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim ,  Young-Hwan Shin ,  Kyung-Ro Yoon

发明人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim ,  Young-Hwan Shin ,  Kyung-Ro Yoon

IPC分类号： H05K7/02 ,  H05K3/00

CPC分类号： H05K3/00 ,  H01L2224/16225 ,  H05K3/30 ,  Y10T29/49124

摘要： A single-layer board on chip package substrate and a manufacturing method thereof are disclosed. In accordance with an embodiment of the present invention, the single-layer board on chip package substrate includes an insulator, a circuit pattern and a flip-chip bonding pad, which are formed on an upper surface of the insulator, a conductive bump, which is in contact with a lower surface of the circuit pattern and penetrates through the insulator, a solder resist layer, which is formed on the upper surface of the insulator such that at least a portion of the flip-chip bonding pad is exposed, and a flip-chip bonding bump, which is formed on an upper surface of the flip-chip bonding pad in order to make a flip-chip connection with an electronic component.

摘要翻译： 公开了一种单层片上封装衬底及其制造方法。 根据本发明的实施例，片上封装衬底上的单层板包括形成在绝缘体上表面上的绝缘体，电路图案和倒装焊接焊盘，导体凸块， 与电路图案的下表面接触并穿透绝缘体，阻焊层，其形成在绝缘体的上表面上，使得至少一部分倒装芯片接合焊盘露出，并且 倒装芯片焊接凸块，其形成在倒装焊盘的上表面上，以便与电子部件进行倒装芯片连接。

公开(公告)号：US08986555B2

公开(公告)日：2015-03-24

申请号：US12892047

申请日：2010-09-28

申请人： Ji-Eun Kim ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim

发明人： Ji-Eun Kim ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim

IPC分类号： H01B13/00 ,  H05K3/40 ,  H05K3/06 ,  H05K3/20

CPC分类号： H05K3/4007 ,  H05K3/061 ,  H05K3/205 ,  H05K2201/0367 ,  H05K2203/0152 ,  H05K2203/0376

摘要： A method of manufacturing a printed circuit board having a bump is disclosed. The method includes preparing a first carrier having a first circuit formed thereon, compressing the first carrier to one surface of an insulation layer such that the first circuit is buried, stacking an etching resist on the first carrier in accordance with where the bump is to be formed and forming the bump by etching the first carrier. In accordance with an embodiment of the present invention, the difference in height between a bump and its adjacent bump in a printed circuit board can be reduced, and thus electrical connection between an electronic component and the printed circuit board can be better implemented.

摘要翻译： 公开了一种制造具有凸块的印刷电路板的方法。 该方法包括制备其上形成有第一电路的第一载体，将第一载体压缩到绝缘层的一个表面，使得第一电路被掩埋，根据凸点将在第一载体上堆叠抗蚀剂 通过蚀刻第一载体形成和形成凸块。 根据本发明的实施例，可以减小印刷电路板中的凸块与其相邻凸块之间的高度差，从而可以更好地实现电子部件和印刷电路板之间的电连接。

公开(公告)号：US20110100952A1

公开(公告)日：2011-05-05

申请号：US12892047

申请日：2010-09-28

申请人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim

发明人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim

IPC分类号： H05K3/06

CPC分类号： H05K3/4007 ,  H05K3/061 ,  H05K3/205 ,  H05K2201/0367 ,  H05K2203/0152 ,  H05K2203/0376

摘要： A method of manufacturing a printed circuit board having a bump is disclosed. The method includes preparing a first carrier having a first circuit formed thereon, compressing the first carrier to one surface of an insulation layer such that the first circuit is buried, stacking an etching resist on the first carrier in accordance with where the bump is to be formed and forming the bump by etching the first carrier. In accordance with an embodiment of the present invention, the difference in height between a bump and its adjacent bump in a printed circuit board can be reduced, and thus electrical connection between an electronic component and the printed circuit board can be better implemented.

摘要翻译： 公开了一种制造具有凸块的印刷电路板的方法。 该方法包括制备其上形成有第一电路的第一载体，将第一载体压缩到绝缘层的一个表面，使得第一电路被掩埋，根据凸点将在第一载体上堆叠抗蚀剂 通过蚀刻第一载体形成和形成凸块。 根据本发明的实施例，可以减小印刷电路板中的凸块与其相邻凸块之间的高度差，从而可以更好地实现电子部件和印刷电路板之间的电连接。