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20 条记录 (耗时 0.019 秒)

    Hit-less protection switching method and apparatus for ATM transmission lines
    1.
    发明授权
    Hit-less protection switching method and apparatus for ATM transmission lines 失效
    无线保护切换方法和ATM传输线路设备

    公开(公告)号：US5315581A

    公开(公告)日：1994-05-24

    申请号：US744717

    申请日：1991-08-14

    申请人： Yukio Nakano ,  Akihiko Takase ,  Masahiro Takatori ,  Junichirou Yanagi

    发明人： Yukio Nakano ,  Akihiko Takase ,  Masahiro Takatori ,  Junichirou Yanagi

    IPC分类号： H04L1/22 ,  H04B1/74 ,  H04L12/70 ,  H04L12/801 ,  H04L12/911 ,  H04L29/14 ,  H04Q11/04 ,  H04L1/02

    CPC分类号： H04L49/3081 ,  H04B1/74 ,  H04L69/40 ,  H04Q11/0478 ,  H04L2012/5627

    摘要： A hit-less protection switching method and apparatus therefor for ATM transmission lines for selecting first cells from normal received signals and writing the same into a normal cell buffer, selecting second cells from emergency received signals and writing the same into an emergency cell buffer, reading the first cells from the normal cell buffer after a first delay time, reading the second cells from the emergency cell buffer after a second delay time, comparing the contents of the first cell with the contents of the second cell and changing the difference between the first delay time and the second delay time, when a state of discrepancy between the contents of the first cell and the contents of the second cell is continuously detected for a predetermined time, to dissolve the state of discrepancy, and selecting one of the cells read from the normal cell buffer and the emergency cell buffer with a delay as communications information.

    摘要翻译： 一种无线保护切换方法及其装置，用于ATM传输线路，用于从正常接收信号中选择第一小区并将其写入正常小区缓冲器，从紧急接收信号中选择第二小区并将其写入紧急小区缓冲器，读取 在第一延迟时间之后，来自正常单元缓冲器的第一个单元，在第二延迟时间之后从紧急单元缓冲器读取第二单元，将第一单元的内容与第二单元的内容进行比较，并且改变第一单元 延迟时间和第二延迟时间，当在预定时间内连续检测到第一单元的内容与第二单元的内容之间的差异的状态以解决差异的状态时，并且从 正常小区缓冲区和具有延迟的紧急小区缓冲区作为通信信息。

    Traffic shaping method and circuit
    5.
    发明授权
    Traffic shaping method and circuit 失效
    流量整形方法及电路

    公开(公告)号：US5280475A

    公开(公告)日：1994-01-18

    申请号：US745466

    申请日：1991-08-14

    申请人： Junichirou Yanagi ,  Akihiko Takase ,  Takahiko Kozaki ,  Shinobu Gohara

    发明人： Junichirou Yanagi ,  Akihiko Takase ,  Takahiko Kozaki ,  Shinobu Gohara

    IPC分类号： H04Q3/00 ,  H04L12/815 ,  H04L12/863 ,  H04L12/931 ,  H04L12/951 ,  H04Q11/04 ,  H04L12/56

    CPC分类号： H04L12/5601 ,  H04L12/5602 ,  H04L49/108 ,  H04L49/255 ,  H04L49/3081 ,  H04Q11/0478 ,  H04L2012/568

    摘要： A traffic shaping method and circuit of a packet switching system in which input packets having a fixed length and multiplexed on a plurality of inputs are multiplexed to be delivered on any output of a plurality of outputs, connects the input packet to a list structure using an address chain formed for each output, forms the list structure even for each line identifier provided in the packet, and assigns the identifier for each time slot of the output to take out the packet from the list structure, to thereby prevent the packet having the same identifier from being multiplexed and delivering to the output continuously.

    摘要翻译： 一种分组交换系统的流量整形方法和电路，其中具有固定长度并在多个输入上复用的输入分组被多路复用以在多个输出的任何输出上传送，将输入分组连接到列表结构，使用 为每个输出形成的地址链，甚至对于分组中提供的每个行标识符也形成列表结构，并且分配输出的每个时隙的标识符以从列表结构中取出分组，从而防止具有相同的分组 标识符被多路复用并连续传送到输出。

    Cell delineation method and cell delineation circuit
    6.
    发明授权
    Cell delineation method and cell delineation circuit 失效
    细胞描绘方法和细胞描绘电路

    公开(公告)号：US5155487A

    公开(公告)日：1992-10-13

    申请号：US664115

    申请日：1991-03-04

    申请人： Katuyoshi Tanaka ,  Junichirou Yanagi ,  Akihiko Takase

    发明人： Katuyoshi Tanaka ,  Junichirou Yanagi ,  Akihiko Takase

    IPC分类号： H04L7/08 ,  H03M13/09 ,  H04L1/00 ,  H04L7/00 ,  H04L7/04 ,  H04L12/70 ,  H04L12/951

    CPC分类号： H04L1/0061 ,  H03M13/091 ,  H04L1/0043 ,  H04L2012/5674

    摘要： In a cell delineation circuit, an input signal is converted into parallel signals, and a plurality of parallel signals (i.e. series of parallel signals) which are shifted one bit by one bit from each other are formed from those parallel signals. CRC (Cyclic Redundancy Check) calculations are executed in parallel for the plurality of parallel signals. A series in which a pattern to be calculated satisfies a CRC rule is determined from results of the CRC calculations, and this series is generated, thereby establishing a cell delineation.

    摘要翻译： 在单元描绘电路中，输入信号被转换成并行信号，并且由这些并行信号形成彼此移位一比特的多个并行信号（即并行信号串）。 针对多个并行信号并行执行CRC（循环冗余校验）计算。 根据CRC计算的结果确定其中要计算的模式满足CRC规则的一系列，并且生成该系列，由此建立单元描绘。

    Shared buffer memory type ATM communication system and method with a broadcast facility
    7.
    发明授权
    Shared buffer memory type ATM communication system and method with a broadcast facility 失效
    共享缓冲存储器类型ATM通信系统和方法与广播设施

    公开(公告)号：US5394397A

    公开(公告)日：1995-02-28

    申请号：US38615

    申请日：1993-03-29

    申请人： Junichirou Yanagi ,  Yoshihiro Ashi ,  Takahiko Kozaki ,  Akihiko Takase ,  Takashi Nakashima

    发明人： Junichirou Yanagi ,  Yoshihiro Ashi ,  Takahiko Kozaki ,  Akihiko Takase ,  Takashi Nakashima

    IPC分类号： H04M3/42 ,  H04L12/18 ,  H04L12/761 ,  H04L12/931 ,  H04L12/951 ,  H04Q3/52 ,  H04Q11/04 ,  H04L12/56 ,  H04J3/26 ,  H04L12/48

    CPC分类号： H04L12/5601 ,  H04L49/108 ,  H04L49/203 ,  H04L49/309

    摘要： An ATM switching system which includes an input interface which is provided every incoming line and serves to convert header information of each input cell into internal routing information, a shared buffer memory and a cell writing control unit which forms normal cell list structures, which are prepared in correspondence to outgoing lines and in which a plurality of normal cells are chained together with their next addresses, and a broadcast cell list structure, in which a plurality of broadcast cells are chained together with their next addresses, in the shared buffer memory, and serves to add successively the input cells to ones of the list structures, which are selected in correspondence to respective internal routing information. The invention also includes a cell reading control unit which serves to fetch selectively the cell from the list structures formed in the shared buffer memory to distribute the cell thus fetched to the associated outgoing lines. The cell reading control unit includes a broadcast destination table for "storing broadcast destination specifying information for specifying the outgoing lines, through which the broadcast cell is to be output, using a bit pattern, in correspondence to the internal routing information of the broadcast cell".

    摘要翻译： 一种ATM交换系统，其包括为每条输入线路提供的输入接口，用于将每个输入单元的头信息转换为内部路由信息，共享缓冲存储器和形成正常小区列表结构的小区写入控制单元，其被准备 对应于输出线，并且其中多个正常小区与其下一个地址一起链接在一起，以及广播小区列表结构，其中多个广播小区与其下一个地址一起连接在共享缓冲存储器中，以及 用于将输入单元连续地添加到与各个内部路由信息相对应地选择的列表结构中的一个。 本发明还包括一个单元读取控制单元，用于从形成在共享缓冲存储器中的列表结构中选择性地提取单元，以将由此提取的单元分配到相关联的输出行。 小区读取控制单元包括：广播目的地表，用于根据广播小区的内部路由信息，使用位模式存储用于指定要输出广播小区的出行的广播目的地指定信息; 。

    System switching method and apparatus without loss of signal in cell switching system of asynchronous transfer mode
    8.
    发明授权
    System switching method and apparatus without loss of signal in cell switching system of asynchronous transfer mode 失效
    异步传输模式小区交换系统中系统切换方式和设备信号丢失

    公开(公告)号：US5283782A

    公开(公告)日：1994-02-01

    申请号：US745332

    申请日：1991-08-15

    申请人： Akihiko Takase ,  Yoshihiro Ashi ,  Takashi Mori ,  Junichirou Yanagi

    发明人： Akihiko Takase ,  Yoshihiro Ashi ,  Takashi Mori ,  Junichirou Yanagi

    IPC分类号： H04L1/22 ,  H04L12/70 ,  H04L12/931 ,  H04L25/30 ,  H04Q11/04 ,  H04J1/16

    CPC分类号： H04L49/105 ,  H04L49/153 ,  H04L49/552 ,  H04Q11/0478 ,  H04L2012/5627 ,  H04L49/1515

    摘要： In a communication apparatus using an asynchronous transfer mode, there is provided a system switching method, and apparatus, without loss of signal for performing cell multiplexing or cell switching in a duplex system including a primary system and a standby system. In system switching, control information for switching between the primary system and the standby system is prepared. When a cell is inputted to the communication apparatus, the prepared control information is appended in a header portion of the cell. The cell with control information appended thereto is transmitted to the duplex system including the primary system and the standby system. On the basis of the control information, cell transfer of each system is controlled.

    摘要翻译： 在使用异步传送模式的通信装置中，提供了一种系统切换方法和装置，在包括主系统和备用系统的双工系统中，不丢失用于进行小区复用或小区切换的信号。 在系统切换中，准备用于在主系统和备用系统之间切换的控制信息。 当单元被输入到通信设备时，所准备的控制信息被附加在单元的报头部分中。 具有附加控制信息的信元被发送到包括主系统和备用系统的双工系统。 在控制信息的基础上，控制每个系统的单元传送。

    ATM network system and connection admission control method
    9.
    发明授权
    ATM network system and connection admission control method 失效
    ATM网络系统和连接准入控制方法

    公开(公告)号：US5894471A

    公开(公告)日：1999-04-13

    申请号：US746874

    申请日：1996-11-15

    申请人： Morihito Miyagi ,  Junichirou Yanagi

    发明人： Morihito Miyagi ,  Junichirou Yanagi

    IPC分类号： H04Q3/00 ,  H04L12/70 ,  H04L12/801 ,  H04L12/911 ,  H04Q11/04 ,  H04J1/16 ,  H04J3/14

    CPC分类号： H04Q11/0478 ,  H04L2012/5624 ,  H04L2012/5626 ,  H04L2012/563 ,  H04L2012/5632

    摘要： Apparatus for executing the connection admission control for PVC and SVC efficiently in an ATM network system which includes a network management equipment and a network equipment. The control function of the network management equipment executes resource allocation to PVC and SVC and notifies the network equipment of resource management information for SVC. For a request of PVC setup, the control function of the network management equipment executes the connection admission control for PVC and notifies the network equipment of the admission result. For a request of SVC setup, the network equipment executes the connection admission control for SVC. Communication overhead is reduced since it is not necessary to inquire the network equipment about connection admission from the network management equipment during PVC setup. Furthermore, the network equipment can count call blocking of SVC.

    摘要翻译： 用于在包括网络管理设备和网络设备的ATM网络系统中有效地执行PVC和SVC的连接准入控制的装置。 网络管理设备的控制功能对PVC和SVC执行资源分配，并向网络设备通知SVC的资源管理信息。 对于PVC设置的请求，网络管理设备的控制功能执行PVC的连接准入控制，并通知网络设备的入站结果。 对于SVC设置的请求，网络设备执行SVC的连接准入控制。 由于在PVC设置期间不需要向网络设备询问网络管理设备的接入是否需要通信开销。 此外，网络设备可以计算SVC的呼叫阻塞。

    ATM communication system
    10.
    发明授权
    ATM communication system 失效
    ATM通信系统

    公开(公告)号：US5740158A

    公开(公告)日：1998-04-14

    申请号：US728786

    申请日：1996-10-10

    申请人： Kaoru Aoki ,  Masataka Takano ,  Junichirou Yanagi ,  Tetsushi Nakano ,  Miho Iino

    发明人： Kaoru Aoki ,  Masataka Takano ,  Junichirou Yanagi ,  Tetsushi Nakano ,  Miho Iino

    IPC分类号： H04L12/56 ,  H04Q11/04 ,  H04L12/437

    CPC分类号： H04Q11/0478 ,  H04L2012/5612 ,  H04L2012/562 ,  H04L2012/5625 ,  H04L2012/5674

    摘要： An ATM communication system including a plurality of communication nodes connected in a loop form by buses, buffers disposed in each communication node, a synchronizing pulse generation circuit for conducting cell demultiplexing of all communication nodes at the same timing, storage devices disposed in each communication node to store mounting position information of the communication node and slot generator position information, and a circuit used by each communication node to automatically transmit and receive cells on the basis of position information described above.

    摘要翻译： 一种ATM通信系统，包括通过总线连接的多个通信节点，设置在每个通信节点中的缓冲器，用于在相同定时进行所有通信节点的小区解复用的同步脉冲生成电路，设置在每个通信节点中的存储设备 存储通信节点的安装位置信息和时隙发生器位置信息，以及每个通信节点根据上述位置信息自动发送和接收信元的电路。