公开(公告)号：US20160323995A1

公开(公告)日：2016-11-03

申请号：US15108405

申请日：2014-05-21

Applicant: ZTE CORPORATION

Inventor： Bi YI ,  Fengchao MA ,  Yonghui REN ,  Wang XIONG ,  Yingxin WANG

IPC: H05K1/02 ,  H05K1/09 ,  H05K3/46 ,  H05K1/11 ,  H05K3/42 ,  H05K3/00

CPC classification number: H05K1/0298 ,  H05K1/09 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/424 ,  H05K3/429 ,  H05K3/4611 ,  H05K3/4623 ,  H05K2201/10303 ,  H05K2203/0207 ,  H05K2203/16

Abstract: The present disclosure discloses a PCB processing method and a PCB. The method includes: respectively carrying out laminating processing on a plurality of PCB daughter boards constituting a PCB, and drilling and electroplating the top-most PCB daughter board to form a via hole; and laminating the plurality of PCB daughter boards together to form the PCB, and drilling and electroplating the formed PCB to form a through hole for mounting a connector, wherein a blind hole for mounting a connector is formed by the via hole, and a depth of the blind hole is greater than or equal to the length of a signal pin of the connector. By virtue of the technical scheme of the present disclosure, a space between wafers of the lower layer of PCBs may be doubled, and the space for layout between wafers may be doubled.

Abstract translation: 本公开公开了一种PCB处理方法和PCB。 该方法包括：分别在构成PCB的多个PCB子板上进行层压处理，以及对最顶层的PCB​​子板进行钻孔和电镀以形成通孔; 并且将多个PCB子板层压在一起以形成PCB，并且对所形成的PCB进行钻孔和电镀以形成用于安装连接器的通孔，其中用于安装连接器的盲孔由通孔形成，并且深度 盲孔大于或等于连接器的信号针的长度。 由于本公开的技术方案，PCB的下层的晶片之间的间隔可以加倍，并且晶片之间的布局空间可以加倍。

公开(公告)号：US20220304152A1

公开(公告)日：2022-09-22

申请号：US17635916

申请日：2020-09-15

Applicant: ZTE Corporation

Inventor： Changgang YIN ,  Bi YI ,  Zhongmin WEI

IPC: H05K1/11

Abstract: A circuit board is disclosed, including a circuit board body and at least one via apparatus provided on the circuit board body. The via apparatus includes a via (101) formed on the circuit board body, a via pad (201) surrounding the via and separately provided from the via, and an electrical conductor (301) electrically connecting the via pad (201) with the via (101).

公开(公告)号：US20240397612A1

公开(公告)日：2024-11-28

申请号：US18695079

申请日：2022-03-14

Applicant: ZTE Corporation

Inventor： Xindan ZHANG ,  Zhongmin WEI ,  Bi YI ,  Yonghui REN ,  Yu BI

IPC: H05K1/02 ,  H05K1/11

Abstract: Embodiments of the present disclosure relate to the technical field of signal transmission, and in particular to a printed circuit board and a signal transmission system. In the printed circuit board, a first signal line (140) extends, by means of passing through a second hole segment (135) and a fourth hole segment (137), from one first differential signal hole pair (121) of a first column structural unit (120) to the side of a second column structural unit (130) that is away from the first column structural unit; or, a first signal line (340) extends, by means of passing through two adjacent second ground holes (332), from one first differential signal hole pair (321) of a first column structural unit (320) to the side of a second column structural unit (330) that is away from the first column structural unit (320).

公开(公告)号：US20240388020A1

公开(公告)日：2024-11-21

申请号：US18691532

申请日：2022-03-14

Applicant: ZTE Corporation

Inventor： Xindan ZHANG ,  Zhongmin WEI ,  Bi YI ,  Yonghui REN ,  Yu BI

IPC: H01R12/53 ,  H01R11/01 ,  H01R13/6591 ,  H05K1/02

Abstract: Provided in embodiments of the present disclosure are a cable connection structure, a cable connection component, and an electrical interconnection system. The cable connection structure includes a conductive part and a fixing part for fixing the conductive part. The conductive part includes at least one pair of first signal conductors arranged at an interval in a first direction, and at least one pair of second signal conductors arranged at an interval in a second direction. The first signal conductor is electrically connected to a first-type cable. The second signal conductor is electrically connected to a second-type cable with a diameter greater than that of the first-type cable. The first signal conductors are electrically connected to the second signal conductors in one-to-one correspondence. A width of the first signal conductor in the first direction is less than a width of the second signal conductor in the second direction.

公开(公告)号：US20230400635A1

公开(公告)日：2023-12-14

申请号：US18033891

申请日：2021-10-27

Applicant: ZTE CORPORATION

Inventor： Xiaolin CHEN ,  Hao TIAN ,  Yonghui REN ,  Bi YI

IPC: G02B6/125 ,  G01M11/00

CPC classification number: G02B6/125 ,  G01M11/33

Abstract: Provided are a method for determining parameters of a waveguide core in an optical-electronic printed circuit board, an optical-electronic printed circuit board, an electronic device, and a storage medium. The method includes: determining, according to a refractive index of a material from which the waveguide core is made and a refractive index of a material from which a base layer is made, a critical angle of total reflection at an interface between the waveguide core and the base layer; and determining the parameters of the waveguide core according to a relative positional relationship between one end port of the waveguide core and the other end port of the waveguide core in the optical-electronic printed circuit board, a condition of a region through which the waveguide core passes, and the critical angle, so that steering of the waveguide core is achieved without introducing a curved surface to the waveguide core.

公开(公告)号：US20220369451A1

公开(公告)日：2022-11-17

申请号：US17761180

申请日：2020-09-24

Applicant: ZTE CORPORATION

Inventor： Jinlong LI ,  Xindan ZHANG ,  Bi YI ,  Zhongmin WEI

IPC: H05K1/02

Abstract: Embodiments of the present disclosure relate to the field of communication device technology, which provide a circuit board including a first signal line and a second signal line that are disposed adjacent to each other, a ground plane, and a conductive layer connected to the ground plane. The conductive layer is disposed between the first signal line and the second signal line. Embodiments of the present disclosure further provide a communication device.

公开(公告)号：US20210392744A1

公开(公告)日：2021-12-16

申请号：US17282410

申请日：2019-09-27

Applicant: ZTE CORPORATION

Inventor： Changgang YIN ,  Yingxin WANG ,  Bi YI ,  Huazhang CAO

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/42

Abstract: Provided are a circuit board, an apparatus and a method for forming a via hole structure. A via hole structure formed on a main body (10) of a circuit board includes a hole (12) enclosed by a conductive layer in the main body (10), the conductive layer constitutes a wall (11) of the hole (12), and a dielectric filling layer (13), which has a dielectric constant smaller than that of the main body (10), is disposed between at least a portion of the wall (11) of the hole (12) and the main body (10), so that the parasitic capacitance of a via hole is decreased, and the impedance of the via hole is increased to become closer to the impedance of a transmission line, thereby effectively improving impedance continuity of a system link.