INTEGRATED MULTIPLEXER/DEMULTIPLEXER HAVING OFFSET TRANSMITTERS AND RECEIVERS FOR USE IN AN OPTICAL TRANSCEIVER MODULE
    1.
    发明申请
    INTEGRATED MULTIPLEXER/DEMULTIPLEXER HAVING OFFSET TRANSMITTERS AND RECEIVERS FOR USE IN AN OPTICAL TRANSCEIVER MODULE 有权
    具有偏移发射机和接收器的集成多路复用器/解复用器用于光收发模块

    公开(公告)号:US20080292317A1

    公开(公告)日:2008-11-27

    申请号:US11943817

    申请日:2007-11-21

    IPC分类号: H04J14/02

    摘要: An apparatus for use in an optical transceiver module that incorporates an integrated multiplexer/demultiplexer for high speed data transfer applications. One example embodiment includes a transmissive block arranged to interface with a transmit optical port, a receive optical port, and a plurality of optical subassemblies. The transmit optical port may transmit a first multiplexed optical signal and the receive optical port may receive a second multiplexed optical signal. Filters may be positioned between the transmissive block and one or more of the optical subassemblies to transmit signals at predetermined wavelengths while reflecting other signals incident thereon.

    摘要翻译: 一种用于光收发器模块的装置,其包括用于高速数据传输应用的集成多路复用器/解复用器。 一个示例实施例包括布置成与发射光端口,接收光端口和多个光学子组件接口的透射块。 发射光端口可以发送第一复用光信号,并且接收光端口可以接收第二复用光信号。 滤波器可以位于透射块和一个或多个光学子组件之间,以以预定波长传输信号,同时反射入射在其上的其它信号。

    Integrated multiplexer/demultiplexer having offset transmitters and receivers for use in an optical transceiver module
    2.
    发明授权
    Integrated multiplexer/demultiplexer having offset transmitters and receivers for use in an optical transceiver module 有权
    具有用于光收发器模块的偏移发射器和接收器的集成多路复用器/解复用器

    公开(公告)号:US07933521B2

    公开(公告)日:2011-04-26

    申请号:US11943817

    申请日:2007-11-21

    IPC分类号: H04J14/02 H04B10/00

    摘要: An apparatus for use in an optical transceiver module that incorporates an integrated multiplexer/demultiplexer for high speed data transfer applications. One example embodiment includes a transmissive block arranged to interface with a transmit optical port, a receive optical port, and a plurality of optical subassemblies. The transmit optical port may transmit a first multiplexed optical signal and the receive optical port may receive a second multiplexed optical signal. Filters may be positioned between the transmissive block and one or more of the optical subassemblies to transmit signals at predetermined wavelengths while reflecting other signals incident thereon.

    摘要翻译: 一种用于光收发器模块的装置,其包括用于高速数据传输应用的集成多路复用器/解复用器。 一个示例实施例包括布置成与发射光端口,接收光端口和多个光学子组件接口的透射块。 发射光端口可以发送第一复用光信号,并且接收光端口可以接收第二复用光信号。 滤波器可以位于透射块和一个或多个光学子组件之间,以以预定波长传输信号,同时反射入射在其上的其它信号。

    Multimode Reflective Tap
    3.
    发明申请
    Multimode Reflective Tap 有权
    多模反光丝锥

    公开(公告)号:US20090257714A1

    公开(公告)日:2009-10-15

    申请号:US12103365

    申请日:2008-04-15

    IPC分类号: G02B6/32

    CPC分类号: G02B6/327 G02B6/14

    摘要: A glass optical reflective tap is described that optically connects two optical fibers and may tap a portion of the light that is being communicated between the optical fibers. In one embodiment of the invention, the optical filter includes two D-lenses that operate as focusing or collimator lenses. The first D-lens focuses an optical signal onto a tap filter that allows a majority of the light within an optical signal to pass and also reflects a small portion of optical signal light to a reflective port. The second D-lens focuses the passed light into a transmission port of an optical fiber.

    摘要翻译: 描述了玻璃光学反射抽头,其光学地连接两根光纤并且可以抽出正在光纤之间连通的一部分光。 在本发明的一个实施例中,滤光器包括作为聚焦或准直透镜操作的两个D透镜。 第一个D透镜将光信号聚焦到抽头滤波器上,允许光信号内的大部分光通过,并将一小部分光信号光反射到反射端口。 第二个D镜头将通过的光线聚焦到光纤的传输端口。

    Multimode reflective tap
    4.
    发明授权
    Multimode reflective tap 有权
    多模反光丝锥

    公开(公告)号:US07660498B2

    公开(公告)日:2010-02-09

    申请号:US12103365

    申请日:2008-04-15

    IPC分类号: G02B6/32

    CPC分类号: G02B6/327 G02B6/14

    摘要: A glass optical reflective tap is described that optically connects two optical fibers and may tap a portion of the light that is being communicated between the optical fibers. In one embodiment of the invention, the optical filter includes two D-lenses that operate as focusing or collimator lenses. The first D-lens focuses an optical signal onto a tap filter that allows a majority of the light within an optical signal to pass and also reflects a small portion of optical signal light to a reflective port. The second D-lens focuses the passed light into a transmission port of an optical fiber.

    摘要翻译: 描述了玻璃光学反射抽头,其光学地连接两根光纤并且可以抽出正在光纤之间连通的一部分光。 在本发明的一个实施例中,滤光器包括作为聚焦或准直透镜操作的两个D透镜。 第一个D透镜将光信号聚焦到抽头滤波器上,允许光信号内的大部分光通过,并将一小部分光信号光反射到反射端口。 第二个D镜头将通过的光线聚焦到光纤的传输端口。

    LTR/OBFF DESIGN SCHEME FOR ETHERNET ADAPTER APPLICATION
    5.
    发明申请
    LTR/OBFF DESIGN SCHEME FOR ETHERNET ADAPTER APPLICATION 审中-公开
    用于以太网适配器的LTR / OBFF设计方案

    公开(公告)号:US20160162421A1

    公开(公告)日:2016-06-09

    申请号:US14907649

    申请日:2013-08-07

    IPC分类号: G06F13/20 G06F13/40 G06F13/42

    摘要: A method of reducing power consumption in a computing platform is disclosed. An endpoint-device that is coupled to the computing platform includes a first data buffer and a second data buffer. The first data buffer buffers outgoing data to be transmitted to an external device via a first communications medium. The second data buffer buffers incoming data received from the external device via the first communications medium. At least one of the first or second data buffers may selectively communicate with the computing platform, via a second communications medium, during an active window of the other data buffer. The active window may be requested by the first and/or second data buffers based, at least in part, on a system idle signal. For some embodiments, the first communications medium is an Ethernet link. Further, for some embodiments, the second communications medium is a Peripheral Component Interconnect Express (PCIe) link.

    摘要翻译: 公开了一种降低计算平台功耗的方法。 耦合到计算平台的端点设备包括第一数据缓冲器和第二数据缓冲器。 第一数据缓冲器缓冲经由第一通信介质发送到外部设备的输出数据。 第二数据缓冲器缓冲经由第一通信介质从外部设备接收的输入数据。 第一或第二数据缓冲器中的至少一个可以在另一数据缓冲器的活动窗口期间经由第二通信介质选择性地与计算平台通信。 至少部分地基于系统空闲信号,可以由第一和/或第二数据缓冲器请求活动窗口。 对于一些实施例,第一通信介质是以太网链路。 此外,对于一些实施例,第二通信介质是外围组件互连Express(PCIe)链路。

    Bitline floating during non-access mode for memory arrays
    6.
    发明授权
    Bitline floating during non-access mode for memory arrays 有权
    位线在内存阵列的非访问模式下浮动

    公开(公告)号:US08982659B2

    公开(公告)日:2015-03-17

    申请号:US12645623

    申请日:2009-12-23

    IPC分类号: G11C5/14 G11C7/12 G11C11/413

    CPC分类号: G11C7/12 G11C5/141 G11C11/413

    摘要: Techniques are disclosed that allow for power conservation in integrated circuit memories, such as SRAM. The techniques can be embodied in circuitry that allows for floating of bitlines to eliminate or otherwise reduce power leakage associated with precharging bitlines. For instance, the techniques can be embodied in a bitline floating circuit having a single logic gate for qualifying the precharge control signal with a wake signal, so that precharging of the bitline does not occur if the wake signal is not in an active state. The techniques further allow for the elimination or reduction of unnecessary power consumption by the I/O circuitry or the memory array, such as when the memory array is not being accessed or when the array or a portion thereof is permanently disabled for yield recovery.

    摘要翻译: 公开了允许诸如SRAM的集成电路存储器中的功率节省的技术。 这些技术可以体现在允许位线漂移以消除或以其他方式减少与预充电位线相关联的功率泄漏的电路中。 例如,这些技术可以体现在具有用于通过唤醒信号对预充电控制信号进行限定的单个逻辑门的位线浮动电路中,从而如果唤醒信号不处于活动状态,则不会发生预充电位线。 这些技术还允许消除或减少I / O电路或存储器阵列的不必要的功率消耗,例如当存储器阵列未被访问时或者当阵列或其一部分被永久禁用以用于产量恢复时。

    Programmable read only memory
    9.
    发明申请
    Programmable read only memory 有权
    可编程只读存储器

    公开(公告)号:US20100046269A1

    公开(公告)日:2010-02-25

    申请号:US12229117

    申请日:2008-08-20

    IPC分类号: G11C17/00 H01L21/82 G11C11/34

    CPC分类号: G11C17/16 G11C17/18

    摘要: An array of memory cells is disclosed. The memory cell includes a fuse and at least one transistor. The transistor is used to control the programming or sensing of the fuse. A program voltage is applied to a stack of first and second conductive layers. A first portion of the stack couples the program voltage to a terminal of the transistor in a cell. A second portion of the stack couples the program voltage to a terminal of the transistor in another cell.

    摘要翻译: 公开了一组存储器单元。 存储单元包括熔丝和至少一个晶体管。 晶体管用于控制保险丝的编程或感测。 将编程电压施加到第一和第二导电层的堆叠。 堆叠的第一部分将编程电压耦合到单元中的晶体管的端子。 堆叠的第二部分将编程电压耦合到另一个单元中的晶体管的端子。

    Fuse cell having adjustable sensing margin
    10.
    发明授权
    Fuse cell having adjustable sensing margin 有权
    具有可调节传感距离的保险丝盒

    公开(公告)号:US07417913B2

    公开(公告)日:2008-08-26

    申请号:US11377135

    申请日:2006-03-15

    IPC分类号: G11C17/18

    CPC分类号: G11C17/18 G11C17/16

    摘要: An apparatus, a method, and a system for fuse cells are disclosed herein. In various embodiments, a fuse cell may include circuitry to adjust a sensing margin. A fuse cell may include first and second fuse cells, and first and second resistance devices. The first resistance device may be configured to adjust a first voltage output from the first fuse cell, and the second resistance device may be configured to adjust a second voltage output from the second fuse cell. The first and second resistance devices may be configured adjust the first and second voltages asymmetrically.

    摘要翻译: 本文公开了一种用于熔丝电池的装置,方法和系统。 在各种实施例中,熔丝单元可以包括用于调整感测余量的电路。 熔丝单元可以包括第一和第二熔丝单元,以及第一和第二电阻装置。 第一电阻装置可以被配置为调整从第一熔丝单元输出的第一电压,并且第二电阻装置可以被配置为调整从第二熔丝单元输出的第二电压。 第一和第二电阻装置可以被配置为不对称地调节第一和第二电压。