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公开(公告)号：US08445885B2
公开(公告)日：2013-05-21
申请号：US13132058
申请日：2009-12-01
IPC分类号： H01L29/02
CPC分类号： H01L27/101 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A nonvolatile memory element includes first and second electrodes, and a resistance variable layer disposed therebetween. At least one of the first and second electrodes includes a platinum-containing layer. The resistance variable layer includes a first oxygen-deficient transition metal oxide layer which is not physically in contact with the platinum-containing layer and a second oxygen-deficient transition metal oxide layer which is disposed between the first oxygen-deficient transition metal oxide layer and the platinum-containing layer and is physically in contact with the platinum-containing layer. When oxygen-deficient transition metal oxides included in the first and second oxygen-deficient transition metal oxide layers are expressed as MOx, and MOy, respectively, x
摘要翻译： 非易失性存储元件包括第一和第二电极以及设置在它们之间的电阻变化层。 第一和第二电极中的至少一个包括含铂层。 电阻变化层包括不与含铂层物理接触的第一缺氧过渡金属氧化物层和设置在第一缺氧过渡金属氧化物层和第二缺氧过渡金属氧化物层之间的第二缺氧过渡金属氧化物层 所述含铂层并且与所述含铂层物理接触。 包含在第一和第二缺氧过渡金属氧化物层中的缺氧过渡金属氧化物分别表示为MOx，MOy分别表示为x
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公开(公告)号：US20110233510A1
公开(公告)日：2011-09-29
申请号：US13132058
申请日：2009-12-01
IPC分类号： H01L47/00
CPC分类号： H01L27/101 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A nonvolatile memory element of the present invention comprises a first electrode (103); a second electrode (109); and a resistance variable layer (106) disposed between the first electrode and the second electrode, resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the first electrode and the second electrode; at least one of the first electrode and the second electrode including a platinum-containing layer (107) comprising platinum; the resistance variable layer including at least a first oxygen-deficient transition metal oxide layer (104) which is not physically in contact with the platinum-containing layer and a second oxygen-deficient transition metal oxide layer (105) which is disposed between the first oxygen-deficient transition metal oxide layer and the platinum-containing layer and is physically in contact with the platinum-containing layer; x
摘要翻译： 本发明的非易失性存储元件包括第一电极（103） 第二电极（109）; 以及设置在所述第一电极和所述第二电极之间的电阻变化层（106），所述电阻变化层的电阻值响应于施加在所述第一电极和所述第二电极之间的电信号而可逆地变化; 所述第一电极和所述第二电极中的至少一个包括含铂的含铂层（107） 所述电阻变化层至少包括不与所述含铂层物理接触的第一缺氧过渡金属氧化物层（104）和第二缺氧过渡金属氧化物层（105），所述第二缺氧过渡金属氧化物层（105）设置在所述第一 氧缺陷型过渡金属氧化物层和含铂层，并且与含铂层物理接触; 当第一缺氧过渡金属氧化物层中包含的缺氧过渡金属氧化物被表示为MOx时，x
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3.发明申请NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY APPARATUS, AND METHOD OF WRITING DATA TO NONVOLATILE MEMORY ELEMENT 审中-公开非易失性存储器元件，非易失性存储器件以及将数据写入非易失性存储器元件的方法公开(公告)号：US20100188884A1
公开(公告)日：2010-07-29
申请号：US12667856
申请日：2009-04-13
CPC分类号： H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/1625
摘要： A nonvolatile memory element comprises a first electrode (503), a second electrode (505), and a resistance variable layer (504) disposed between the first electrode and the second electrode, a resistance value between the first electrode and the second electrode being switchable reversibly in response to positive and negative electric signals applied between the first electrode and the second electrode; wherein the resistance variable layer includes an oxygen-deficient hafnium oxide; wherein the first electrode and the second electrode comprise elements which are different from each other; and wherein a standard electrode potential V1 of an element forming the first electrode, a standard electrode potential V2 of an element forming the second electrode and a standard electrode potential V0 of hafnium satisfy a relationship of V1
摘要翻译： 非易失性存储元件包括第一电极（503），第二电极（505）和设置在第一电极和第二电极之间的电阻变化层（504），第一电极和第二电极之间的电阻值可切换 响应于施加在第一电极和第二电极之间的正和负电信号而可逆地反转; 其中所述电阻变化层包括缺氧氧化铪; 其中所述第一电极和所述第二电极包括彼此不同的元件; 并且其中形成第一电极的元件的标准电极电位V1，形成第二电极的元件的标准电极电位V2和铪的标准电极电位V0满足V1
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公开(公告)号：US20140061579A1
公开(公告)日：2014-03-06
申请号：US13995383
申请日：2012-10-22
申请人： Zhiqiang Wei , Takeshi Takagi , Koji Katayama
发明人： Zhiqiang Wei , Takeshi Takagi , Koji Katayama
CPC分类号： H01L45/145 , G11C11/5685 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2213/15 , H01L27/101 , H01L27/2463 , H01L45/08 , H01L45/146 , H01L45/1625
摘要： A variable resistance nonvolatile memory element includes a first electrode, a second electrode, and a variable resistance layer including: a first oxide layer including a metal oxide having non-stoichiometric composition and including p-type carriers; a second oxide layer located between and in contact with the first oxide layer and a second electrode and including a metal oxide having non-stoichiometric composition and including n-type carriers; an oxygen reservoir region located in the first oxide layer, having no contact with the first electrode, and having an oxygen content atomic percentage higher than that of the first oxide layer; and a local region located in the second oxide layer, having contact with the oxygen reservoir region, and having an oxygen content atomic percentage lower than that of the second oxide layer.
摘要翻译： 可变电阻非易失性存储元件包括第一电极，第二电极和可变电阻层，包括：包含具有非化学计量组成的金属氧化物并包括p型载流子的第一氧化物层; 位于第一氧化物层之间并与第一氧化物层接触的第二氧化物层和第二电极，并且包括具有非化学计量组成并包括n型载体的金属氧化物; 位于所述第一氧化物层中的与第一电极没有接触并且氧含量原子百分比高于第一氧化物层的氧储存区; 以及位于所述第二氧化物层中的与氧储存区接触并且氧含量原子百分比低于第二氧化物层的原子百分比的局部区域。
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公开(公告)号：US08405076B2
公开(公告)日：2013-03-26
申请号：US12920154
申请日：2010-02-03
申请人： Takeki Ninomiya , Takeshi Takagi , Zhiqiang Wei
发明人： Takeki Ninomiya , Takeshi Takagi , Zhiqiang Wei
IPC分类号： H01L29/12
CPC分类号： H01L45/146 , G11C13/0007 , G11C2213/32 , G11C2213/34 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1625 , H01L45/1675
摘要： A nonvolatile memory element (100) includes a variable resistance layer (107) including a first metal oxide MOx and a second metal oxide MOy, and reaction energy of chemical reaction related to the first metal oxide, the second metal oxide, oxygen ions, and electrons is 2 eV or less. The chemical reaction is expressed by a formula 13, where a combination (MOx, MOy) of MOx and MOy is selected from a group including (Cr2O3, CrO3), (Co3O4, Co2O3), (Mn3O4, Mn2O3), (VO2, V2O5), (Ce2O3, CeO2), (W3O8, WO3), (Cu2O, CuO), (SnO, SnO2), (NbO2, Nb2O5), and (Ti2O3, TiO2). [Mathematical Expression 13] MOx+(y−x)O2−MOy+2(y−x)e− (Formula 13)
摘要翻译： 非易失性存储元件（100）包括可变电阻层（107），其包括第一金属氧化物MOx和第二金属氧化物MOy，以及与第一金属氧化物，第二金属氧化物，氧离子和 电子为2eV以下。 化学反应由式13表示，其中MOx和MOy的组合（MOx，MOy）选自（Cr 2 O 3，CrO 3），（Co 3 O 4，Co 2 O 3），（Mn 3 O 4，Mn 2 O 3），（VO 2，V 2 O 5） ），（Ce 2 O 3，CeO 2），（W3O 8，WO 3），（Cu 2 O，CuO），（SnO，SnO 2），（NbO 2，Nb 2 O 5）和（Ti 2 O 3，TiO 2）。 [数学表达式13] MOx +（y-x）O2-MOy + 2（y-x）e-（式13）
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6.发明授权Nonvolatile memory element, and nonvolatile semiconductor device using the nonvolatile memory element 有权非易失性存储元件和使用非易失性存储元件的非易失性半导体器件公开(公告)号：US08338816B2
公开(公告)日：2012-12-25
申请号：US12682676
申请日：2008-03-31
CPC分类号： H01L27/101 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/1625
摘要： A nonvolatile memory element of the present invention comprises a first electrode (503); a second electrode (505); and a resistance variable layer (504) which is disposed between the first electrode (503) and the second electrode (505), a resistance value of the resistance variable layer being changeable in response to electric signals which are applied between the first electrode (503) and the second electrode (505), wherein the first electrode and the second electrode comprise materials which are made of different elements.
摘要翻译： 本发明的非易失性存储元件包括第一电极（503）; 第二电极（505）; 以及设置在第一电极（503）和第二电极（505）之间的电阻变化层（504），电阻变化层的电阻值根据施加在第一电极（503）和第二电极 ）和第二电极（505），其中第一电极和第二电极包括由不同元件制成的材料。
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7.发明申请NON-VOLATILE MEMORY CELL, NON-VOLATILE MEMORY CELL ARRAY, AND METHOD OF MANUFACTURING THE SAME 有权非易失性存储器单元，非易失性存储器单元阵列及其制造方法公开(公告)号：US20120104351A1
公开(公告)日：2012-05-03
申请号：US13382321
申请日：2011-06-29
申请人： Zhiqiang Wei , Takeshi Takagi , Mitsuteru Iijima
发明人： Zhiqiang Wei , Takeshi Takagi , Mitsuteru Iijima
IPC分类号： H01L45/00
CPC分类号： H01L27/2409 , G11C13/0007 , G11C2213/71 , G11C2213/72 , H01L27/249 , H01L45/08 , H01L45/1226 , H01L45/146 , H01L45/16 , H01L45/1633
摘要： A stacking structure in which a stacked body (21) including a first conductive layer (13), a semiconductor layer (17), and a second conductive layer (18) and an interlayer insulating film (16) are alternately stacked in parallel to a substrate, a plurality of columnar electrodes (12) arranged so as to penetrated through the stacking structure in a stacking direction, a variable resistance layer (14) which is disposed between the columnar electrode (12) and the first conductive layer (13) and which has a resistance value that reversibly changes according to an application of an electric signal are included. The variable resistance layer (14) is formed by oxidizing part of the first conductive layer (13). The variable resistance layer (14) and an insulating film for electrically separating the semiconductor layer (17) and the second conductive layer (18) from the columnar electrode (12) are simultaneously formed in a single oxidation process.
摘要翻译： 层叠结构，其中包括第一导电层（13），半导体层（17）和第二导电层（18）和层间绝缘膜（16）的层叠体（21）与 基板，多个柱状电极（12），被布置成沿堆叠方向穿过堆叠结构，设置在柱状电极（12）和第一导电层（13）之间的可变电阻层（14）和 其具有根据电信号的应用可逆地改变的电阻值。 可变电阻层（14）通过氧化第一导电层（13）的一部分而形成。 在单次氧化过程中同时形成可变电阻层（14）和用于将半导体层（17）和第二导电层（18）与柱状电极（12）电分离的绝缘膜。
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公开(公告)号：US20110075469A1
公开(公告)日：2011-03-31
申请号：US12993706
申请日：2010-03-15
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C13/0038 , G11C2213/75 , G11C2213/79 , H01L27/115 , H01L27/2436 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： Each of memory cells (MC) includes one transistor and one resistance variable element. The transistor includes a first main terminal, a second main terminal and a control terminal. The resistance variable element includes a first electrode, a second electrode and a resistance variable layer provided between the first electrode and the second electrode. A first main terminal of one of two adjacent memory cells is connected to a second main terminal of the other memory cell, to form a series path (SP) sequentially connecting main terminals of the plurality of memory cells in series. Each of the memory cells is configured such that the control terminal is a part of a first wire (WL) associated with the memory cell or is connected to the first wire associated with the memory cell, the second electrode is a part of a second wire (SL) associated with the memory cell or is connected to the second wire associated with the memory cell; and the first electrode is a part of a series path (SP) associated with the memory cell or is connected to the series path associated with the memory cell.
摘要翻译： 每个存储单元（MC）包括一个晶体管和一个电阻可变元件。 晶体管包括第一主端子，第二主端子和控制端子。 电阻可变元件包括设置在第一电极和第二电极之间的第一电极，第二电极和电阻变化层。 两个相邻存储单元之一的第一主端子连接到另一个存储单元的第二主端子，以形成串联连接多个存储单元的主端子的串行路径（SP）。 每个存储器单元被配置为使得控制端子是与存储器单元相关联的第一布线（WL）的一部分或者连接到与存储单元相关联的第一布线，第二电极是第二布线 （SL），或者连接到与存储器单元相关联的第二线; 并且第一电极是与存储器单元相关联的或连接到与存储器单元相关联的串联路径的串联路径（SP）的一部分。
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9.发明授权Nonvolatile memory apparatus and method for writing data in nonvolatile memory apparatus 有权非易失性存储装置和用于在非易失性存储装置中写入数据的方法公开(公告)号：US07916516B2
公开(公告)日：2011-03-29
申请号：US12524313
申请日：2008-02-22
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/34 , G11C2213/72 , H01L27/1021
摘要： A nonvolatile memory apparatus comprises a memory array (102) including plural first electrode wires (WL) formed to extend in parallel with each other within a first plane; plural second electrode wires (BL) formed to extend in parallel with each other within a second plane parallel to the first plane and to three-dimensionally cross the plural first electrode wires; and nonvolatile memory elements (11) which are respectively provided at three-dimensional cross points between the first electrode wires and the second electrode wires, the elements each having a resistance variable layer whose resistance value changes reversibly in response to a current pulse supplied between an associated first electrode wire and an associated second electrode wire; and a first selecting device (13) for selecting the first electrode wires, and further comprises voltage restricting means (15) provided within or outside the memory array, the voltage restricting means being connected to the first electrode wires, for restricting a voltage applied to the first electrode wires to a predetermined upper limit value or less; wherein plural nonvolatile memory elements of the nonvolatile memory elements are connected to one first electrode wire connecting the first selecting device to the voltage restricting means.
摘要翻译： 非易失性存储装置包括存储器阵列（102），其包括形成为在第一平面内彼此平行延伸的多个第一电极线（WL） 多个第二电极线（BL），其形成为在与第一平面平行的第二平面内彼此平行延伸并且三维地交叉所述多个第一电极线; 和非易失性存储元件（11），其分别设置在第一电极线和第二电极线之间的三维交叉点处，每个元件具有电阻变化层，其电阻值响应于在 相关联的第一电极线和相关联的第二电极线; 以及用于选择所述第一电极线的第一选择装置（13），并且还包括设置在所述存储器阵列内或外的电压限制装置（15），所述电压限制装置连接到所述第一电极线，用于限制施加到 所述第一电极线达到预定的上限值以下; 其中所述非易失性存储元件的多个非易失性存储元件连接到将所述第一选择装置连接到所述电压限制装置的一个第一电极线。
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公开(公告)号：US20130112936A1
公开(公告)日：2013-05-09
申请号：US13810708
申请日：2012-01-18
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L45/08 , H01L45/1233 , H01L45/1273 , H01L45/146 , H01L45/16 , H01L45/1625 , H01L45/1675
摘要： A variable resistance element including: a first electrode; a second electrode; and a variable resistance layer having a resistance value which reversibly changes according to electrical signals applied, wherein the variable resistance layer includes a first variable resistance layer comprising a first oxygen-deficient transition metal oxide, and a second variable resistance layer comprising a second transition metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first transition metal oxide layer, the second electrode has a single needle-shaped part at the interface with the second variable resistance layer, and the second variable resistance layer is interposed between the first variable resistance layer and the second electrode, is in contact with the first variable resistance layer and the second electrode, and covers the needle-shaped part.
摘要翻译： 一种可变电阻元件，包括：第一电极; 第二电极; 以及可变电阻层，其具有根据施加的电信号可逆地改变的电阻值，其中所述可变电阻层包括包含第一氧缺乏过渡金属氧化物的第一可变电阻层和包含第二过渡金属的第二可变电阻层 具有低于第一过渡金属氧化物层的氧缺乏程度的氧缺乏的氧化物，第二电极在与第二可变电阻层的界面处具有单个针状部分，并且插入第二可变电阻层 在第一可变电阻层和第二电极之间，与第一可变电阻层和第二电极接触并覆盖针状部分。
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