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公开(公告)号：US20180323795A1
公开(公告)日：2018-11-08
申请号：US15773149
申请日：2016-10-27
Applicant: ams Sensors Belgium BVBA
Inventor： Adi XHAKONI , Tim BLANCHAERT
CPC classification number: H03M1/182 , H03M1/1235 , H03M1/56 , H04N5/3575 , H04N5/365 , H04N5/378
Abstract: An analog-to-digital converter (110) for an imaging device comprises an analog signal input (123) for receiving an analog signal from a pixel array of the imaging device and N ramp signal inputs (121, 122) for receiving N ramp signals, where N is an integer≥2. The N ramp signals have different slopes. The ADC has a clock input (143) for receiving at least one clock signal. A comparison stage (120) is connected to the ramp signal inputs and to the analog signal input. The comparison stage (120) is configured to compare the ramp signals with the analog signal to provide comparison outputs during the conversion period. A control stage (130) is configured to control a counter stage (140) based on the comparison outputs and a selection input indicative of when at least one handover point has been reached during the conversion period.
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公开(公告)号：US20250142230A1
公开(公告)日：2025-05-01
申请号：US18836763
申请日：2023-01-24
Applicant: ams Sensors Belgium BVBA
Inventor： Adi XHAKONI
IPC: H04N25/771 , H04N25/59 , H04N25/616 , H04N25/621 , H04N25/65 , H10F39/00
Abstract: An imaging device includes a plurality of pixels. The pixels include: a photosensitive stage, including a photodetector and a diffusion node electrically coupled to the photodetector via a transfer switch; a sample-and-hold stage including a first source follower, wherein a gate terminal of the first source follower is electrically connected to the diffusion node, and further including a pair of switchable capacitors that are electrically coupled to an output terminal of the first source follower; a readout stage, wherein an input of the readout stage is electrically coupled to an output of the sample-and-hold stage; and an electrical interconnection including an gain switch, that is electrically connected to the diffusion node and to a first terminal of one of the capacitors.
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公开(公告)号：US20250142226A1
公开(公告)日：2025-05-01
申请号：US18836762
申请日：2023-02-03
Applicant: ams Sensors Belgium BVBA
Inventor： Pieter DE WIT , Adi XHAKONI , Koen RUYTHOOREN
IPC: H04N25/589 , H04N25/616 , H04N25/78
Abstract: An image sensor includes a pixel array having a first pixel group and a second pixel group. Each pixel group includes a plurality of pixels, with each pixel having a photosensitive element, a sense node and a sample-and-hold stage. A driver circuit of the image sensor, during an exposure phase, is configured to operate the pixels of the first pixel group to perform a first exposure of a first duration, and to operate the pixels of the second pixel group to perform a second exposure of a second duration followed by a third exposure of a third duration. An output circuit of the image sensor, during a readout phase, is configured to read out a first photo signal from each pixel of the first pixel group, and to read out a second photo signal and a third photo signal from each pixel of the second pixel group.
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公开(公告)号：US20230232132A1
公开(公告)日：2023-07-20
申请号：US18002413
申请日：2021-06-17
Applicant: ams Sensors Belgium BVBA
Inventor： Adi XHAKONI , Xiaoliang GE
IPC: H04N25/771 , H04N25/78
CPC classification number: H04N25/771 , H04N25/78 , G03B15/02
Abstract: A pixel includes a transfer gate, and a sample structure having a first sample stage and a second sample stage. The transfer gate and the first and the second sample stages are configured to be operated in conjunction with a light source in response to a control signal. The first sample stage is configured to sample a first sample value that depends on radiation incident on the photosensitive element from an object or a scene that is illuminated by the light source emitting light at a first output power, while the second sample stage is configured to sample a second sample value that depends on radiation incident on the photosensitive element from the object or the scene that is illuminated by the light source emitting light at a second output power. The first output power is different, in particular significantly different, from the second output power.
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Patent Agency Ranking
公开(公告)号：US20220132061A1
公开(公告)日：2022-04-28
申请号：US17429709
申请日：2020-01-23
Applicant: ams Sensors Belgium BVBA
Inventor： Adi XHAKONI , Ali JADERI , Guy MEYNANTS
IPC: H04N5/369 , H04N5/3745
Abstract: An image sensor system has a pixel array with a plurality of pixels, each of the pixels comprising a photodiode, a pixel buffer and a transfer gate coupled between the photodiode and an input of the pixel buffer. A voltage supply block is configured to generate a pixel supply voltage from an input voltage based on a first reference voltage and to provide the pixel supply voltage to the pixel array. A calibration processing block is configured to determine an average pixel signal based on an average of individual pixel signals at outputs of the pixels of the pixel array and to determine a correction value based on the average pixel signal and a reference pixel signal. A correction processing block is configured to determine the first reference voltage based on a combination of a second reference voltage and the correction value.
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公开(公告)号：US20180351570A1
公开(公告)日：2018-12-06
申请号：US15773537
申请日：2016-10-27
Applicant: ams Sensors Belgium BVBA
Inventor： Adi XHAKONI , Tim BLANCHAERT , Guy MEYNANTS
CPC classification number: H03M1/56 , H03M1/1235 , H03M1/1245 , H03M1/183 , H04N5/355 , H04N5/3575 , H04N5/365 , H04N5/378
Abstract: An analog-to-digital converter (110) comprises an analog signal input (122) for receiving an analog signal and an amplifying stage (160) configured to generate a set of N amplified analog signals, where N is an integer≥2. The set of N signals have different gains. The ADC has a ramp signal input (121) for receiving a ramp signal and a clock input (143) for receiving at least one clock signal. A comparison stage (120) is connected to the set of amplified analog signals (SigG1, SigG2) and to the ramp signal input (121). The comparison stage (120) is configured to compare the amplified analog signals with the ramp signal to provide comparison outputs during a conversion period. A control stage is configured to control the counter stage (140) based on the comparison outputs and a selection input indicative of when at least one handover point has been reached during the conversion period.
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公开(公告)号：US20240333294A1
公开(公告)日：2024-10-03
申请号：US18682119
申请日：2022-08-25
Applicant: ams Sensors Belgium BVBA
Inventor： Adi XHAKONI
IPC: H03M1/12
CPC classification number: H03M1/122
Abstract: An ADC circuit includes a comparator with a first input for receiving an analog signal and with a second input for receiving a ramp signal, a first output of the comparator, a second output of the comparator, a first counter connected to the first output, a second counter connected to the second output, a first clock connected to the first counter, and a second clock connected to the second counter. The first clock provides a first clock signal to the first counter, the second clock provides a second clock signal to the second counter, the first counter is configured to count with the frequency of the first clock signal, the second counter is configured to count with the frequency of the second clock signal. The frequency of the first clock signal is lower than the frequency of the second clock signal.
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公开(公告)号：US20230361136A1
公开(公告)日：2023-11-09
申请号：US18246398
申请日：2021-09-15
Applicant: ams Sensors Belgium BVBA
Inventor： Dong-Long LIN , Adi XHAKONI
IPC: H01L27/146
CPC classification number: H01L27/14603 , H01L27/14649 , H01L27/1463 , H01L27/14645 , H01L27/14621
Abstract: A pixel structure includes a substrate body having a light entrance surface, a plurality of first photodiodes formed in the substrate body at a first depth with respect to the light entrance surface, and a second photodiode formed in the substrate body at a second depth with respect to the light entrance surface. The first depth corresponds to a photon absorption length in a material of the substrate body at a first wavelength range, and the second depth corresponds to a photon absorption length in the material of the substrate body at a second wavelength range that is different from the first wavelength range.
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公开(公告)号：US20230054015A1
公开(公告)日：2023-02-23
申请号：US17792285
申请日：2020-12-08
Applicant: ams Sensors Belgium BVBA
Inventor： Adi XHAKONI
IPC: G01J1/44 , H04N5/33 , H04N5/3745 , H04N5/369
Abstract: A pixel cell comprises a plurality of pixels, each pixel comprising a photodiode, a readout circuit comprising a first readout component and a second readout component, wherein a first group of the pixels is configured to detect electromagnetic radiation in a first wavelength range, a second group of the pixels is configured to detect electromagnetic radiation in a second wavelength range, the first readout component is connected with the first group of pixels, the second readout component is connected with the second group of pixels, the first wavelength range is different from the second wavelength range, and the second readout component comprises a plurality of storage capacitors, wherein each pixel of the second group of pixels is assigned to at least one of the storage capacitors, or the second readout component comprises a memory element. Furthermore, a method for operating a pixel cell is provided.
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