Method, system and device for non-volatile memory device operation

    公开(公告)号:US10861541B2

    公开(公告)日:2020-12-08

    申请号:US16153680

    申请日:2018-10-05

    申请人: ARM Ltd.

    IPC分类号: G11C13/00 G11C14/00

    摘要: Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a non-volatile memory device may be placed in any one of multiple memory states in a write operation by controlling a current and a voltage applied to terminals of the non-volatile memory device. For example, a write operation may apply a programming signal across terminals of non-volatile memory device having a particular current and a particular voltage for placing the non-volatile memory device in a particular memory state.

    I/O driven data routing and cache allocation

    公开(公告)号:US10733106B2

    公开(公告)日:2020-08-04

    申请号:US15801995

    申请日:2017-11-02

    申请人: ARM LTD

    摘要: A method and apparatus are provided for automatic routing of messages in a data processing system. An incoming message at an input/output (I/O) interface of the data processing system includes a message identifier and payload data. Match information, including an indicator or whether the message identifier of the incoming message matches an identifier of a request in a receive queue (RQ), is used to determine a destination for the incoming message. The incoming message is forwarded to the determined destination. Information, such as payload size and RQ position, may be used to determine allocation of the payload within a cache or cache hierarchy.

    Graphics processing systems
    5.
    发明授权

    公开(公告)号:US10650577B2

    公开(公告)日:2020-05-12

    申请号:US15246970

    申请日:2016-08-25

    申请人: ARM Limited

    IPC分类号: G06T15/40 G06T15/00

    摘要: A tile-based graphics processing pipeline includes a back-facing determination and culling unit that is operable to cull back-facing triangles before the tiling stage. The back-facing determination and culling unit include a triangle size estimator that estimates the size of a triangle being considered. If the size of the triangle is less than a selected size, then the area of the triangle is calculated using fixed point arithmetic and the result of that area calculation is used by a back-face culling unit to determine whether to cull the triangle or not. On the other hand, if the size estimator determines that the primitive is greater than the selected size, then the triangle bypasses the fixed point area calculation and back-face culling unit and is instead passed directly to the tiler.

    METHOD AND APPARATUS FOR CONTROL OF A TIERED MEMORY SYSTEM

    公开(公告)号:US20190102310A1

    公开(公告)日:2019-04-04

    申请号:US15722350

    申请日:2017-10-02

    申请人: ARM LTD

    IPC分类号: G06F12/0875 G06F12/0811

    摘要: A method and apparatus for controlling data organization in a tiered memory system, where the system comprises a lower and higher bandwidth memories. Accesses to the tiered memory system by an action of a computing device in a first time interval are monitored to determine a first measure of bandwidth utilization, from which it is determined if the action is in a high bandwidth phase for which a first measure of bandwidth utilization is greater than an upper value. It is further determined, from confidence counters, if a monitored access is consistent with respect to the first instructions or with respect to a memory address of the access. Data associated with the access is moved from the lower bandwidth memory to the higher bandwidth memory when the action is in a high bandwidth phase, the access is consistent, and bandwidth utilization of the higher bandwidth memory is below a threshold.