Sensor system and methods for the capacitive measurement of electromagnetic signals having a biological origin
    2.
    发明授权
    Sensor system and methods for the capacitive measurement of electromagnetic signals having a biological origin 有权
    用于具有生物来源的电磁信号的电容测量的传感器系统和方法

    公开(公告)号:US08193821B2

    公开(公告)日:2012-06-05

    申请号:US11722495

    申请日:2005-12-23

    IPC分类号: G01R27/26

    摘要: The invention relates to a sensor system and several method for the capacitive measurement of electromagnetic signals having a biological origin. Such a sensor system comprises a capacitive electrode device (10), an electrode shielding element (20) which surrounds the electrode device (10) at least in part in order to shield the same (10) from interfering external electromagnetic fields, and a signal processing device (30) for processing electromagnetic signals that can be detected by means of the electrode device (10). According to the invention, additional shielding means (21) three-dimensionally surround the electrode device (10) and the electrode shielding element (20) at least in part in order to block out interfering external electromagnetic fields. The changes in the electrode capacity of the capacitive sensor system are determined with the aid of several methods which particularly use the inventive sensor system in order to take said changes into account when the test signals are evaluated.

    摘要翻译: 本发明涉及传感器系统和用于电容测量具有生物来源的电磁信号的几种方法。 这种传感器系统包括电容电极装置(10),至少部分地围绕电极装置(10)的屏蔽元件(20),以便屏蔽其抵抗干扰外部电磁场,以及信号 处理装置(30),用于处理能够通过电极装置(10)检测的电磁信号。 根据本发明,至少部分地三维围绕电极装置(10)和电极屏蔽元件(20)的附加屏蔽装置(21)以便阻挡干扰的外部电磁场。 借助于特别使用本发明的传感器系统的几种方法来确定电容传感器系统的电极容量的变化,以便在评估测试信号时考虑所述变化。

    Termination of semiconductor components
    4.
    发明授权
    Termination of semiconductor components 失效
    半导体元件的终止

    公开(公告)号:US06956249B2

    公开(公告)日:2005-10-18

    申请号:US10669024

    申请日:2003-09-23

    摘要: The invention relates to a semiconductor component which is capable of blocking such as an (IGBT), a thyristor, a GTO or diodes, especially schottky diodes. An insulator profile section (10a, 10b, 10c, 10d, 11) provided in the border area of an anode metallic coating (1, 31) is fixed (directly in the edge area) on the substrate (9) of the component. The insulator profile has a curved area (KB) and a base area (SB), said curved area having a surface (OF) which begins flat and curves outward and upward in a steadily increasing manner. A metallic coating (MET1; 30a, 30b, 30c, 30d, 31b) is deposited on the surface (OF). Said coating directly follows the surface curvature and laterally extends the inner anode metallic coating. The upper end of the curved metallic coating (MET1; 30a, 30b . . . ) is distanced and insulated from one of these surrounding outer metallic coatings (MET2; 3) by the surrounding base area (SB) of the insulator profile (10a, . . . , 11) such that an extensively constant course of the line of force which evades extreme values results between both metallic coatings (1, 31, MET1; 3, MET2) when reverse voltage or blocking voltage is applied between the interspaced metallic coatings.

    摘要翻译: 本发明涉及能够阻挡(IGBT),晶闸管,GTO或二极管,特别是肖特基二极管的半导体元件。 设置在阳极金属涂层(1,31)的边界区域中的绝缘体轮廓部分(10a,10b,10b,10d,11)被固定(直接在边缘区域中)在基底(9)上 组件。 绝缘体轮廓具有弯曲区域(KB)和基部区域(SB),所述弯曲区域具有开始平坦并以稳定增加的方式向外和向上弯曲的表面(OF)。 金属涂层(MET 1; 30 a,30 b,30 c,30 d,31 b)沉积在表面(OF)上。 所述涂层直接遵循表面曲率并横向延伸内阳极金属涂层。 弯曲的金属涂层(MET 1; 30 a,30 b ...)的上端通过绝缘体的周围基部区域(SB)与这些周围的外部金属涂层(MET2; 3)中的一个隔开并绝缘 (10 a,...,11),使得当反向电压或阻塞电压时,在金属涂层(1,31,MET1; 3,MET2)之间产生逃避极值的力线的广泛恒定过程 应用于间隔金属涂层之间。

    Tool for the type and form of a circuit production
    6.
    发明授权
    Tool for the type and form of a circuit production 有权
    电路生产的类型和形式的工具

    公开(公告)号:US08645900B2

    公开(公告)日:2014-02-04

    申请号:US12599115

    申请日:2008-05-07

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5045

    摘要: The invention relates to a method for influencing the selection of a type and form of a circuit implementation in at least one layer in a given integration task for at least one integrated circuit in a wafer composite, a module on a 2-dimensional carrier substrate, or a compact module. In one embodiment, a plurality of electric or electronic components are spatially arranged and to be electrically connected. Completed solutions x are stored in a database, and each of the completed solutions includes properties for the given integration task. The completed solutions define a destination space from which a solution is selectable by operating elements and determines a type and form of circuit implementation as a result of the given integration task, and aggregates the plurality of electric and electronic components in one of a plurality of integration technologies.

    摘要翻译: 本发明涉及一种用于影响在晶片复合材料中的至少一个集成电路的给定的集成任务中的至少一个层中的电路实现的类型和形式的选择的方法,二维载体衬底上的模块, 或紧凑型模块。 在一个实施例中,多个电气或电子部件在空间上布置并且被电连接。 完成的解决方案x存储在数据库中,并且每个完成的解决方案都包括给定集成任务的属性。 完成的解决方案定义目的地空间,通过操作元素可以从中选择解决方案,并且通过给定的集成任务确定电路实现的类型和形式,并将多个电气和电子组件聚合成多个集成 技术。