公开(公告)号：US20080092921A1

公开(公告)日：2008-04-24

申请号：US11926578

申请日：2007-10-29

申请人： Heinrich Ollendorf ,  Stacey Cabral ,  Robert Fuller

发明人： Heinrich Ollendorf ,  Stacey Cabral ,  Robert Fuller

IPC分类号： C25F3/12

CPC分类号： H01L21/02074 ,  H01L21/32136 ,  H01L21/7684

摘要： Metal residue on a semiconductor surface resulting from metal chemical mechanical polishing (“CMP”) process are eradicated using a dry clean process. The dry cleaning uniformly removes or substantially eliminates metal residue from the surface of the semiconductor. An unintended metal short that may be present due to the residue may thereby be eliminated by adjusting the dry cleaning process based on a type of dry cleaning material, and type and a thickness of the residue.

摘要翻译： 使用干洗工艺消除了金属化学机械抛光（“CMP”）工艺产生的半导体表面上的金属残留物。 干洗可均匀地去除或基本上消除半导体表面的金属残留物。 由于残留物可能存在的意外的金属短路因此可以通过基于干式清洁材料的类型和残余物的类型和厚度调节干洗过程而被消除。

公开(公告)号：US07051253B2

公开(公告)日：2006-05-23

申请号：US09931125

申请日：2001-08-16

申请人： Randall Rooney ,  Joerg Vollrath

发明人： Randall Rooney ,  Joerg Vollrath

IPC分类号： G11C29/00

CPC分类号： G11C29/10

摘要： According to an embodiment of the present invention, a method is provided for determining a fail string for a device. The method includes determining a test pattern for a portion of an address space wherein the test pattern includes at least one address in the address space and the portion of the address space includes at least one x address and at least one y addresses. The method executes a test a plurality of times for each test pattern, wherein every combination of the test pattern is tested, wherein the combinations include each address held at a first potential for at least a first test and a second potential for at least a second test. The method includes determining a fail string for the device including pass/fail results for the test pattern, and combining the pass/fail results in the fail string.

公开(公告)号：US20060084274A1

公开(公告)日：2006-04-20

申请号：US10967869

申请日：2004-10-18

申请人： Michael Rennie ,  Jon Davis ,  Robert Fuller ,  Franz Hagl

发明人： Michael Rennie ,  Jon Davis ,  Robert Fuller ,  Franz Hagl

IPC分类号： H01L21/311

CPC分类号： H01L21/3083 ,  H01L21/3065

摘要： An edge protection process for semiconductor device fabrication includes forming a protective layer on the circumferential edge region of a semiconductor substrate. The semiconductor substrate is placed in a plasma atmosphere and trench structures, such as deep trenches and shallow trench isolation structures are etched in the substrate. The protective layer substantially prevents the etching of the circumferential edge region, such that the formation of black silicon is substantially minimized during the etching process.

摘要翻译： 用于半导体器件制造的边缘保护工艺包括在半导体衬底的周缘区域上形成保护层。 将半导体衬底放置在等离子体气氛中，并且在衬底中蚀刻诸如深沟槽和浅沟槽隔离结构的沟槽结构。 保护层基本上防止了周边边缘区域的蚀刻，使得在蚀刻工艺期间黑色硅的形成基本上被最小化。

公开(公告)号：US07001856B2

公开(公告)日：2006-02-21

申请号：US10697639

申请日：2003-10-31

申请人： Frederico Garza ,  Karl Peterson ,  Michael Wright

发明人： Frederico Garza ,  Karl Peterson ,  Michael Wright

IPC分类号： H01L21/00

CPC分类号： H01J37/3171 ,  H01J37/304

摘要： A process uses pressure changes and a pressure compensation factor to estimate the rate at which neutral atoms are implanted. While implanting a first wafer using a first pressure compensation factor, the rate at which ions are implanted is determined. The first wafer is moved radially with respect to an ion beam while implanting ions into the first wafer so as to achieve a uniform total dose based on the rate at which ions are implanted and the estimated rate at which neutral atoms are implanted. The pressure is determined while implanting the first wafer, determining the pressure. A second pressure compensation factor is selected, that would have achieved a uniform rate of implanted ions plus implanted neutral atoms across a surface of the first wafer. The second pressure compensation factor is different from the first pressure compensation factor. The second pressure compensation factor is used to implant a second wafer. The second wafer is tested by forming a sheet resistance contour map. If the sheet resistant contour map shows uniform resistance across the wafer, the second pressure compensation factor is used to implant wafers subsequent to the second wafer.

摘要翻译： 一个过程使用压力变化和压力补偿因子来估计中性原子被植入的速率。 在使用第一压力补偿因子植入第一晶片时，确定注入离子的速率。 第一晶片相对于离子束径向移动，同时将离子注入到第一晶片中，以便基于离子注入的速率和中性原子注入的估计速率来实现均匀的总剂量。 在注入第一晶片时确定压力，确定压力。 选择第二压力补偿因子，其将实现在第一晶片的表面上的注入离子加入植入的中性原子的均匀速率。 第二压力补偿系数与第一压力补偿系数不同。 第二压力补偿因子用于植入第二晶片。 通过形成薄层电阻轮廓图来测试第二个晶片。 如果抗张力轮廓图在晶片上显示出均匀的电阻，则第二压力补偿因子用于在第二晶片之后植入晶片。

公开(公告)号：US20050092595A1

公开(公告)日：2005-05-05

申请号：US10697656

申请日：2003-10-31

申请人： Karl Peterson ,  Michael Wright ,  Frederico Garza

发明人： Karl Peterson ,  Michael Wright ,  Frederico Garza

IPC分类号： H01J37/34 ,  C23C14/00 ,  G01N27/26

CPC分类号： H01J37/3402

摘要： A device to implant impurities into a semiconductor wafer had a beam gun to shoot ions at a semiconductor wafer, a pair of ion gauges, and ion gauge controller to supply power to, and obtain information corresponding to a number of ions from, one of the ion gauges. The gauge controller has a parameter output, a control output and a pair of control inputs respectively associated with the pair of ion gauges, such that when a control signal is supplied to one of the control inputs, the ion gauge controller supplies power to, and obtains information corresponding to a number of ions from, the respectively associated ion gauge. The control output produces the control signal when either of the ion gauges is activated. The parameter output selectively produces a parameter signal based on a recipe selection. A first delay circuit connects the control output to one of the control inputs, after a delay, when the parameter output is on. A second delay circuit connects the control outputs to the other of the control inputs, after a delay, when the parameter output is off.

摘要翻译： 将杂质植入到半导体晶片中的装置具有射束枪，以在半导体晶片上射出离子，一对离子计和离子计控制器，以向其提供功率，并获得与多个离子相关的信息 离子量规。 仪表控制器具有参数输出，控制输出和一对控制输入，分别与一对离子计相关联，使得当控制信号被提供给控制输入之一时，离子计控制器向 从相应的离子计获得与离子数相对应的信息。 当任一离子计激活时，控制输出产生控制信号。 参数输出根据配方选择选择性地产生参数信号。 当参数输出打开时，第一个延迟电路在延迟之后将控制输出连接到其中一个控制输入。 当参数输出关闭时，第二个延迟电路在延迟之后将控制输出连接到另一个控制输入。

公开(公告)号：US06881592B2

公开(公告)日：2005-04-19

申请号：US10453858

申请日：2003-06-03

申请人： William Roberts ,  Diem-Thy Ngu-Uyen Tran ,  Paul Jowett ,  Nicholas Clements ,  Igor Jekauc ,  Karen Anne Davidson ,  Winifried Sabisch

发明人： William Roberts ,  Diem-Thy Ngu-Uyen Tran ,  Paul Jowett ,  Nicholas Clements ,  Igor Jekauc ,  Karen Anne Davidson ,  Winifried Sabisch

IPC分类号： H01L23/544 ,  H01L21/66

CPC分类号： H01L23/544 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of aligning a second layer to a first layer of a semiconductor structure by forming a first layer of a wafer having a distinguished feature via a first etching process that employs a first ionized gas generating machine. Forming a second layer having a circuit pattern via a second etching process that employs a second ionized gas generating machine, wherein the forming the second layer includes minimizing relative shifting between the distinguished feature located at an edge of the wafer for the first layer and the second circuit pattern located at the edge of the wafer for the second layer.

摘要翻译： 一种通过经由采用第一电离气体发生机的第一蚀刻工艺形成具有不同特征的晶片的第一层来将第二层对准半导体结构的第一层的方法。 通过使用第二离子化气体发生机的第二蚀刻工艺形成具有电路图案的第二层，其中形成第二层包括使位于第一层的晶片边缘的区别特征与第二层之间的相对移动最小化 电路图案位于用于第二层的晶片的边缘。

公开(公告)号：US20040058559A1

公开(公告)日：2004-03-25

申请号：US10255015

申请日：2002-09-25

申请人： Infineon Technologies Richmond, LP

发明人： Shrinivas Govindarajan ,  Mukund Patel

IPC分类号： H01L021/31

CPC分类号： H01L21/02129 ,  C23C16/401 ,  H01L21/02271 ,  H01L21/31625

摘要： A method for rapidly depositing a borosilicate glass film on a semiconductor wafer includes controlling the pressure within the chamber, introducing oxygen into the chamber, introducing a carrier gas into the chamber, injecting triethyl borate (nullTEBnull) and tetraethyl orthosilicate (nullTEOSnull) into the chamber, stabilizing the injection of TEB and TEOS, adjustably spacing a heater relative to the chamber, introducing ozone gas into the chamber, and depositing borosilicate glass film at a rate of at least about 4,500 angstroms per minute.

公开(公告)号：US20030234435A1

公开(公告)日：2003-12-25

申请号：US10174727

申请日：2002-06-19

申请人： Infineon Technologies Richmond, LP

发明人： Ulrich Zimmerman ,  Allen Chu ,  Robert Trahan

IPC分类号： H01L029/00

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： A fuse configuration for a semiconductor storage device is provided. The fuse configuration includes a first electrode formed in a dielectric layer, the first electrode having a first cross-sectional area defined by a first perimeter; a fuse element, or isolating layer, for coupling the first electrode to a second electrode; and the second electrode having a second cross-sectional area defined by a second perimeter, the first perimeter of the first electrode being larger than the second perimeter. By employing this modified capacitor layout, the fuse element, or isolating layer, will never come into contact with an edge of the first electrode, and thus eliminate a high electric field region from the fuse layout and reliability issues of the prior art fuse configurations. A method for forming the fuse configuration is also provided.

摘要翻译： 提供了一种用于半导体存储装置的保险丝配置。 熔丝配置包括形成在电介质层中的第一电极，第一电极具有由第一周边限定的第一横截面积; 熔丝元件或隔离层，用于将第一电极耦合到第二电极; 并且所述第二电极具有由第二周边限定的第二横截面积，所述第一电极的所述第一周边大于所述第二周边。 通过采用这种改进的电容器布局，熔丝元件或隔离层将永远不会与第一电极的边缘接触，从而消除了来自熔丝布置的高电场区域和现有技术熔丝配置的可靠性问题。 还提供了形成熔丝配置的方法。

公开(公告)号：US07214552B2

公开(公告)日：2007-05-08

申请号：US10992982

申请日：2004-11-19

申请人： Christopher Devany ,  Charles E. Venditti

发明人： Christopher Devany ,  Charles E. Venditti

IPC分类号： G01R31/26

CPC分类号： H01L21/67265 ,  H01L21/682 ,  Y02P80/30

摘要： A method for a semiconductor process includes correlating yield loss for the performance of a processing step in a semiconductor manufacturing process with the mechanical placement of the semiconductor substrate and, based on the correlation, placing semiconductor substrates in a position with sufficient placement precision to reduce yield loss below a predetermined threshold.

摘要翻译： 一种半导体工艺的方法包括将半导体制造工艺中的处理步骤的性能与半导体衬底的机械放置相关联的屈服损耗，并且基于相关性，将半导体衬底放置在具有足够的放置精度的位置以降低产量 损失低于预定阈值。

公开(公告)号：US20060265098A1

公开(公告)日：2006-11-23

申请号：US11132069

申请日：2005-05-18

申请人： Christopher Gould ,  Abeer Singhal

发明人： Christopher Gould ,  Abeer Singhal

IPC分类号： G06F19/00

CPC分类号： G05B19/40938 ,  G05B2219/36254 ,  Y02P90/265 ,  Y02P90/86

摘要： The disclosed system and method relates to the prediction of processing tool control parameters, i.e. controller state, for a particular processing tool, which has little or no utilization history, i.e. is data starved or has not gone through the learning curve, for a given process, or has undergone an event for which the current controller state has been reset or is otherwise now sub-optimal. The prediction is based on the processing tool control parameters of a substantially similar processing tool, being used in a substantially similar fashion to the given situation, which has significant utilization history. The processing tool having significant utilization history may be the same processing tool as the processing tool with little or no processing history where a manufacturing event disrupts the operations thereof. In this case, the pre-event control parameters and utilization history may be used, according to the disclosed embodiments, to predict the post-event controller state. Effectively, the disclosed embodiments provide for the processing tool with little or no utilization history to inherit the controller state, i.e. the evolved control parameters, of the processing tool with significant utilization history. Thereby, the processing tool with little or no utilization history is spared having to go through the learning curve, and the associated costs in delay and resources, to arrive at a particular controller state, i.e. the processing tool does not have to go through the iterative process-evaluate-adapt procedure to refine its control parameters to achieve results within the desired specifications.

摘要翻译： 所公开的系统和方法涉及对于特定处理工具的处理工具控制参数（即，控制器状态）的预测，对于给定过程，其具有很少或没有利用历史，即数据不足或未经过学习曲线 或者已经经历了当前控制器状态已被重置的事件或者现在不合适的事件。 该预测基于基本相似的处理工具的处理工具控制参数，以与具有显着利用历史的给定情况基本相似的方式使用。 具有显着利用历史的处理工具可以是与处理工具相同的处理工具，其中制造事件中断其操作的很少或没有处理历史。 在这种情况下，根据所公开的实施例，可以使用事件前控制参数和利用历史来预测事件后控制器状态。 有效地，所公开的实施例为处理工具提供了很少或没有使用历史以继承具有显着利用历史的处理工具的控制器状态，即演化的控制参数。 因此，具有很少或没有利用历史的处理工具不得不经历学习曲线以及相关的延迟和资源成本，以达到特定的控制器状态，即处理工具不必经历迭代 过程评估适应程序来完善其控制参数，以在期望的规范内实现结果。