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公开(公告)号：US12035640B2
公开(公告)日：2024-07-09
申请号：US17330037
申请日：2021-05-25
申请人： D-WAVE SYSTEMS INC.
发明人： Richard G. Harris , Andrew J. Berkley , Jan Johansson , Mark Johnson , Mohammad Amin , Paul I. Bunyk
CPC分类号： H10N60/12 , B82Y10/00 , G06N10/40 , G06N10/70 , H03K19/195 , H03K19/1954 , H10N69/00
摘要： Apparatus and methods enable active compensation for unwanted discrepancies in the superconducting elements of a quantum processor. A qubit may include a primary compound Josephson junction (CJJ) structure, which may include at least a first secondary CJJ structure to enable compensation for Josephson junction asymmetry in the primary CJJ structure. A qubit may include a series LC-circuit coupled in parallel with a first CJJ structure to provide a tunable capacitance. A qubit control system may include means for tuning inductance of a qubit loop, for instance a tunable coupler inductively coupled to the qubit loop and controlled by a programming interface, or a CJJ structure coupled in series with the qubit loop and controlled by a programming interface.
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公开(公告)号：US20240057485A1
公开(公告)日：2024-02-15
申请号：US18268513
申请日：2021-12-16
申请人： D-WAVE SYSTEMS INC.
摘要： A system, comprising a superconducting integrated circuit and a controller, may be operated to apply, for each power level of a sequence of discrete power levels on a respective one of a plurality of power lines, one or more pulses via a respective one of a plurality of addressing lines to a respective compound Josephson junction of each of a plurality of flux storage devices of the superconducting integrated circuit to cause each of the plurality of flux storage devices to reset. Power levels may be based at least in part on an estimated worst-case asymmetry between Josephson junctions of the compound Josephson junctions. The system may be operated to partition the plurality of addressing lines into groups, and apply a respective sequence of pulses to each addressing line of each pairwise combination of groups to cause one or more of the plurality of flux storage devices to reset.
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公开(公告)号：US11816536B2
公开(公告)日：2023-11-14
申请号：US17113847
申请日：2020-12-07
申请人： D-WAVE SYSTEMS INC.
CPC分类号： G06N10/00 , B82Y10/00 , G06N99/00 , Y10S977/933
摘要： Devices, methods and articles advantageously allow communications between qubits to provide an architecture for universal adiabatic quantum computation. The architecture includes a first coupled basis A1B1 and a second coupled basis A2B2 that does not commute with the first basis A1B1.
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公开(公告)号：US11593695B2
公开(公告)日：2023-02-28
申请号：US16830650
申请日：2020-03-26
申请人： D-WAVE SYSTEMS INC.
发明人： William W. Bernoudy , Mohammad H. Amin , James A. King , Jeremy P. Hilton , Richard G. Harris , Andrew J. Berkley , Kelly T. R. Boothby
摘要： A hybrid computing system for solving a computational problem includes a digital processor, a quantum processor having qubits and coupling devices that together define a working graph of the quantum processor, and at least one nontransitory processor-readable medium communicatively coupleable to the digital processor which stores at least one of processor-executable instructions or data. The digital processor receives a computational problem, and programs the quantum processor with a first set of bias fields and a first set of coupling strengths. The quantum processor generates samples as potential solutions to an approximation of the problem. The digital processor updates the approximation by determining a second set of bias fields based at least in part on the first set of bias fields and a first set of mean fields that are based at least in part on the first set of samples and coupling strengths of one or more virtual coupling devices.
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公开(公告)号：US20210375516A1
公开(公告)日：2021-12-02
申请号：US17327230
申请日：2021-05-21
申请人： D-WAVE SYSTEMS INC.
摘要： A superconducting integrated circuit is fabricated by depositing a ground plane to at least partially overlie a substrate, depositing an insulating layer to at least partially overlie the ground plane, depositing a superconducting layer to at least partially overlie the insulating layer, and forming a superconducting feature in the superconducting layer. An inductance of the superconducting feature is tunable by adjusting a bias current in the ground plane. The ground plane is electrically communicatively coupleable to an electrical ground. Depositing a ground plane includes depositing a first superconducting material to at least partially overlie the substrate and depositing a second superconducting material to at least partially overlie the first superconducting material. A second critical current density of the second superconducting material is higher than a first critical current density of the first superconducting material.
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公开(公告)号：US11127893B2
公开(公告)日：2021-09-21
申请号：US16098801
申请日：2017-05-03
申请人： D-WAVE SYSTEMS INC.
发明人： Mark W. Johnson , Paul I. Bunyk , Andrew J. Berkley , Richard G. Harris , Kelly T. R. Boothby , Loren J. Swenson , Emile M. Hoskinson , Christopher B. Rich , Jan E. S. Johansson
摘要： Approaches useful to operation of scalable processors with ever larger numbers of logic devices (e.g., qubits) advantageously take advantage of QFPs, for example to implement shift registers, multiplexers (i.e., MUXs), de-multiplexers (i.e., DEMUXs), and permanent magnetic memories (i.e., PMMs), and the like, and/or employ XY or XYZ addressing schemes, and/or employ control lines that extend in a “braided” pattern across an array of devices. Many of these described approaches are particularly suited for implementing input to and/or output from such processors. Superconducting quantum processors comprising superconducting digital-analog converters (DACs) are provided. The DACs may use kinetic inductance to store energy via thin-film superconducting materials and/or series of Josephson junctions, and may use single-loop or multi-loop designs. Particular constructions of energy storage elements are disclosed, including meandering structures. Galvanic connections between DACs and/or with target devices are disclosed, as well as inductive connections.
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公开(公告)号：US11105866B2
公开(公告)日：2021-08-31
申请号：US16397790
申请日：2019-04-29
申请人： D-WAVE SYSTEMS INC.
IPC分类号： G01R33/035 , H01L39/22 , G06N10/00
摘要： A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
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公开(公告)号：US20200371974A1
公开(公告)日：2020-11-26
申请号：US16872595
申请日：2020-05-12
申请人： D-WAVE SYSTEMS INC.
摘要： A quantum processor performs input and output which may be performed synchronously. The quantum processor executes a problem to generate a classical output state, which is read out at least partially by an I/O system. The I/O system also transmits a classical input state to by the I/O system, which may include the same qubit-proximate devices used for read-out. The classical input state is written to the qubits, and the quantum processor executes based on the classical input state (e.g., by performing reverse annealing to transform the classical input state to quantum state).
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9.发明申请公开(公告)号：US20200311591A1
公开(公告)日：2020-10-01
申请号：US16830650
申请日：2020-03-26
申请人： D-WAVE SYSTEMS INC.
发明人： William W. Bernoudy , Mohammad H. Amin , James A. King , Jeremy P. Hilton , Richard G. Harris , Andrew J. Berkley , Kelly T. R. Boothby
摘要： A hybrid computing system for solving a computational problem includes a digital processor, a quantum processor having qubits and coupling devices that together define a working graph of the quantum processor, and at least one nontransitory processor-readable medium communicatively coupleable to the digital processor which stores at least one of processor-executable instructions or data. The digital processor receives a computational problem, and programs the quantum processor with a first set of bias fields and a first set of coupling strengths. The quantum processor generates samples as potential solutions to an approximation of the problem. The digital processor updates the approximation by determining a second set of bias fields based at least in part on the first set of bias fields and a first set of mean fields that are based at least in part on the first set of samples and coupling strengths of one or more virtual coupling devices.
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10.发明授权公开(公告)号：US10552757B2
公开(公告)日：2020-02-04
申请号：US16057500
申请日：2018-08-07
申请人： D-Wave Systems Inc.
发明人： Mohammad H. S. Amin , Andrew J. Berkley , Richard G. Harris , Trevor Michael Lanting , Anatoly Yu Smirnov
摘要： Systems and methods for employing macroscopic resonant tunneling operations in quantum processors are described. New modes of use for quantum processor architectures employ probe qubits to determine energy eigenvalues of a problem Hamiltonian through macroscopic resonant tunneling operations. A dedicated probe qubit design that may be added to quantum processor architectures is also described. The dedicated probe qubit enables improved performance of macroscopic resonant tunneling operations and, consequently, improved performance of the new modes of use described.
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