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公开(公告)号:US11967899B2
公开(公告)日:2024-04-23
申请号:US17191805
申请日:2021-03-04
Applicant: Marel Power Solutions, Inc.
Inventor: Jean-Claude Harel
IPC: H02M3/156 , H01L21/50 , H01L23/02 , H01L23/31 , H02B1/20 , H02K11/33 , H02M1/32 , H02M7/00 , H02M7/53846 , H05K7/14 , H05K7/20
CPC classification number: H02M3/1563 , H01L21/50 , H01L23/02 , H01L23/31 , H02B1/20 , H02K11/33 , H02M1/32 , H02M7/003 , H02M7/538466 , H05K7/1432 , H05K7/209 , H02M1/327
Abstract: A compact inverter system includes a bus bar. The bus bar includes a terminal for connection to a positive terminal of a DC voltage supply. The compact inverter also includes a heat sink, a first transistor, and a second transistor. The first transistor has first and second terminals between which current is transmitted when the first transistor is activated, and a first gate terminal controlling the first transistor. The first terminal of the first transistor is thermally and electrically connected to the bus bar. The second transistor has first and second terminals between which current is transmitted when the second transistor is activated, and a second gate terminal controlling the second transistor. The first terminal of the second transistor is thermally and electrically connected to the heat sink. The first and second transistors are positioned between the bus bar and the heat sink. The first transistor is positioned between the second transistor and the bus bar. The second transistor is positioned between the first transistor and the heat sink.
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公开(公告)号:US11831250B2
公开(公告)日:2023-11-28
申请号:US17358065
申请日:2021-06-25
Applicant: General Electric Company
Inventor: Zhi Zhou , Steven Mankevich
IPC: H02M7/5387 , H02M3/158 , H02M7/53846 , H02M5/458
CPC classification number: H02M7/53875 , H02M3/1582 , H02M7/538466
Abstract: A multi-switch types hybrid power electronics build block (MST HPEBB) least replaceable unit converter employs a first low voltage side (for example, 1000 volt power switches) and a second high voltage side (for example, 3000 volt power switches). The MST HPEBB LRU employs multiple bridge converters connected in series and/or in parallel, and coupled in part by a 1:1 transformer. To reduce weight and volume requirements compared to known PEBB LRUs, different power switch types are employed in different bridge converters. For example, in one exemplary embodiment, low voltage 1.7 kVolt SiC MOSFETS may be employed on the lower voltage side, while at least some 4.5 kVolt Silicon IGBTs may be employed on the high voltage side.
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3.
公开(公告)号:US20080094863A1
公开(公告)日:2008-04-24
申请号:US11582804
申请日:2006-10-18
Applicant: Dorin O. Neacsu
Inventor: Dorin O. Neacsu
IPC: H02J3/00
CPC classification number: H02M1/088 , H02M7/53832 , H02M7/538466 , H02M2001/385
Abstract: Inverter-filter non-linearity blanking time and zero current clamping compensation is accomplished by comparing the average output current with the discontinuous current mode threshold values to determine when the average output current is entering a discontinuous current mode and introducing a compensation voltage to the inverter drive voltage in response to the average output current entering a discontinuous current mode to compensate for discontinuous current mode distortion of the inverter output voltage.
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公开(公告)号:US20240333175A1
公开(公告)日:2024-10-03
申请号:US18614887
申请日:2024-03-25
Applicant: STMicroelectronics International N.V.
Inventor: Yannick HAGUE , Guillaume THIENNOT , Romain LAUNOIS
IPC: H02M7/53846 , H02M7/5383
CPC classification number: H02M7/538463 , H02M7/538466 , H02M7/53835
Abstract: A converter circuit is configured to convert a DC voltage into an AC voltage using a first thyristor and second thyristor in series in a first branch, a third thyristor and fourth thyristor in series in a second branch in an antiparallel configuration to the first branch, and a first transistor and second transistor in series in a third branch. When the AC voltage is equal to zero, and when the first thyristor is conductive and the first and second transistors are non-conductive, a first positive current is applied to the gate of the antiparallel third thyristor to control turn on and ensure that the current circulating in the first thyristor falls below the holding current.
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公开(公告)号:US20230275528A1
公开(公告)日:2023-08-31
申请号:US18004607
申请日:2021-06-25
Inventor: Daiki TERASHIMA , Yoshihiro TAWADA , Tomoya KATSUKURA , Issei FUKASAWA
IPC: H02M7/53846 , H02M1/12 , H02M1/00
CPC classification number: H02M7/538466 , H02M1/0009 , H02M1/126
Abstract: A control device is a control device of a power conversion device, and includes a conversion value calculation unit that acquires a current value of a current flowing in an alternating-current capacitor connected to a capacitor circuit in an output circuit on an alternating-current side of an inverter circuit and performs conversion of the current value to obtain a predetermined conversion value, and a failure detection unit that compares the conversion value obtained by the conversion value calculation unit and a predetermined determination value to be used in failure detection to detect a failure of the alternating-current capacitor.
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公开(公告)号:US11689093B2
公开(公告)日:2023-06-27
申请号:US17193515
申请日:2021-03-05
Applicant: GM Global Technology Operations LLC
Inventor: Muhammad H. Alvi , Alireza Fatemi , Suresh Gopalakrishnan
IPC: H02M1/00 , H02M7/53846 , H01L27/07 , H02M7/5387 , H02M1/38 , H02M7/5388 , B60L50/60 , H02P27/08
CPC classification number: H02M1/0087 , H01L27/0727 , H02M1/38 , H02M7/5387 , H02M7/538466 , B60L50/60 , H02M7/5388 , H02P27/08 , B60L15/08 , B60L15/00
Abstract: A current source inverter includes a first phase leg including a plurality of switching devices, a second phase leg including a plurality of switching devices, and a third phase leg including a plurality of switching devices. The current source inverter also includes a zero-state phase leg including at least one switching device, wherein the zero-state phase leg is configured to transition from an open state to prevent current flow to a closed state to allow current flow between a positive and negative terminal during a dead-band time.
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公开(公告)号:US20170294840A1
公开(公告)日:2017-10-12
申请号:US15624880
申请日:2017-06-16
Applicant: Danmarks Tekniske Universitet
Inventor: Mickey P. Madsen , Jeppe Amsdorf Pedersen
IPC: H02M3/338 , H02M1/08 , H02M7/53846
CPC classification number: H02M3/3385 , H02M1/08 , H02M3/158 , H02M3/1588 , H02M7/5383 , H02M7/538466 , H02M2001/0006 , H02M2001/0058 , Y02B70/1425 , Y02B70/1441 , Y02B70/1466 , Y02B70/1491
Abstract: The present invention relates to resonant power converters and inverters comprising a self-oscillating feedback loop coupled from a switch output to a control input of a switching network comprising one or more semiconductor switches. The self-oscillating feedback loop sets a switching frequency of the power converter and comprises a first intrinsic switch capacitance coupled between a switch output and a control input of the switching network and a first inductor. The first inductor is coupled in-between a first bias voltage source and the control input of the switching network and has a substantially fixed inductance. The first bias voltage source is configured to generate an adjustable bias voltage applied to the first inductor. The output voltage of the power converter is controlled in a flexible and rapid manner by controlling the adjustable bias voltage.
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公开(公告)号:US12027975B2
公开(公告)日:2024-07-02
申请号:US17191816
申请日:2021-03-04
Applicant: Marel Power Solutions, Inc.
Inventor: Jean-Claude Harel
IPC: H02M3/156 , H01L21/50 , H01L23/02 , H01L23/31 , H02B1/20 , H02K11/33 , H02M1/32 , H02M7/00 , H02M7/53846 , H05K7/14 , H05K7/20
CPC classification number: H02M3/1563 , H01L21/50 , H01L23/02 , H01L23/31 , H02B1/20 , H02K11/33 , H02M1/32 , H02M7/003 , H02M7/538466 , H05K7/1432 , H05K7/209 , H02M1/327
Abstract: A packaged power module includes a case, and a metal structure that has first and second surfaces. A transistor is also included that has first and second terminals between which current is transmitted when the transistor is activated, and a control terminal controlling the transistor, wherein the first terminal is sintered to the first surface. A first opening through the case exposes the second surface.
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公开(公告)号:US11929688B2
公开(公告)日:2024-03-12
申请号:US17298938
申请日:2019-12-04
Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES , INSTITUT POLYTECHNIQUE DE GRENOBLE
Inventor: Rawad Makhoul , Pierre Perichon , Xavier Maynard , Jia Zhuang , Yves Lembeye
IPC: H02M1/08 , H02M7/48 , H02M7/53846
CPC classification number: H02M7/538466 , H02M1/08 , H02M7/4815
Abstract: A power converter for converting a DC input voltage into an AC output voltage, the power converter having a structure of Phi-2 type, and includes an input terminal for the DC input voltage, an output terminal for the AC output voltage, a power switch equipped with a control electrode, a first electrode and a second electrode linked to a reference potential, the power switch being configured to receive a drive signal at the control electrode, the converter further comprising a self-oscillating circuit, connected between the output terminal and the control electrode, and configured to supply and maintain a sinusoidal drive signal to the power switch from the output voltage.
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10.
公开(公告)号:US20230231496A1
公开(公告)日:2023-07-20
申请号:US18155911
申请日:2023-01-18
Applicant: Robert Bosch GmbH
Inventor: Hadiuzzaman Syed , Nico Wuestemann , Cristino Salcines , Karl Oberdieck
IPC: H02M7/53846 , H02M7/48 , H02M1/00
CPC classification number: H02M7/538466 , H02M1/0041 , H02M7/4818
Abstract: An inverter. The inverter includes a first and second transistors, which are a high-side transistor and a low-side transistor of the inverter, and control electronics configured to trigger a first switching operation, in which the first transistor is switched on, wherein the second transistor is in a switched-off state, wherein a parasitic capacitance of the first transistor is discharged during the first switching operation, to trigger a second switching operation, in which the first transistor is switched off or switched on again, wherein the second transistor simultaneously remains in the switched-off state, wherein the parasitic capacitance of the first transistor is already discharged in the second switching operation, to record a time difference which describes a difference between a duration of the first switching operation and a duration of the second switching operation, and to determine a characteristic operating parameter of the first transistor based on the time difference.
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