公开(公告)号：US08031001B2

公开(公告)日：2011-10-04

申请号：US12549256

申请日：2009-08-27

申请人： Akira Ide

发明人： Akira Ide

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/4565 ,  H03F2203/45416 ,  H03F2203/45521 ,  H03F2203/45646 ,  H03F2203/45648 ,  H03F2203/45674

摘要： A differential amplifier includes a main differential amplifier circuit that receives a pair of input signals and supplies a pair of output signals based on a difference between the input signals; and a bias control differential amplifier circuit that receives the pair of output signals, controls a control terminal of a current-limiting transistor making up the main differential amplifying circuit based on an offset voltage included in the output signals, and reduces the offset voltage.

摘要翻译： 差分放大器包括主差分放大器电路，其接收一对输入信号并且基于输入信号之间的差提供一对输出信号; 以及接收所述一对输出信号的偏置控制差分放大器电路，基于包括在所述输出信号中的偏移电压来控制构成所述主差分放大电路的限流晶体管的控制端，并且减小所述偏移电压。

公开(公告)号：US20160079943A1

公开(公告)日：2016-03-17

申请号：US14569079

申请日：2014-12-12

申请人： ESS Technology, Inc.

发明人： A. Martin Mallinson

IPC分类号： H03F3/45 ,  H03F1/02

CPC分类号： H03F3/45076 ,  H03F1/0205 ,  H03F1/34 ,  H03F3/45475 ,  H03F3/45941 ,  H03F3/4595 ,  H03F2200/09 ,  H03F2203/45114 ,  H03F2203/45116 ,  H03F2203/45138 ,  H03F2203/45224 ,  H03F2203/45336 ,  H03F2203/45416 ,  H03F2203/45446 ,  H03F2203/45521 ,  H03F2203/45528 ,  H03F2203/45594

摘要： An apparatus is disclosed for providing a common mode voltage to the inputs of a first differential amplifier which outputs the difference between two signals. A second differential amplifier receives the output of the first differential amplifier, and the output of the second differential amplifier is fed back to the inputs of the first differential amplifier as a common mode voltage. Since both inputs of the first differential amplifier receive the fed hack common mode voltage, the first differential amplifier still outputs only the difference in the two signals, but the presence of the common mode voltage allows the first differential amplifier to operate with lower noise if the voltage levels of the inputs to the first differential amplifier vary. The second differential amplifier may be of significantly lower quality and cost than the first differential amplifier, without affecting the performance of the first differential amplifier.

摘要翻译： 公开了一种用于向输出两个信号之间的差的第一差分放大器的输入端提供共模电压的装置。 第二差分放大器接收第一差分放大器的输出，第二差分放大器的输出作为共模电压被反馈到第一差分放大器的输入端。 由于第一差分放大器的两个输入都接收馈电的黑客共模电压，所以第一差分放大器仍然仅输出两个信号的差值，但是共模电压的存在允许第一差分放大器以较低的噪声运行，如果 第一差分放大器的输入的电压电平变化。 第二差分放大器的质量和成本可能比第一差分放大器低得多，而不影响第一差分放大器的性能。

公开(公告)号：US20100295618A1

公开(公告)日：2010-11-25

申请号：US12549256

申请日：2009-08-27

申请人： Akira Ide

发明人： Akira Ide

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/4565 ,  H03F2203/45416 ,  H03F2203/45521 ,  H03F2203/45646 ,  H03F2203/45648 ,  H03F2203/45674

摘要： A differential amplifier includes a main differential amplifier circuit that receives a pair of input signals and supplies a pair of output signals based on a difference between the input signals; and a bias control differential amplifier circuit that receives the pair of output signals, controls a control terminal of a current-limiting transistor making up the main differential amplifying circuit based on an offset voltage included in the output signals, and reduces the offset voltage.

摘要翻译： 差分放大器包括主差分放大器电路，其接收一对输入信号并且基于输入信号之间的差提供一对输出信号; 以及接收所述一对输出信号的偏置控制差分放大器电路，基于包括在所述输出信号中的偏移电压来控制构成所述主差分放大电路的限流晶体管的控制端，并且减小所述偏移电压。

公开(公告)号：US09209789B1

公开(公告)日：2015-12-08

申请号：US14459168

申请日：2014-08-13

申请人： QUALCOMM Incorporated

发明人： Miao Li ,  Xiaohua Kong ,  Dong Ren

IPC分类号： H03L5/00 ,  H03K5/02 ,  H03K19/0175

CPC分类号： H03F3/505 ,  H03F1/0272 ,  H03F3/45183 ,  H03F3/4565 ,  H03F3/45708 ,  H03F2200/453 ,  H03F2200/78 ,  H03F2203/45292 ,  H03F2203/45416 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45594 ,  H03F2203/45604 ,  H03F2203/45664 ,  H03F2203/45702 ,  H04L25/0276

摘要： Techniques for converting a signal from a small-signal format into a rail-to-rail format are described herein. In one embodiment, a receiver comprises a voltage-level shifter configured to shift a common-mode voltage of a differential signal to obtain a level-shifted differential signal, an amplifier configured to amplify the level-shifted differential signal into an amplified differential signal, and a driver stage configured to convert the amplified differential signal into a rail-to-rail signal. The receiver also comprises a common-mode feedback circuit configured to generate a feedback voltage that is proportional to an output common-mode voltage of the amplifier, and to generate a bias voltage for input to the amplifier based on a difference between the feedback voltage and a reference voltage, wherein the output common-mode voltage of the amplifier depends on the bias voltage.

摘要翻译： 这里描述了用于将信号从小信号格式转换为轨到轨格式的技术。 在一个实施例中，接收机包括：电压电平移位器，被配置为移位差分信号的共模电压以获得电平移位的差分信号;放大器，被配置为将电平移位的差分信号放大为放大的差分信号， 以及驱动器级，被配置为将放大的差分信号转换成轨到轨信号。 接收机还包括共模反馈电路，其被配置为产生与放大器的输出共模电压成比例的反馈电压，并且基于反馈电压和反馈电压之间的差产生用于输入到放大器的偏置电压 参考电压，其中放大器的输出共模电压取决于偏置电压。

公开(公告)号：US4788510A

公开(公告)日：1988-11-29

申请号：US55679

申请日：1987-05-29

申请人： Ronald J. Wozniak

发明人： Ronald J. Wozniak

IPC分类号： H03F3/45

CPC分类号： H03F3/4565 ,  H03F2203/45416 ,  H03F2203/45664 ,  H03F2203/45674

摘要： An improved differential input amplifier stage used as the input stage in digital differential line receives or operational amplifiers. The differential input amplifier stage has a pair of input transistors forming a differential pair with a common output node and two complementary output nodes; a current mirror, coupled to the two complementary output nodes and responsive to a first one of the two complementary output nodes and a single-ended output signal on the second one of the two complementary output nodes; and a current source transistor coupled to the common output node and responsive to the first one of the two complementary output nodes. The current source transistor maintains the voltage on the first one of the two complementary output nodes substantially constant, thereby improving common mode and power supply noise immunity and providing faster differential response by the differential input amplifier stage.

公开(公告)号：US09595931B2

公开(公告)日：2017-03-14

申请号：US14569079

申请日：2014-12-12

申请人： ESS Technology, Inc.

发明人： A. Martin Mallinson

IPC分类号： H03F3/45 ,  H03F1/34 ,  H03F1/02

CPC分类号： H03F3/45076 ,  H03F1/0205 ,  H03F1/34 ,  H03F3/45475 ,  H03F3/45941 ,  H03F3/4595 ,  H03F2200/09 ,  H03F2203/45114 ,  H03F2203/45116 ,  H03F2203/45138 ,  H03F2203/45224 ,  H03F2203/45336 ,  H03F2203/45416 ,  H03F2203/45446 ,  H03F2203/45521 ,  H03F2203/45528 ,  H03F2203/45594

摘要： An apparatus is disclosed for providing a common mode voltage to the inputs of a first differential amplifier which outputs the difference between two signals. A second differential amplifier receives the output of the first differential amplifier, and the output of the second differential amplifier is fed back to the inputs of the first differential amplifier as a common mode voltage. Since both inputs of the first differential amplifier receive the fed back common mode voltage, the first differential amplifier still outputs only the difference in the two signals, but the presence of the common mode voltage allows the first differential amplifier to operate with lower noise if the voltage levels of the inputs to the first differential amplifier vary. The second differential amplifier may be of significantly lower quality and cost than the first differential amplifier, without affecting the performance of the first differential amplifier.

摘要翻译： 公开了一种用于向输出两个信号之间的差的第一差分放大器的输入端提供共模电压的装置。 第二差分放大器接收第一差分放大器的输出，第二差分放大器的输出作为共模电压被反馈到第一差分放大器的输入端。 由于第一差分放大器的两个输入都接收反馈共模电压，所以第一差分放大器仍然仅输出两个信号的差值，但是共模电压的存在允许第一差分放大器以更低的噪声工作，如果 第一差分放大器的输入的电压电平变化。 第二差分放大器的质量和成本可以比第一差分放大器低得多，而不影响第一差分放大器的性能。

公开(公告)号：US5420524A

公开(公告)日：1995-05-30

申请号：US157242

申请日：1993-11-26

申请人： Stephen Webster

发明人： Stephen Webster

IPC分类号： H01L27/06 ,  H01L21/8222 ,  H03F1/08 ,  H03F3/45 ,  H03K19/0175 ,  H03K19/086 ,  H03K19/003

CPC分类号： H03F3/4556 ,  H03F1/083 ,  H03F3/45098 ,  H03F2203/45416 ,  H03F2203/45458 ,  H03F2203/45702

摘要： An improved differential gain stage for a bipolar monolithic integrated circuit. The integrated circuit is formed from a semiconductor substrate, and the differential gain stage includes first and second bipolar transistors. The base of the first transistor and the base of the second transistor form a differential input for the gain stage comprising non-inverting and inverting inputs respectively. The collectors of the transistors form a differential output. The differential gain stage includes a capacitor stage comprising: a peaking capacitor, and first, second, third and fourth capacitor structures. The peaking capacitor is coupled between the emitters of the first and second transistors. The first and second capacitor structures are located at a first spaced relationship from the substrate and the first capacitor is coupled to the emitter of the first transistor and the second capacitor is coupled to the emitter of the second transistor. The third and fourth capacitor structures are located at a second spaced relationship from the substrate. The third capacitor is connected to the first capacitor and the connection forms a first node. The fourth capacitor is connected to the second capacitor and the connection forms a second node. The differential gain stage also includes first and second buffers. The first buffer has an input connected to the non-inverting input of the gain stage and an output connected to the first node. The second buffer has an input connected to the inverting input of the gain stage and an output connected to the second node.

摘要翻译： 用于双极单片集成电路的改进的差分增益级。 集成电路由半导体衬底形成，差分增益级包括第一和第二双极晶体管。 第一晶体管的基极和第二晶体管的基极分别形成用于增益级的差分输入，包括非反相和反相输入。 晶体管的集电极形成差分输出。 差分增益级包括电容器级，包括：峰值电容器，以及第一，第二，第三和第四电容器结构。 峰值电容器耦合在第一和第二晶体管的发射极之间。 第一和第二电容器结构位于与衬底之间的第一间隔关系处，并且第一电容器耦合到第一晶体管的发射极，而第二电容耦合到第二晶体管的发射极。 第三和第四电容器结构位于与衬底之间的第二间隔关系。 第三电容器连接到第一电容器，并且连接形成第一节点。 第四电容器连接到第二电容器，并且连接形成第二节点。 差分增益级还包括第一和第二缓冲器。 第一缓冲器具有连接到增益级的同相输入的输入端和连接到第一节点的输出。 第二缓冲器具有连接到增益级的反相输入的输入端和连接到第二节点的输出。