中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

8 records (took 0.082 seconds)

    Fast locking dual loop clock and data recovery circuits
    2.
    发明授权
    Fast locking dual loop clock and data recovery circuits 有权

    公开(公告)号：US12052023B1

    公开(公告)日：2024-07-30

    申请号：US18158662

    申请日：2023-01-24

    Applicant: QUALCOMM Incorporated

    Inventor： Lejie Lu ,  Hao Liu ,  Yu Song ,  Dong Ren

    IPC: H03L7/18 ,  H03L7/093 ,  H03L7/099 ,  H03L7/187

    CPC classification number: H03L7/187 ,  H03L7/093 ,  H03L7/0992

    Abstract: A clock recovery circuit includes a frequency tracking loop including a first charge pump, and a phase tracking loop including a second charge pump. A voltage-controlled oscillator responds to the frequency tracking loop in a first operating mode and to the phase tracking loop in a second operating mode. A lock detector outputs an activation signal that indicates whether the clock recovery circuit has acquired frequency lock. A loop filter coupled to an input of the voltage-controlled oscillator includes a switchable resistor and a programmable delay element responsive to the activation signal. The first charge pump is disabled when the activation signal indicates frequency lock has been acquired, and disabled when the activation signal indicates frequency lock has not been acquired. The switchable resistor is bypassed when an output of the programmable delay element is in the first signaling state.

    High-speed sense amplifier with a dynamically cross-coupled regeneration stage
    3.
    发明授权
    High-speed sense amplifier with a dynamically cross-coupled regeneration stage 有权

    公开(公告)号：US11095273B1

    公开(公告)日：2021-08-17

    申请号：US16940280

    申请日：2020-07-27

    Applicant: QUALCOMM Incorporated

    Inventor： Todd Morgan Rasmus ,  Li Sun ,  Dong Ren

    IPC: H03K3/037 ,  H04L25/03 ,  G11C7/06 ,  H03K5/24 ,  H03M9/00

    Abstract: In certain aspects, a regenerative stage of a sense amplifier includes a first inverter having an input and an output, and a second inverter having an input and an output. The regenerative stage also includes a third inverter having an input, an output coupled to the input of the second inverter, a first supply terminal coupled to a supply rail, and a second supply terminal coupled to the output of the first inverter. The regenerative stage further includes a fourth inverter having an input, an output coupled to the input of the first inverter, a first supply terminal coupled to the supply rail, and a second supply terminal coupled to the output of the second inverter.

    Wideband rail-to-rail voltage controlled oscillator
    4.
    发明授权
    Wideband rail-to-rail voltage controlled oscillator 有权

    公开(公告)号：US11923861B1

    公开(公告)日：2024-03-05

    申请号：US18164211

    申请日：2023-02-03

    Applicant: QUALCOMM Incorporated

    Inventor： Hao Liu ,  Lejie Lu ,  Yu Song ,  Dong Ren

    IPC: H03L7/099 ,  H03L7/089 ,  H03L7/091

    CPC classification number: H03L7/0995 ,  H03L7/0891 ,  H03L7/091

    Abstract: A voltage controlled oscillator (VCO), including: at least one second upper voltage rail; at least one second lower voltage rail; a ring of N cascaded inverters, wherein the set of N cascaded inverters are coupled between the at least one second upper voltage rail and the at least one second lower voltage rail; at least one first frequency band select circuit coupled between first upper voltage rail and the at least one second upper voltage rail; at least one second frequency band select circuit coupled between the at least one second lower voltage rail and first lower voltage rail; at least one first VCO frequency control circuit coupled between the first upper voltage rail and the at least one second upper voltage rail; and at least one second VCO frequency control circuit coupled between the at least one second lower voltage rail and the first lower voltage rail.

    Apparatus to convert electrical signals from small-signal format to rail-to-rail format
    5.
    发明授权
    Apparatus to convert electrical signals from small-signal format to rail-to-rail format 有权
    将电信号从小信号格式转换为轨到轨格式的装置

    公开(公告)号：US09209789B1

    公开(公告)日：2015-12-08

    申请号：US14459168

    申请日：2014-08-13

    Applicant: QUALCOMM Incorporated

    Inventor： Miao Li ,  Xiaohua Kong ,  Dong Ren

    IPC: H03L5/00 ,  H03K5/02 ,  H03K19/0175

    CPC classification number: H03F3/505 ,  H03F1/0272 ,  H03F3/45183 ,  H03F3/4565 ,  H03F3/45708 ,  H03F2200/453 ,  H03F2200/78 ,  H03F2203/45292 ,  H03F2203/45416 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45594 ,  H03F2203/45604 ,  H03F2203/45664 ,  H03F2203/45702 ,  H04L25/0276

    Abstract: Techniques for converting a signal from a small-signal format into a rail-to-rail format are described herein. In one embodiment, a receiver comprises a voltage-level shifter configured to shift a common-mode voltage of a differential signal to obtain a level-shifted differential signal, an amplifier configured to amplify the level-shifted differential signal into an amplified differential signal, and a driver stage configured to convert the amplified differential signal into a rail-to-rail signal. The receiver also comprises a common-mode feedback circuit configured to generate a feedback voltage that is proportional to an output common-mode voltage of the amplifier, and to generate a bias voltage for input to the amplifier based on a difference between the feedback voltage and a reference voltage, wherein the output common-mode voltage of the amplifier depends on the bias voltage.

    Abstract translation: 这里描述了用于将信号从小信号格式转换为轨到轨格式的技术。 在一个实施例中，接收机包括：电压电平移位器，被配置为移位差分信号的共模电压以获得电平移位的差分信号;放大器，被配置为将电平移位的差分信号放大为放大的差分信号， 以及驱动器级，被配置为将放大的差分信号转换成轨到轨信号。 接收机还包括共模反馈电路，其被配置为产生与放大器的输出共模电压成比例的反馈电压，并且基于反馈电压和反馈电压之间的差产生用于输入到放大器的偏置电压 参考电压，其中放大器的输出共模电压取决于偏置电压。

    Ultra-high bandwidth inductorless amplifier
    6.
    发明授权
    Ultra-high bandwidth inductorless amplifier 有权

    公开(公告)号：US11736069B2

    公开(公告)日：2023-08-22

    申请号：US17173947

    申请日：2021-02-11

    Applicant: QUALCOMM Incorporated

    Inventor： Hao Liu ,  Li Sun ,  Dong Ren

    IPC: H03F3/45 ,  H03F1/34 ,  H03F1/26

    CPC classification number: H03F1/342 ,  H03F1/26 ,  H03F3/45475 ,  H03F3/45071 ,  H03F3/45179 ,  H03F2200/372

    Abstract: An amplifier has a first amplifying circuit configured to receive a voltage input and to output an amplified current, a second amplifying circuit configured to receive the amplified current and to output an amplified voltage, the second amplifying circuit comprising a pair of feedback resistive elements, each feedback resistive element being coupled to a gate and drain of a corresponding transistor in a pair of output transistors in the second amplifying circuit, and a feedback circuit configured to provide a negative feedback loop between an input and an output of the pair of output transistors, the feedback circuit including a first transconductance amplification circuit and a first equalizing circuit.

Patent Agency Ranking