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公开(公告)号：US09553751B2
公开(公告)日：2017-01-24
申请号：US15150461
申请日：2016-05-10
申请人： DENSO CORPORATION
CPC分类号： H04L27/2649 , G01C19/5614 , H03M1/50 , H04B1/16 , H04L27/06 , H04L27/14 , H04L27/22
摘要： A demodulation device for demodulating a base signal from a composite signal, which is composed of a carrier wave and a sensor modulation signal of the base signal. The demodulation device determines a difference between the composite signal of a former-half period and the composite signal of a latter-half period to be a pre-correction base signal. The former-half period is a one-half period of a sampling period starting at one of a local maximum and a local minimum of the carrier wave. The latter-half period follows the former-half period. The demodulation device determines a reference level from the composite signal and determines a signal level of a post-correction base signal based on a ratio between a signal level of the pre-correction base signal and the reference level.
摘要翻译： 一种解调装置，用于从由载波和基本信号的传感器调制信号组成的复合信号中解调基本信号。 解调装置确定前半周期的复合信号与后半周期的复合信号之间的差作为预校正基准信号。 前半周期是从载波的局部最大值和局部最小值之一开始的采样周期的一半周期。 后半期是前半期。 解调装置根据复合信号确定参考电平，并根据校正前基准信号的信号电平与参考电平之间的比率确定校正后基准信号的信号电平。
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公开(公告)号：US10693488B2
公开(公告)日：2020-06-23
申请号：US16506191
申请日：2019-07-09
申请人： DENSO CORPORATION
发明人： Takamoto Watanabe
IPC分类号： H03M1/60 , H03M1/50 , G04F10/00 , H03K5/131 , H03M1/20 , H03M1/10 , H03M1/00 , H03M1/12 , H03B19/00
摘要： A digitalization device includes a first pulse delay unit, a second pulse delay unit, and an addition output unit. The first pulse delay unit includes (2n−(2m−1)) first delay units connected in series, and outputs a first signal according to the number of first delay units through which a first pulse signal passes. The second pulse delay unit includes (2n+(2m−1)) second delay units connected in series, and outputs a second signal according to the number of the second delay units through which a second pulse signal passes. Here, n and m are natural numbers, and n≥m. The addition output unit outputs, as a digital value, an addition value obtained by adding a numerical value based on the output of the first pulse delay unit and a numerical value based on the output of the second pulse delay unit.
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公开(公告)号：US09645122B2
公开(公告)日：2017-05-09
申请号：US14288436
申请日：2014-05-28
申请人： DENSO CORPORATION
CPC分类号： G01N29/34 , B06B1/0261 , B06B1/0292 , G01N29/343 , G01P21/00 , H03B5/30
摘要： A gyro sensor includes a vibrator and a drive circuit. A PWM drive signal is applied to a pair of electrodes of the vibrator. The drive circuit outputs a high level signal and a low level signal to the electrodes as the PWM drive signal. The high level signal and the low level signal have potentials higher and lower than that of the reference signal, respectively. The drive circuit outputs the high level signal to one of the pair of electrodes and the low level signal to the other of the pair of electrodes.
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公开(公告)号：US09614513B2
公开(公告)日：2017-04-04
申请号：US14288464
申请日：2014-05-28
申请人： DENSO CORPORATION
IPC分类号： H03K7/08 , G01C19/5726
CPC分类号： H03K7/08 , G01C19/5726
摘要： In a gyro sensor, a TDC detects a magnitude of vibration of a vibrator. A drive circuit (excluding the TDC) determines a duty ratio of a PWM drive signal in accordance with the magnitude of vibration so that the magnitude of vibration becomes a predetermined magnitude and outputs the PWM drive signal having the determined duty ratio. The drive circuit (excluding the TDC) includes a control circuit and a DCO. The control circuit measures time corresponding to the control value by using a gate delay time, generates the PWM drive signal having a pulse width corresponding to the control value and outputs the PWM drive signal.
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公开(公告)号：US09105536B2
公开(公告)日：2015-08-11
申请号：US13656015
申请日：2012-10-19
发明人： Susumu Yamazaki , Takamoto Watanabe
CPC分类号： H01L27/146 , H04N5/3577 , H04N5/374 , H04N5/378
摘要： A solid-state imaging device is capable of suppressing as much as possible an increase in power consumption of a low-frequency noise removing process. A pixel unit includes pixels outputting pixel signals corresponding to an amount of incident light and correction pixels outputting correction pixel signals corresponding to a correction reference voltage. An AD conversion circuit includes a delay circuit, to which a plurality of delay elements are connected, and outputs a digital signal corresponding to the number of delay elements through which a pulse signal passes when the pulse signal passes through the number of delay elements corresponding to a level of the pixel signal or the correction pixel signal.
摘要翻译： 固态成像装置能够尽可能地抑制低频噪声消除处理的功耗的增加。 像素单元包括输出对应于入射光量的像素信号的像素和输出对应于校正参考电压的校正像素信号的校正像素。 AD转换电路包括延迟电路，多个延迟元件连接到该延迟电路，并且当脉冲信号通过对应于多个延迟元件的延迟元件的数量时，输出对应于脉冲信号通过的延迟元件的数量的数字信号 像素信号或校正像素信号的电平。
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公开(公告)号：US10862499B2
公开(公告)日：2020-12-08
申请号：US16785854
申请日：2020-02-10
申请人： DENSO CORPORATION
发明人： Takamoto Watanabe
摘要： An A/D converter circuit that converts analog information to numerical data is provided with a pulse delay circuit and an output unit. A sampling period is set so that a relationship between the sampling period and a circulation period of a pulse signal passing through a ring delay circuit satisfies a relational expression Trdl×n
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公开(公告)号：US10520311B2
公开(公告)日：2019-12-31
申请号：US15600504
申请日：2017-05-19
申请人： DENSO CORPORATION
IPC分类号： G01C19/56 , G01C19/06 , G01C19/5719 , G01C19/5776 , H03K5/00
摘要： A gyro sensor apparatus includes a driving section that supplies a driving signal, which is for vibrating a sensing element of a vibration-type gyro sensor in a drive axis direction, to the sensing element, and a processing unit that receives a first vibration signal having an amplitude proportional to a driving vibration amplitude, which is an amplitude of vibration in the drive axis direction of the sensing element and a second vibration signal having an amplitude proportional to Coriolis force generated in the sensing element due to an angular velocity of the sensing element. The processing unit is configured to calculate a ratio of Coriolis force to the driving vibration amplitude based on the first vibration signal and the second vibration signal and output a result of the calculation as a result of detection of the angular velocity of the sensing element.
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公开(公告)号：US10715164B2
公开(公告)日：2020-07-14
申请号：US16528825
申请日：2019-08-01
申请人： DENSO CORPORATION
发明人： Takamoto Watanabe
IPC分类号： H03M1/12 , H03K17/687 , H03K19/20
摘要： An A-D conversion circuit configured to convert an analog input signal into numerical data using a pulse delay circuit includes pulse position digitizing units, a clock generation circuit, and a processing unit. The clock generation circuit includes inverters each including one or more n-channel transistors and one or more p-channel transistors. The inverters differ from each other in a number ratio of the number of n-channel transistors connected in a common-gate parallel-connected manner and the number of p-channel transistors connected in a common-gate parallel-connected manner.
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公开(公告)号：US20130140434A1
公开(公告)日：2013-06-06
申请号：US13656015
申请日：2012-10-19
发明人： Susumu Yamazaki , Takamoto Watanabe
IPC分类号： H01L27/146
CPC分类号： H01L27/146 , H04N5/3577 , H04N5/374 , H04N5/378
摘要： A solid-state imaging device is capable of suppressing as much as possible an increase in power consumption of a low-frequency noise removing process. A pixel unit includes pixels outputting pixel signals corresponding to an amount of incident light and correction pixels outputting correction pixel signals corresponding to a correction reference voltage. An AD conversion circuit includes a delay circuit, to which a plurality of delay elements are connected, and outputs a digital signal corresponding to the number of delay elements through which a pulse signal passes when the pulse signal passes through the number of delay elements corresponding to a level of the pixel signal or the correction pixel signal.
摘要翻译： 固态成像装置能够尽可能地抑制低频噪声消除处理的功耗的增加。 像素单元包括输出对应于入射光量的像素信号的像素和输出对应于校正参考电压的校正像素信号的校正像素。 AD转换电路包括延迟电路，多个延迟元件连接到该延迟电路，并且当脉冲信号通过对应于多个延迟元件的延迟元件的数量时，输出对应于脉冲信号通过的延迟元件的数量的数字信号 像素信号或校正像素信号的电平。
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公开(公告)号：US12088315B2
公开(公告)日：2024-09-10
申请号：US17949322
申请日：2022-09-21
申请人： DENSO CORPORATION
发明人： Takamoto Watanabe
CPC分类号： H03M1/1245 , H03M1/0609 , H03M1/12 , H03M1/60
摘要： In an analog-to-digital converter, primary latches respectively latch an output of a corresponding one of delay units at respective sample times of different first clocks. The primary latches include at least first and second primary latches, and secondary latches include at least first and second secondary latches respectively corresponding to the at least first and second primary latches. Each of the at least first and second secondary latches is configured to latch, at a sample time of a common second clock, an output of a corresponding one of the at least first and second primary latches. The common second clock is based on at least one of the first clocks.
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