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    Power-over-ethernet (POE) breakout module
    2.
    发明授权
    Power-over-ethernet (POE) breakout module 有权

    公开(公告)号：US11509491B2

    公开(公告)日：2022-11-22

    申请号：US16900967

    申请日：2020-06-14

    申请人： DELL PRODUCTS L.P.

    发明人： Shree Rathinasamy ,  Robert Neal Beard ,  Victor Teeter

    IPC分类号： G06F1/00 ,  H04L12/10 ,  G06F1/26 ,  H04L49/35 ,  H04L49/00 ,  H04L49/40 ,  G06F1/3203

    摘要： Presented herein are embodiments of a power-over-Ethernet (PoE) breakout system that may be used to breakout a PoE port from a PoE information handling system into a number of breakout ports. In one or more embodiments, a PoE breakout system comprises: a PoE port for connecting to a PoE information handling system, such as a PoE switch; a plurality of breakout ports for connecting to powered devices, wherein each breakout port is configured to supply power to a powered device; and a power management module electrically coupled to the PoE port and configured to supply power to each breakout port according to a configuration that sets a power level for that breakout port. In one or more embodiments. the PoE breakout system comprises a data communications module that switches data traffic to a correct PoE breakout port according to its intended powered device.

    Stacked computer network devices having multiple master nodes
    3.
    发明授权
    Stacked computer network devices having multiple master nodes 有权

    公开(公告)号：US11469955B2

    公开(公告)日：2022-10-11

    申请号：US16924682

    申请日：2020-07-09

    申请人： ARRIS Enterprises LLC

    发明人： Christopher Dwane Thomas ,  Renjith Kumar Ponnappan

    IPC分类号： H04L41/0893 ,  H04L45/58 ,  G06F16/27 ,  H04L41/042 ,  H04L49/40 ,  H04L67/1095

    摘要： An electronic device is described. The electronic device includes a stack of computer network devices, such as a stack of switches and/or routers. This stack of computer network devices includes data planes and ports for directing packets or frames in a wireless network based at least in part on destinations of the packets or frames. Moreover, the electronic device may include multiple controllers (such as processors) that operate as master nodes and that perform network functions for the stack of computer network devices using a database. This database may include a common database that is accessible by the multiple controllers or multiple instances of the database in the multiple controllers, where the multiple instances of the database are synchronized.

    Method for managing multiple servers and device employing method
    5.
    发明授权
    Method for managing multiple servers and device employing method 有权

    公开(公告)号：US11283689B2

    公开(公告)日：2022-03-22

    申请号：US16444191

    申请日：2019-06-18

    申请人： HONGFUJIN PRECISION ELECTRONICS (TIANJIN) CO., LTD.

    发明人： Sheng-Chung Pan

    IPC分类号： H04L12/24 ,  H04L12/931 ,  H04L29/12 ,  H04L41/22 ,  H04L49/40 ,  H04L101/69 ,  H04L101/622

    摘要： A method for managing of managing a server center comprising: obtaining, from the switch, a MAC address and location information of each of the servers connected to the switch, and generating a first list; obtaining a MAC addresses and an IP address of each of the servers from the server center by using an IPMI command, and generating a second list; generating a third list based on the first list and the second list; obtaining a MAC address or an IP address of a server to be queried; and comparing the MAC address or the IP address of the server to be queried and the third list, and obtaining the location information of the server to be queried. A server center managing device and a non-transitory storage medium are also provided.

    Augmenting data plane functionality with field programmable integrated circuits
    7.
    发明授权
    Augmenting data plane functionality with field programmable integrated circuits 有权

    公开(公告)号：US11456970B1

    公开(公告)日：2022-09-27

    申请号：US16540741

    申请日：2019-08-14

    申请人： Barefoot Networks, Inc.

    发明人： Antonin Mathieu Bas ,  Anurag Agrawal ,  Changhoon Kim

    IPC分类号： H04L49/90 ,  H04L47/50 ,  H04L49/40 ,  H04L49/104 ,  H04L43/50

    摘要： Some embodiments provide novel circuits for augmenting the functionality of a data plane circuit of a forwarding element with one or more field programmable circuits and external memory circuits. The external memories in some embodiments serve as deep buffers that receive through one or more FPGAs a set of data messages from the data plane (DP) circuit to store temporarily. In some of these embodiments, one or more of the FPGAs implement schedulers that specify when data messages should be retrieved from the external memories and provided back to the data plane circuit for forwarding through the network. For instance, in some embodiments, a particular FPGA can perform a scheduling operation for a first set of data messages stored in its associated external memory, and can direct another FPGA to perform the scheduling operation for a second set of data messages stored in the particular FPGA's associated external memory. Specifically, in these embodiments, the particular FPGA determines when the first subset of data messages stored in its associated external memory should be forwarded back to the data plane circuit to forward to data messages in the network, while directing another FPGA to determine when a second subset of data messages stored in the particular FPGA's external memory should be forwarded back to the data plane circuit.