公开(公告)号：WO2019013904A1

公开(公告)日：2019-01-17

申请号：PCT/US2018/036091

申请日：2018-06-05

Applicant: GLOBALWAFERS CO., LTD. ,  ERK, Henry Frank

Inventor： ERK, Henry Frank ,  KWESKIN, Sasha ,  LIBBERT, Jeffrey L. ,  BULSARA, Mayank

IPC: H01L21/762

Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a multilayer dielectric layer.

公开(公告)号：WO2018136399A1

公开(公告)日：2018-07-26

申请号：PCT/US2018/013820

申请日：2018-01-16

Applicant: SUNEDISON SEMICONDUCTOR LIMITED

Inventor： KAYSER, Justin Scott ,  VALLEY, John Francis ,  EOFF, James Dean

IPC: H01L21/67 ,  B28D5/00 ,  B32B43/00 ,  H01L21/762

Abstract: Cleave systems for separating bonded wafer structures, mountable cleave monitoring systems and methods for separating bonded wafer structures are disclosed. In some embodiments, the sound emitted from a bonded wafer structure is sensed during cleaving and a metric related to an attribute of the cleave is generated. The generated metric may be used for quality control and/or to adjust a cleave control parameter to improve the quality of the cleave of subsequently cleaved bonded wafer structures.

公开(公告)号：WO2018106535A1

公开(公告)日：2018-06-14

申请号：PCT/US2017/064248

申请日：2017-12-01

Applicant: SUNEDISON SEMICONDUCTOR LIMITED

Inventor： LIBBERT, Jeffrey L. ,  LIU, Qingmin ,  WANG, Gang ,  JONES, Andrew M.

IPC: H01L21/762 ,  H01L29/51 ,  H01L29/66

Abstract: A multilayer structure is provided, the multilayer structure comprising a semiconductor on insulator structure comprises an insulating layer that enhances the stability of the underlying charge trapping layer.

公开(公告)号：WO2018080772A1

公开(公告)日：2018-05-03

申请号：PCT/US2017/055722

申请日：2017-10-09

Applicant: SUNEDISON SEMICONDUCTOR LIMITED

Inventor： WANG, Gang ,  LIBBERT, Jeffrey L. ,  THOMAS, Shawn George ,  LIU, Qingmin

IPC: H01L21/762 ,  H01L21/02

Abstract: A multilayer semiconductor on insulator structure is provided in which the handle substrate and an epitaxial layer in interfacial contact with the handle substrate comprise electrically active dopants of opposite type. The epitaxial layer is depleted by the handle substrate free carriers, thereby resulting in a high apparent resistivity, which improves the function of the structure in RF devices.

Abstract translation: 提供了绝缘体上多层半导体结构，其中处理衬底和与处理衬底界面接触的外延层包括相反类型的电活性掺杂剂。 外延层被处理衬底自由载流子耗尽，从而导致高的视电阻率，这改善了RF器件中结构的功能。

公开(公告)号：WO2018067335A1

公开(公告)日：2018-04-12

申请号：PCT/US2017/053208

申请日：2017-09-25

Applicant: CORNER STAR LIMITED

Inventor： REZVANIAN, Omid

IPC: B01J8/18 ,  B01J8/24 ,  B01J19/02

CPC classification number: B01J8/1872 ,  B01J8/24 ,  B01J19/02 ,  B01J2219/0204 ,  B01J2219/0218 ,  B01J2219/0227 ,  B01J2219/0236

Abstract: A fluidized bed reactor includes a reactor core and a stack of liner segments. The stack includes a first liner segment and a second liner segment. The first liner segment includes a first edge having a base surface and an angled surface. The base surface and the angled surface form an obtuse angle. The second liner segment includes a second edge. The first edge and the second edge form a shiplap joint to connect the first liner segment to the second liner segment.

Abstract translation: 流化床反应器包括反应堆芯和一叠衬管段。 该堆叠包括第一衬垫部分和第二衬垫部分。 第一衬垫部分包括具有基部表面和成角度表面的第一边缘。 基面和倾斜面形成钝角。 第二衬套段包括第二边缘。 第一个边缘和第二个边缘形成一个搭接接头，将第一个衬管段连接到第二个衬管段。

公开(公告)号：WO2018035009A1

公开(公告)日：2018-02-22

申请号：PCT/US2017/046696

申请日：2017-08-14

Applicant: MALLINCKRODT NUCLEAR MEDICINE LLC

Inventor： BARBOSA, Luis Antonio M.M.

IPC: A61B6/00 ,  C01B39/06 ,  C01B39/08 ,  C01B39/38 ,  C01G17/00 ,  C01G17/02 ,  G01T7/00 ,  H01L21/02 ,  G01D18/00 ,  B01J29/04

Abstract: Calibration devices including germanium-68 source material are disclosed. The source material may be a matrix material (e.g., zeolite) in which germanium-68 is isomorphously substituted for central atoms in tetrahedra within the matrix material. Methods for preparing such calibration devices are also disclosed.

Abstract translation: 公开了包括锗-68源材料的校准装置。 源材料可以是基质材料（例如沸石），其中锗-68同构地取代基质材料内的四面体中的中心原子。 还公开了用于制备这种校准装置的方法。

公开(公告)号：WO2017214084A1

公开(公告)日：2017-12-14

申请号：PCT/US2017/036061

申请日：2017-06-06

Applicant: SUNEDISON SEMICONDUCTOR LIMITED ,  BASAK, Soubir

Inventor： BASAK, Soubir ,  PEIDOUS, Igor ,  HUDSON, Carissima Marie ,  LEE, HyungMin ,  KIM, ByungChun ,  FALSTER, Robert J.

IPC: C30B29/06 ,  C30B15/30

Abstract: A method for preparing a single crystal silicon ingot and a wafer sliced therefrom are provided. The ingots and wafers comprise nitrogen at a concentration of at least about 1x1014 atoms/cm3 and/or germanium at a concentration of at least about 1x1019 atoms/cm3, interstitial oxygen at a concentration of less than about 6 ppma, and a resistivity of at least about 1000 ohm cm.

Abstract translation: 提供了用于制备单晶硅锭和从中切割的晶片的方法。 晶锭和晶片包含浓度至少约1×10 14原子/ cm 3的氮和/或浓度至少约1×10 19原子/ cm 3的锗，浓度低于约6ppma的间隙氧，电阻率为 至少约1000欧姆厘米。

公开(公告)号：WO2017181186A1

公开(公告)日：2017-10-19

申请号：PCT/US2017/027959

申请日：2017-04-17

Applicant: VORTEX BIOSCIENCES, INC.

Inventor： SOLLIER, Elodie ,  KOCHERSPERGER, Michael Lee ,  ENGLERT, Robert F. ,  CHE, James ,  HUANG, Kuo-Wei ,  BOYCE-JACINO, Michael ,  NEDDERSEN, Anastasia ,  PASSERNIG, Anna ,  RICHARDSON, Bruce ,  CHOI, Insang

IPC: G01N1/10 ,  G01N15/14

CPC classification number: B01L3/502761 ,  B01L3/502738 ,  B01L2200/027 ,  B01L2200/0668 ,  B01L2200/0689 ,  B01L2200/10 ,  B01L2300/0816 ,  B01L2300/0864 ,  B01L2300/0867 ,  B01L2300/087 ,  B01L2400/0403 ,  B01L2400/0487 ,  B01L2400/0633 ,  B01L2400/084 ,  G01N1/10 ,  G01N15/1484 ,  G01N35/1097 ,  G01N2015/1006

Abstract: Microfluidic chips and cartridges and systems that include such chips are disclosed. In some embodiments, the chips include a microfluidic channel disposed in a substrate with the channel comprising at least one expansion region. The channel is configured to generate a vortex within the at least one expansion region in response to fluid through the microfluidic channel to trap cells or particles. The substrate in which the channel is formed may be relatively rigid to resist deformation.

Abstract translation: 公开了包括这种芯片的微流体芯片和盒和系统。 在一些实施例中，芯片包括设置在衬底中的微流体通道，该通道包括至少一个扩展区域。 通道被配置成响应于通过微流体通道的流体而在至少一个扩展区域内产生涡流以捕获细胞或颗粒。 其中形成通道的衬底可以相对刚性以抵抗变形。

公开(公告)号：WO2017155806A1

公开(公告)日：2017-09-14

申请号：PCT/US2017/020623

申请日：2017-03-03

Applicant: SUNEDISON SEMICONDUCTOR LIMITED

Inventor： KWESKIN, Sasha Joseph

IPC: H01L21/762 ,  H01L21/02

Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a silicon oxynitride layer having a gradient oxygen concentration.

Abstract translation: 提供了一种用于制备绝缘体上半导体结构的方法，该绝缘体上半导体结构包括具有氧浓度梯度的氧氮化硅层。

公开(公告)号：WO2017142704A1

公开(公告)日：2017-08-24

申请号：PCT/US2017/015813

申请日：2017-01-31

Applicant: SUNEDISON SEMICONDUCTOR LIMITED ,  PEIDOUS, Igor

Inventor： PEIDOUS, Igor ,  JONES, Andrew M. ,  KOMMU, Srikanth ,  WANG, Gang ,  LIBBERT, Jeffrey L.

IPC: H01L21/762 ,  H01L21/28

CPC classification number: H01L21/76254

Abstract: A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and the front surface of the single crystal semiconductor handle substrate has a surface roughness of at least about 0.1 micrometers as measured according to the root mean square method over a surface area of at least 30 micrometers by 30 micrometers. The composite structure further comprises a charge trapping layer in contact with the front surface, the charge trapping layer comprising poly crystalline silicon, the poly crystalline silicon comprising grains having a plurality of crystal orientations; a dielectric layer in contact with the charge trapping layer; and a single crystal semiconductor device layer in contact with the dielectric layer.

Abstract translation: 提供了多层复合结构和制备多层复合结构的方法。 多层复合结构包括具有至少约500ohm-cm的最小体区电阻率的半导体处理衬底，并且单晶半导体处理衬底的前表面具有根据根部测量的至少约0.1微米的表面粗糙度 均方法在至少30微米×30微米的表面积上。 所述复合结构还包括与所述前表面接触的电荷俘获层，所述电荷俘获层包含多晶硅，所述多晶硅包含具有多个晶体取向的晶粒; 与电荷俘获层接触的介电层; 以及与介电层接触的单晶半导体器件层。