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    SILICON CARBIDE THYRISTOR
    11.
    发明申请
    SILICON CARBIDE THYRISTOR 审中-公开
    硅碳化硅

    公开(公告)号：WO1995005006A1

    公开(公告)日：1995-02-16

    申请号：PCT/US1994008990

    申请日：1994-08-05

    Applicant: CREE RESEARCH, INC. ,  EDMOND, John, A. ,  PALMOUR, John, W.

    Inventor： CREE RESEARCH, INC.

    IPC: H01L29/74

    CPC classification number: H01L29/1608 ,  H01L29/74

    Abstract: The SiC thyristor has a substrate (11), an anode (12), a drift region (13), a gate (14), and a cathode (15). The substrate (11), the anode (12), the drift region (13), the gate (14), and the cathode (15) are each preferably formed of silicon carbide. The substrate (11) is formed of silicon carbide having a first conductivity type and the anode (12) or the cathode (15), depending on the embodiment, is formed adjacent the substrate and has the same conductivity type as the substrate. A drift region (13) of silicon carbide is formed adjacent the anode or cathode and has a second conductivity type as the anode or cathode. A gate (14) is formed adjacent the drift region (13) or the cathode (15), also depending on the embodiment, and has the first conductivity type. An anode (12) or cathode (15), again depending on the embodiment, is formed adjacent the gate (14) or drift region (13) and has the second conductivity type.

    Abstract translation: SiC晶闸管具有衬底（11），阳极（12），漂移区（13），栅极（14）和阴极（15）。 基板（11），阳极（12），漂移区域（13），栅极（14）和阴极（15）各自优选由碳化硅形成。 基板（11）由具有第一导电类型的碳化硅形成，并且根据实施例的阳极（12）或阴极（15）形成在与基板相邻并且具有与基板相同的导电类型。 邻近阳极或阴极形成碳化硅的漂移区（13），并具有第二导电类型作为阳极或阴极。 也根据实施例，在漂移区域（13）或阴极（15）附近形成栅极（14），并且具有第一导电类型。 再次根据实施例的阳极（12）或阴极（15）在栅极（14）或漂移区（13）附近形成并且具有第二导电类型。

    SINGLE STEP PENDEO- AND LATERAL EPITAXIAL OVERGROWTH OF GROUP III-NITRIDE LAYERS
    15.
    发明申请
    SINGLE STEP PENDEO- AND LATERAL EPITAXIAL OVERGROWTH OF GROUP III-NITRIDE LAYERS 审中-公开
    第III组氮化物层的单步和侧向外延生长

    公开(公告)号：WO0127980A9

    公开(公告)日：2002-09-26

    申请号：PCT/US0028056

    申请日：2000-10-11

    Applicant: CREE INC ,  KONG HUA-SHUANG ,  EDMOND JOHN ADAM ,  HABERERN KEVIN WARD ,  EMERSON DAVID TODD

    Inventor： KONG HUA-SHUANG ,  EDMOND JOHN ADAM ,  HABERERN KEVIN WARD ,  EMERSON DAVID TODD

    IPC: H01L21/20 ,  H01L21/205 ,  H01S5/02

    CPC classification number: H01L21/0265 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/02647 ,  H01S5/32341 ,  H01S2304/12

    Abstract: A method of fabricating a gallium nitride-based semiconductor structure on a substrate includes the steps of forming a mask (14) having at least one opening (6) therein directly on the substrate (18), growing a buffer layer (12) through the opening, and growing a layer of gallium nitride (20) upwardly from the buffer layer and laterally across the mask. During growth of the gallium nitride from the mask, the vertical and horizontal growth rates of the gallium nitride layer are maintained at rates sufficient to prevent polycrystalline material (30) nucleating on said mask from interrupting the lateral growth of the gallium nitride layer. In an alternative embodiment, the method includes forming at least one raised portion (15) defining adjacent trenches (18) in the substrate and forming a mask (14) on the substrate (10), the mask having at least one opening (16) over the upper surface of the raised portion. A buffer layer (12) may be grown from the upper surface of the raised portion. The gallium nitride layer (26) is then grown laterally by pendeoepitaxy over the trenches.

    Abstract translation: 在衬底上制造氮化镓基半导体结构的方法包括以下步骤：在衬底（18）上直接形成具有至少一个开口（6）的掩模（14），通过该衬底生长缓冲层（12） 打开并从缓冲层向上生长一层氮化镓（20）并横向穿过掩模。 在从掩模生长氮化镓期间，氮化镓层的垂直和水平生长速率保持在足以防止在所述掩模上成核的多晶材料（30）中断氮化镓层的横向生长的速率。 在替代实施例中，该方法包括形成在衬底中限定相邻沟槽（18）的至少一个凸起部分（15），并在衬底（10）上形成掩模（14），所述掩模具有至少一个开口（16） 在凸起部分的上表面上。 缓冲层（12）可以从凸起部分的上表面生长。 然后通过在沟槽上的外延生长横向生长氮化镓层（26）。

    GROUP III NITRIDE LED WITH UNDOPED CLADDING LAYER
    16.
    发明申请
    GROUP III NITRIDE LED WITH UNDOPED CLADDING LAYER 审中-公开
    第III组氮化物LED，带有遮光层

    公开(公告)号：WO2002063699A2

    公开(公告)日：2002-08-15

    申请号：PCT/US2002/000716

    申请日：2002-01-12

    Applicant: CREE, INC. ,  EDMOND, John, Adam ,  DOVERSPIKE, Kathleen, Marie ,  KONG, Hua-shuang ,  BERGMANN, Michael, John

    Inventor： EDMOND, John, Adam ,  DOVERSPIKE, Kathleen, Marie ,  KONG, Hua-shuang ,  BERGMANN, Michael, John

    IPC: H01L33/00

    CPC classification number: H01L33/32 ,  B82Y20/00 ,  H01L33/06 ,  H01S5/32341

    Abstract: The present invention is a semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum. The semiconductor structure includes a Group III nitride active layer (13) positioned between a first n-type Group III nitride cladding layer (11) and a second n-type Group III nitride cladding layer (12), the respective bandgaps of the first and second n-type cladding layers being greater than the bandgap of the active layer. The semiconductor structure further includes a p-type Group III nitride layer (18), which is positioned in the semiconductor structure such that the second n-type cladding layer (12) is between the p-type layer (18) and the active layer (13).

    Abstract translation: 本发明是一种能够在电磁光谱的红色至紫外部分发射的发光器件的半导体结构。 半导体结构包括位于第一n型III族氮化物覆层（11）和第二n型III族氮化物覆层（12）之间的第III族氮化物有源层（13），第一和第 第二n型包覆层大于有源层的带隙。 半导体结构还包括位于半导体结构中的p型III族氮化物层（18），使得第二n型覆层（12）位于p型层（18）和有源层 （13）。

    SYSTEM AND METHOD FOR ACCELERATED DEGRADATION TESTING OF SEMICONDUCTOR DEVICES
    18.
    发明申请
    SYSTEM AND METHOD FOR ACCELERATED DEGRADATION TESTING OF SEMICONDUCTOR DEVICES 审中-公开
    用于半导体器件加速降解测试的系统和方法

    公开(公告)号：WO1994009378A1

    公开(公告)日：1994-04-28

    申请号：PCT/US1993009181

    申请日：1993-09-27

    Applicant: CREE RESEARCH, INC. ,  EDMOND, John, A. ,  ASBURY, Douglas, A. ,  CARTER, Calvin, H., Jr. ,  WALTZ, Douglas, G.

    Inventor： CREE RESEARCH, INC.

    IPC: G01R31/26

    CPC classification number: G01R31/2642 ,  G01R31/2635

    Abstract: A method of testing a semiconductor device, having the steps of pulsing the semiconductor device with a predetermined level of current for a duration of time so as to cause inadequate parts to degrade and to cause adequate parts to stabilize, and measuring predetermined electrical or optical performance characteristics for the semiconductor device after the current pulse. A system for testing a semiconductor device on a wafer is also provided having a contact probe for applying current pulses to the semiconductor device on the wafer, measuring means electrically connected to the probe for measuring predetermined electrical or optical performance characteristics of the semiconductor device on the wafer, and optical detection means electrically connected to the measuring means for detecting radiation emitted from the semiconductor device on the wafer.

    Abstract translation: 一种测试半导体器件的方法，该方法具有如下步骤：使半导体器件以预定电流电流脉冲持续一段时间，从而导致不充分的部件劣化并导致足够的部件稳定，以及测量预定的电或光学性能 电流脉冲后半导体器件的特性。 还提供了一种用于在晶片上测试半导体器件的系统，其具有用于向晶片上的半导体器件施加电流脉冲的接触探针，电连接到探针的测量装置，用于测量半导体器件上的预定的电或光学性能特性 晶片和光学检测装置，电连接到测量装置，用于检测从晶片上的半导体器件发射的辐射。

    LIGHT EMITTING DEVICES, SYSTEMS, AND METHODS
    19.
    发明申请
    LIGHT EMITTING DEVICES, SYSTEMS, AND METHODS 审中-公开
    发光装置，系统和方法

    公开(公告)号：WO2013032737A3

    公开(公告)日：2013-05-10

    申请号：PCT/US2012051344

    申请日：2012-08-17

    Applicant: CREE INC ,  EDMOND JOHN A ,  KONG HUA-SHUANG ,  DONOFRIO MATTHEW

    Inventor： EDMOND JOHN A ,  KONG HUA-SHUANG ,  DONOFRIO MATTHEW

    IPC: F21S2/00 ,  F21Y101/02

    CPC classification number: H01L25/0753 ,  H01L25/167 ,  H01L33/52 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/00014

    Abstract: Light emitting devices, systems, and methods are disclosed. In one embodiment a light emitting device can include an emission area having one or more light emitting diodes (LEDs) mounted over an irregularly shaped mounting area. The light emitting device can further include a retention material disposed about the emission area. The retention material can also be irregularly shaped, and can be dispensed. Light emitting device can include more than one emission area per device.

    Abstract translation: 公开了发光器件，系统和方法。 在一个实施例中，发光装置可以包括具有安装在不规则形状的安装区域上的一个或多个发光二极管（LED）的发射区域。 发光器件可以进一步包括围绕发射区域设置的保持材料。 保持材料也可以是不规则形状的，并且可以被分配。 发光装置可以包括每个装置多于一个的发射区域。

    LIGHT EMITTING DEVICES, SYSTEMS, AND METHODS
    20.
    发明申请
    LIGHT EMITTING DEVICES, SYSTEMS, AND METHODS 审中-公开
    发光装置，系统和方法

    公开(公告)号：WO2013032737A2

    公开(公告)日：2013-03-07

    申请号：PCT/US2012/051344

    申请日：2012-08-17

    Applicant: CREE, INC. ,  EDMOND, John, A. ,  KONG, Hua-Shuang ,  DONOFRIO, Matthew

    Inventor： EDMOND, John, A. ,  KONG, Hua-Shuang ,  DONOFRIO, Matthew

    IPC: F21S2/00 ,  F21Y101/02

    CPC classification number: H01L25/0753 ,  H01L25/167 ,  H01L33/52 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/00014

    Abstract: Light emitting devices, systems, and methods are disclosed. In one embodiment a light emitting device can include an emission area having one or more light emitting diodes (LEDs) mounted over an irregularly shaped mounting area. The light emitting device can further include a retention material disposed about the emission area. The retention material can also be irregularly shaped, and can be dispensed. Light emitting device can include more than one emission area per device.

    Abstract translation: 公开了发光器件，系统和方法。 在一个实施例中，发光器件可以包括具有安装在不规则形状的安装区域上的一个或多个发光二极管（LED）的发射区域。 发光装置还可以包括围绕发射区域设置的保持材料。 保持材料也可以是不规则形状，并且可以分配。 发光器件可以包括每个器件多于一个发射区域。

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