公开(公告)号：WO0167071B1

公开(公告)日：2002-04-18

申请号：PCT/US0107475

申请日：2001-03-07

Applicant: BOXER CROSS INC

Inventor： BORDEN PETER G ,  LI JIPING

IPC: G01N21/956 ,  G01R31/311 ,  H01L21/66 ,  G01B11/06

CPC classification number: G01R31/311 ,  G01N21/95607 ,  G01N21/95684 ,  H01L22/12

Abstract: A structure (10) having a number of traces (11A-11N) passing through a region (11) is evaluated by using a beam (12) of electromagnetic radiation to illuminate the region, and generating an electrical signal that indicates an attribute of a portion (also called "reflected portion") of the beam reflected from the region. The just-described acts of "illuminating" and "generating" are repeated in another region, followed by a comparison of the generated signals to identify variation of a property between the two regions. Such measurements can identify variations in material properties (or dimensions) between different regions in a single semiconductor wafer of the type used in fabrication of integrated circuit dice, or even between multiple such wafers. In one embodiment, the traces are each substantially parallel to and adjacent to the other, and the beam has wavelength greater than or equal to a pitch between at least two of the traces. In one implementation the beam is polarized, and can be used in several ways, including, e.g., orienting the beam so that the beam is polarized in a direction parallel to, perpendicular to, or at 45 DEG to the traces. Energy polarized parallel to the traces is reflected by the traces, whereas energy polarized perpendicular to the traces passes between the traces and is reflected from underneath the traces. Measurements of the reflected light provide an indication of changes in properties of a wafer during a fabrication process.

Abstract translation: 具有穿过区域（11）的多条迹线（11A-11N）的结构（10）通过使用电磁辐射束（12）来照射该区域，并且生成电信号，该电信号指示 从区域反射的光束的部分（也称为“反射部分”）。 刚刚描述的“照亮”和“产生”行为在另一个区域中重复，随后比较产生的信号以识别两个区域之间的特性的变化。 这样的测量可以识别在集成电路裸片的制造中使用的类型的单个半导体晶片中的不同区域之间或者甚至在多个这样的晶片之间的材料特性（或尺寸）的变化。 在一个实施例中，迹线各自基本平行于彼此并且与另一个相邻，并且波束具有大于或等于迹线中的至少两个迹线之间的间距的波长。 在一个实施例中，光束是偏振的，并且可以以几种方式使用，包括例如定向光束，使得光束在与迹线平行，垂直或45°的方向上被极化。 与轨迹平行偏振的能量由轨迹反射，而垂直于轨迹偏振的能量在轨迹之间穿过并从轨迹下面反射。 反射光的测量提供了制造过程期间晶片特性变化的指示。

公开(公告)号：WO2003075322A3

公开(公告)日：2003-09-12

申请号：PCT/US2003/006250

申请日：2003-02-28

Applicant: BOXER CROSS, INC.

Inventor： BORDEN, Peter, G. ,  LI, Jiping

IPC: G01N17/00

Abstract: Heat is applied to a conductive structure (200) by a laser beam (251), another laser beam (250), and the temperature at or near the point of heat application is measured. The measured temperature indicates the integrity or the defectiveness of various features in the conductive structure, near the point of heat application.

公开(公告)号：WO2003075321A3

公开(公告)日：2003-09-12

申请号：PCT/US2003/006239

申请日：2003-02-28

Applicant: BOXER CROSS, INC.

Inventor： BORDEN, Peter, G. ,  LI, Jiping

IPC: G01N21/55

Abstract: An apparatus measures a property of an optically absorbing layer (416) by using a lens (415) to focus a heating beam (403) for a laser (401) on a region of the layer (416), modulating the power from a laser driver circuit (421) to the laser to modulate the heating beam (403) at a predetermined frequency that is selected to be sufficiently low to ensure that at any time the temperature of the layer is approximately equal to a temperature of the layer when heated by an unmodulated beam, and using a detector (420) to measure the power of another beam from another laser (405) that is reflected from the heated region. The measurement can be used to adjust a process parameter that controls a fabrication process.

公开(公告)号：WO2004027439A1

公开(公告)日：2004-04-01

申请号：PCT/US2003/029731

申请日：2003-09-22

Applicant: BOXER CROSS INC. ,  ADVANCED MICRO DEVICES, INC.

Inventor： BORDEN, Peter G. ,  KLUTH, Jonathan G. ,  PATON, Eric

IPC: G01R31/311

CPC classification number: H01L22/34 ,  G01N21/21 ,  G01N21/9501 ,  G01N21/95607 ,  G01N2021/8416 ,  G01N2201/0691 ,  G01R31/311 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: Any semiconductor wafer fabrication process may be changed to monitor lateral abruptness of doped layers as an additional step in the wafer fabrication process. In one embodiment, a test structure including one or more doped regions is formed in a production wafer (e.g. simultaneously with one or more transistors) and one or more dimension(s) of the test structure are measured, and used as an estimate of lateral abruptness in other doped regions in the wafer, e.g. in the simultaneously formed transistors. Doped regions in test structures can be located at regularly spaced intervals relative to one another, or alternatively may be located with varying spacings between adjacent doped regions. Alternatively or in addition, multiple test structures may be formed in a single wafer, with doped regions at regular spatial intervals in each test structure, while different test structures have different spatial intervals.

Abstract translation: 作为晶片制造工艺中的附加步骤，可以改变任何半导体晶片制造工艺以监测掺杂层的横向突然性。 在一个实施例中，在生产晶片（例如与一个或多个晶体管同时）形成包括一个或多个掺杂区域的测试结构，并测量测试结构的一个或多个维度，并用作横向的估计 晶片中其他掺杂区域的突变，例如 在同时形成的晶体管中。 测试结构中的掺杂区域可以相对于彼此以规则间隔的间隔定位，或者替代地可以在相邻掺杂区域之间具有变化的间隔。 或者或另外，可以在单个晶片中形成多个测试结构，其中在每个测试结构中以规则的空间间隔具有掺杂区域，而不同的测试结构具有不同的空间间隔。

公开(公告)号：WO2003075321A2

公开(公告)日：2003-09-12

申请号：PCT/US2003/006239

申请日：2003-02-28

Applicant: BOXER CROSS, INC.

Inventor： BORDEN, Peter, G. ,  LI, Jiping

IPC: H01L

CPC classification number: G01N27/041 ,  G01N21/1717

Abstract: An apparatus measures a property of a layer (such as the sheet resistance of a conductive layer) by performing the following method: (1) focusing the heating beam on the heated a region (also called "heated region") of the conductive layer (2) modulating the power of the heating beam at a predetermined frequency that is selected to be sufficiently low to ensure that at any time the temperature of the optically absorbing layer is approximately equal to (e.g., within 90 % of) a temperature of the optically absorbing layer when heated by an unmodulated beam, and (3) measuring the power of another beam that is (a) reflected by the heated region, and (b) modulated in phase with modulation of the heating beam. The measurement in act (3) can be used directly as a measure of the resistance (per unit area) of a conductive pad formed by patterning the conductive layer. Acts (1)-(3) can be repeated during fabrication of a semiconductor wafer, at each of a number or regions on a conductive layer, and any change in measurement indicates a corresponding change in resistance of the layer. When the measurement changes by more than a predetermined amount (e.g., by 10 %), a process parameter that controls the fabrication process is changed to return the measurement to normal in the next wafer.

Abstract translation: 一种装置通过以下方法测量层的性质（例如导电层的薄层电阻）：（1）将加热束聚焦在加热的导电层的加热区域（也称为“加热区域”）上 2）以预定的频率调制加热束的功率，该预定频率被选择为足够低以确保在任何时候光学吸收层的温度近似等于（例如，90％以内）光学的温度 并且（3）测量由（a）被加热区域反射的另一个光束的功率，和（b）通过加热光束的调制相位调制。 作用（3）中的测量可以直接用作通过图案化导电层形成的导电焊盘的电阻（每单位面积）的量度。 在制造半导体晶片期间，在导电层上的数个或多个区域中的每一个可以重复使用（1） - （3），并且测量的任何变化表示层的电阻的相应变化。 当测量改变超过预定量（例如，10％）时，改变控制制造过程的处理参数，以使测量在下一个晶片中恢复正常。

公开(公告)号：WO2003074974A3

公开(公告)日：2003-09-12

申请号：PCT/US2003/006379

申请日：2003-02-28

Applicant: BOXER CROSS, INC.

Inventor： BORDEN, Peter, G. ,  LI, Jiping

IPC: G01N21/88

Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. Depending on the embodiment, any properties of the two layers that depend on the dimensions of the features in the wafer may be measured in acts (122) and (123) by any method well known in the art. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.

公开(公告)号：WO0167071A3

公开(公告)日：2002-03-14

申请号：PCT/US0107475

申请日：2001-03-07

Applicant: BOXER CROSS INC

Inventor： BORDEN PETER G ,  LI JIPING

IPC: G01N21/956 ,  G01R31/311 ,  H01L21/66 ,  G01B11/06

CPC classification number: G01R31/311 ,  G01N21/95607 ,  G01N21/95684 ,  H01L22/12

Abstract: A structure (10) having a number of traces (11A-11N) passing through a region (11) is evaluated by using a beam (12) of electromagnetic radiation to illuminate the region, and generating an electrical signal that indicates an attribute of a portion (also called "reflected portion") of the beam reflected from the region. The just-described acts of "illuminating" and "generating" are repeated in another region, followed by a comparison of the generated signals to identify variation of a property between the two regions. Such measurements can identify variations in material properties (or dimensions) between different regions in a single semiconductor wafer of the type used in fabrication of integrated circuit dice, or even between multiple such wafers. In one embodiment, the traces are each substantially parallel to and adjacent to the other, and the beam has wavelength greater than or equal to a pitch between at least two of the traces. In one implementation the beam is polarized, and can be used in several ways, including, e.g., orienting the beam so that the beam is polarized in a direction parallel to, perpendicular to, or at 45 DEG to the traces. Energy polarized parallel to the traces is reflected by the traces, whereas energy polarized perpendicular to the traces passes between the traces and is reflected from underneath the traces. Measurements of the reflected light provide an indication of changes in properties of a wafer during a fabrication process.

Abstract translation: 通过使用电磁辐射束（12）照射该区域来评估具有穿过区域（11）的多个迹线（11A-11N）的结构（10），并产生指示一个 从该区域反射的光束的部分（也称为“反射部分”）。 在另一区域重复刚才描述的“照明”和“产生”的动作，随后比较生成的信号以识别两个区域之间的属性的变化。 这样的测量可以识别在用于制造集成电路晶片的类型的单个半导体晶片中的不同区域之间的材料特性（或尺寸），或者甚至在多个这样的晶片之间的变化。 在一个实施例中，迹线各自基本上平行于并且彼此相邻，并且光束具有大于或等于至少两个迹线之间的间距的波长。 在一个实施方案中，光束是极化的，并且可以以多种方式使用，包括例如使光束定向，使得光束在平行于，垂直于或垂直于45°的方向上被极化。 平行于迹线的能量被迹线反射，而垂直于迹线偏振的能量在迹线之间通过，并从迹线下方反射。 反射光的测量提供了在制造过程中晶片的性质变化的指示。

公开(公告)号：WO2004027855A1

公开(公告)日：2004-04-01

申请号：PCT/US2003/029993

申请日：2003-09-22

Applicant: BOXER CROSS INC.

Inventor： BORDEN, Peter, G.

IPC: H01L21/66

CPC classification number: H01L22/20 ,  G01N21/1717 ,  G01N21/55 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Any semiconductor wafer fabrication process may be changed to monitor lateral abruptness of doped layers as an additional step in the wafer fabricating process. In one embodiment, a test structure including one or more doped regions is formed in a production wafer (e.g. simultaneously with one or more transistors) and one or more dimension(s) of the test structure are measured, and used as an estimate of lateral abruptness in other doped regions in the wafer, e.g. in the simultaneously formed transistors. Doped regions in test structures can be located at regularly spaced intervals relative to one another, or alternatively may be located with varying spacings between adjacent doped regions. Alternatively or in addition, multiple test structures may be formed in a single wafer, with doped regions at regular spatial intervals in each test structure, while different test structures have different spatial intervals.

Abstract translation: 作为晶片制造过程中的附加步骤，可以改变任何半导体晶片制造工艺以监测掺杂层的横向突然性。 在一个实施例中，在生产晶片（例如与一个或多个晶体管同时）形成包括一个或多个掺杂区域的测试结构，并测量测试结构的一个或多个维度，并将其用作横向 晶片中其他掺杂区域的突变，例如 在同时形成的晶体管中。 测试结构中的掺杂区域可以相对于彼此以规则间隔的间隔定位，或者替代地可以在相邻掺杂区域之间具有变化的间隔。 或者或另外，可以在单个晶片中形成多个测试结构，在每个测试结构中以规则的空间间隔具有掺杂区域，而不同的测试结构具有不同的空间间隔。

公开(公告)号：WO2003075322A2

公开(公告)日：2003-09-12

申请号：PCT/US2003/006250

申请日：2003-02-28

Applicant: BOXER CROSS, INC.

Inventor： BORDEN, Peter, G. ,  LI, Jiping

IPC: H01L

CPC classification number: H01L22/34 ,  G01N25/72 ,  H01L2924/3011

Abstract: Heat is applied to a conductive structure that includes one or more vias, and the temperature at or near the point of heat application is measured. The measured temperature indicates the integrity or the defectiveness of various features (e.g. vias and/or traces) in the conductive structure, near the point of heat application. Specifically, a higher temperature measurement (as compared to a measurement in a reference structure) indicates a reduced heat transfer from the point of heat application, and therefore indicates a defect. The reference structure can be in the same die as the conductive structure (e.g. to provide a baseline) or outside the die but in the same wafer (e.g. in a test structure) or outside the wafer (e.g. in a reference wafer), depending on the embodiment.

Abstract translation: 将热施加到包括一个或多个通孔的导电结构，并且测量在加热点处或附近的温度。 测量的温度表示导热结构中靠近加热点的各种特征（例如通路和/或迹线）的完整性或缺陷。 具体而言，较高的温度测量（与参考结构中的测量值相比）表示从加热点减少的热传递，因此表示缺陷。 参考结构可以与导电结构（例如，提供基线）或模具外部在相同的晶片（例如，在测试结构中）或晶片外部（例如，在参考晶片中）处于相同的裸片中，这取决于 该实施例。

公开(公告)号：WO03074974A2

公开(公告)日：2003-09-12

申请号：PCT/US0306379

申请日：2003-02-28

Applicant: BOXER CROSS INC

Inventor： BORDEN PETER G ,  LI JIPING

IPC: G01N21/00 ,  G01D20060101 ,  G01N21/17 ,  G01N21/21 ,  G01N21/84 ,  G01N21/88 ,  G01N21/95 ,  G01R31/26 ,  G01R31/265 ,  H01L21/265 ,  H01L21/4763 ,  H01L21/66 ,  G01D

CPC classification number: G01N21/1717 ,  G01N21/171 ,  G01N21/21 ,  G01N21/211 ,  G01N21/8422 ,  G01N21/9501 ,  G01N21/9505 ,  G01N21/95607 ,  G01N21/95692 ,  G01N2021/1748 ,  G01N2021/216 ,  G01R31/2648 ,  G01R31/2656 ,  H01L22/12

Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. Depending on the embodiment, any properties of the two layers that depend on the dimensions of the features in the wafer may be measured in acts (122) and (123) by any method well known in the art. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.

Abstract translation: 一种方法和装置测量两层镶嵌结构（例如在制造期间的硅晶片）的性质，并且使用两个测量来将位置识别为具有空隙。 这两个测量可以以任何方式使用，例如， 相比之下，当两个测量彼此偏离时，视为存在空白。 取决于实施例，可以通过本领域公知的任何方法在动作（122）和（123）中测量取决于晶片中的特征的尺寸的两层的任何性质。 响应于空隙的检测，可以改变在镶嵌结构的制造中使用的工艺参数，以减少或消除要形成的结构中的空隙。