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    SEMICONDUCTOR WAFER PRE-PROCESS ANNEALING & GETTERING METHOD AND SYSTEM FOR SOLAR CELL FORMATION
    2.
    发明申请
    SEMICONDUCTOR WAFER PRE-PROCESS ANNEALING & GETTERING METHOD AND SYSTEM FOR SOLAR CELL FORMATION 审中-公开
    半导体波形预处理退火和获取太阳能电池形成的方法和系统

    公开(公告)号：WO2008082660A1

    公开(公告)日：2008-07-10

    申请号：PCT/US2007/026498

    申请日：2007-12-31

    Applicant: CALISOLAR INC. ,  KIRSCHT, Fritz ,  OUNADJELA, Kamel ,  RAKOTONIANA, Jean Patrice ,  LINKE, Dieter

    Inventor： KIRSCHT, Fritz ,  OUNADJELA, Kamel ,  RAKOTONIANA, Jean Patrice ,  LINKE, Dieter

    IPC: H01L21/00

    CPC classification number: H01L31/18 ,  H01L21/304 ,  H01L21/3221 ,  H01L31/186 ,  Y02E10/50 ,  Y02P70/521 ,  Y10T83/04 ,  Y10T83/0453

    Abstract: Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered. Multicrystalline semiconductor wafers having grain boundaries with impurities may also undergo the annealing and gettering of dispersed defects to the grain boundaries, further increasing the semiconductor substrate purity levels.

    Abstract translation: 这里公开了用于退火和吸收太阳能电池半导体晶片的太阳能电池预处理方法和系统的技术，所述太阳能电池半导体晶片具有不希望的高过渡金属，杂质和其它缺陷的分散。 该工艺在太阳能电池半导体（例如硅）晶片上形成表面污染物层。 半导体晶片的表面与表面污染物层一样接收和保持杂质。 较低质量的半导体晶片包括在退火工艺中从半导体体积吸收而形成杂质簇朝向表面污染物层的分散缺陷。 杂质簇形成在表面污染物层内，同时增加晶片区域中的纯度水平，分散的缺陷从该区域中得到。 通过冷却进行退火以保留杂质簇，从而在杂质吸收的区域保持半导体晶片的增加的纯度水平。 具有杂质晶界的多晶半导体晶片也可以经历退火和吸收分散的缺陷到晶界，进一步提高半导体衬底的纯度水平。

    LARGE GRAIN, MULTI-CRYSTALLINE SEMICONDUCTOR INGOT FORMATION METHOD AND SYSTEM
    6.
    发明申请
    LARGE GRAIN, MULTI-CRYSTALLINE SEMICONDUCTOR INGOT FORMATION METHOD AND SYSTEM 审中-公开
    大颗粒，多晶半导体成像方法与系统

    公开(公告)号：WO2008131075A2

    公开(公告)日：2008-10-30

    申请号：PCT/US2008060589

    申请日：2008-04-17

    Applicant: CALISOLAR INC ,  LINKE DIETER ,  HEUER MATTHIAS ,  KIRSCHT FRITZ ,  RAKOTONIANA JEAN PATRICE ,  OUNADJELA KAMEL

    Inventor： LINKE DIETER ,  HEUER MATTHIAS ,  KIRSCHT FRITZ ,  RAKOTONIANA JEAN PATRICE ,  OUNADJELA KAMEL

    IPC: C30B15/20

    CPC classification number: C30B11/002 ,  C01B33/037 ,  C30B11/003 ,  C30B28/06 ,  C30B29/06 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521 ,  Y10T117/1008

    Abstract: Techniques for the formation of a large grain, multi-crystalline semiconductor ingot and include forming a silicon melt in a crucible, the crucible capable of locally controlling thermal gradients within the silicon melt. The local control of thermal gradients preferentially forms silicon crystals in predetermined regions within the silicon melt by locally reducing temperatures is the predetermined regions. The method and system control the rate at which the silicon crystals form using local control of thermal gradients for inducing the silicon crystals to obtain preferentially maximal sizes and, thereby, reducing the number of grains for a given volume. The process continues the thermal gradient control and the rate control step to form a multi crystalline silicon ingot having reduced numbers of grains for a given volume of the silicon ingot.

    Abstract translation: 用于形成大晶粒，多晶半导体锭的技术包括在坩埚中形成硅熔体，该坩埚能够局部地控制硅熔体内的热梯度。 热梯度的局部控制优先在硅熔体内的预定区域中形成硅晶体，局部降低温度是预定区域。 该方法和系统通过局部控制热梯度来控制硅晶体的形成速度，以便诱导硅晶体优先获得最大尺寸，从而减少给定体积的晶粒数。 该过程继续进行热梯度控制和速率控制步骤以形成对于给定体积的硅锭具有减少的晶粒数量的多晶硅锭。

    METHOD AND SYSTEM FOR FORMING A HIGHER PURITY SEMICONDUCTOR INGOT USING LOW PURITY SEMICONDUCTOR FEEDSTOCK
    7.
    发明申请
    METHOD AND SYSTEM FOR FORMING A HIGHER PURITY SEMICONDUCTOR INGOT USING LOW PURITY SEMICONDUCTOR FEEDSTOCK 审中-公开
    使用低纯度半导体馈电来形成高纯度半导体器件的方法和系统

    公开(公告)号：WO2008095111A2

    公开(公告)日：2008-08-07

    申请号：PCT/US2008/052676

    申请日：2008-01-31

    Applicant: CALISOLAR, INC. ,  HEUER, Matthias ,  KIRSCHT, Fritz ,  LINKE, Dieter ,  RAKOTONIANA, Jean, Patrice ,  OUNADJELA, Kamel

    Inventor： HEUER, Matthias ,  KIRSCHT, Fritz ,  LINKE, Dieter ,  RAKOTONIANA, Jean, Patrice ,  OUNADJELA, Kamel

    CPC classification number: C30B29/06 ,  C30B11/04 ,  C30B11/14 ,  Y10T117/1092

    Abstract: Techniques for the formation of a higher purity semiconductor ingot using a low purity semiconductor feedstock include associating within a crucible a low-grade silicon feedstock, which crucible forms a process environment of said molten silicon. The process associates with the low-grade silicon feedstock, a quantity of the at least one metal and includes forming within the crucible a molten solution (e.g., a binary or ternary solution) of molten silicon and the metal at a temperature below the melting temperature of said low-grade silicon feedstock. A silicon seed crystal associates with the molten solution within the crucible for inducing directional silicon crystallization. The process further forms a silicon ingot from a portion of the molten solution in association with the silicon seed. The silicon ingot includes at least one silicon crystalline formation grown in the induced directional silicon crystallization process. The resulting silicon ingot has a silicon purity substantially exceeding the silicon purity of said low grade silicon feedstock.

    Abstract translation: 使用低纯度半导体原料形成较高纯度半导体锭的技术包括在坩埚内缔合低级硅原料，该坩埚形成所述熔融硅的工艺环境。 该方法与低级硅原料相关联，一定量的至少一种金属，并且包括在坩埚内形成熔融硅和金属在低于熔融温度的温度下的熔融溶液（例如二元或三元溶液） 的低级硅原料。 硅晶体与坩埚内的熔融溶液缔合，用于诱导定向硅结晶。 该方法进一步从与硅晶种相关联的熔融溶液的一部分形成硅锭。 硅锭包括在诱导的定向硅结晶过程中生长的至少一个硅晶形。 所得硅锭的硅纯度基本上超过所述低等级硅原料的硅纯度。

    METHOD AND SYSTEM FOR CONTROLLING RESISTIVITY IN INGOTS MADE OF COMPENSATED FEEDSTOCK SILICON
    10.
    发明申请
    METHOD AND SYSTEM FOR CONTROLLING RESISTIVITY IN INGOTS MADE OF COMPENSATED FEEDSTOCK SILICON 审中-公开
    用于控制补偿馈电硅的功率的方法和系统

    公开(公告)号：WO2009003183A1

    公开(公告)日：2008-12-31

    申请号：PCT/US2008/068644

    申请日：2008-06-27

    Applicant: CALISOLAR, INC. ,  KIRSCHT, Fritz ,  ABROSIMOVA, Vera ,  HEUER, Matthias ,  LINKE, Dieter ,  RAKOTONIANA, Jean, Patrice ,  OUNADJELA, Kamel

    Inventor： KIRSCHT, Fritz ,  ABROSIMOVA, Vera ,  HEUER, Matthias ,  LINKE, Dieter ,  RAKOTONIANA, Jean, Patrice ,  OUNADJELA, Kamel

    IPC: C01B33/26

    CPC classification number: C30B29/06 ,  C30B11/006 ,  Y10T117/1024

    Abstract: Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides a predominantly p-type semiconductor for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of aluminum or/and gallium. The process further melts the silicon feedstock together with a predetermined amount of aluminum or/and gallium to form a molten silicon solution from which to perform directional solidification and, by virtue of adding aluminum or/and gallium, maintains the homogeneity the resistivity of the silicon ingot throughout the silicon ingot. In the case of feedstock silicon leading to low resistivity in respective ingots, typically below 0.4 Ωcm, a balanced amount of phosphorus can be optionally added to aluminum or/and gallium. Adding phosphorus becomes mandatory at very low resistivity, typically close to 0.2 Ωcm and slightly below.

    Abstract translation: 用于控制从补偿的原料硅材料形成硅锭中的电阻率的技术准备补偿的升级冶金硅原料以便熔化以形成硅熔体。 补偿的，升级的冶金硅原料提供主要为p型半导体，其中该方法评估硼和磷的浓度并加入预定量的铝或/和镓。 该方法进一步将硅原料与预定量的铝或/和镓一起熔化以形成熔融硅溶液，从而进行定向凝固，并且通过加入铝或/和镓，保持硅的电阻率的均匀性 锭遍及整个硅锭。 在原料硅的情况下，导致相应晶锭中的低电阻率，通常低于0.4Ocm，可以任选地将平衡量的磷加入到铝或/和镓中。 在非常低的电阻率下，添加磷是强制性的，通常接近0.2Ocm且略低于磷。

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