公开(公告)号：WO2021252188A1

公开(公告)日：2021-12-16

申请号：PCT/US2021/034194

申请日：2021-05-26

Applicant: MICRON TECHNOLOGY, INC.

Inventor： FAY, Owen R. ,  RICHARDS, Randon K. ,  LIMAYE, Aparna U. ,  LIM, Dong Soon ,  YOO, Chan H. ,  STREET, Bret K. ,  NAKANO, Eiichi ,  LUO, Shijian

IPC: H01L25/10 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L23/552 ,  H01L23/66 ,  H01L23/34 ,  H01L25/18 ,  H01L25/16 ,  H01L2223/6677 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/1047 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/5384 ,  H01L24/10 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50

Abstract: Disclosed are microelectronic device assemblies comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device having bond pads operably coupled to conductive traces in contact with the microelectronic devices and extending over a dielectric material to conductive via locations beyond at least one side of the stack for routing power and ground/bias extending through the dielectric materials to contact exposed conductors of the substrate. Data signals are routed between and through microelectronic devices of the stack by structure for data signal communication. Methods of fabrication and related electronic systems are also disclosed.

公开(公告)号：WO2019045886A1

公开(公告)日：2019-03-07

申请号：PCT/US2018/041746

申请日：2018-07-12

Applicant: MICRON TECHNOLOGY, INC.

Inventor： ZHOU, Wei ,  STREET, Bret K. ,  TUTTLE, Mark E.

IPC: H01L23/528 ,  H01L23/532 ,  H01L23/00 ,  H01L23/31 ,  H01L23/12

Abstract: A semiconductor device includes a substrate including a substrate top surface; interconnects connected to the substrate and extending above the substrate top surface; a die attached over the substrate, wherein the die includes a die bottom surface that connects to the interconnects for electrically coupling the die and the substrate; and a metal enclosure directly contacting and vertically extending between the substrate top surface and the die bottom surface, wherein the metal enclosure peripherally surrounds the interconnects.

公开(公告)号：WO2022066373A1

公开(公告)日：2022-03-31

申请号：PCT/US2021/048389

申请日：2021-08-31

Applicant: MICRON TECHNOLOGY, INC.

Inventor： KIRBY, Kyle K. ,  STREET, Bret K.

IPC: H01L25/065 ,  H01L21/98 ,  H01L21/60

Abstract: Systems and methods for semiconductor devices having a substrate with bond pads, a die pair in a stacked configuration above the bond pads and having a first die having an oxide layer, a second die having an oxide layer attached to the first oxide layer, and conductive bonds electrically coupling the dies. Interconnects extend between the bond pads and the die pair, electrically coupling die pair to the substrate. The device may include a second die pair electrically coupled to: (1) the first die pair with secondary interconnects; and (2) the substrate with through-silicon vias extending through the first die pair. The top die of a die pair may be a thick die for use at the top of a pair stack. Pairs may be created by matching dies of a first silicon wafer to dies of a second silicon wafer, combination bonding the wafers, and dicing the die pairs.

公开(公告)号：WO2021076274A1

公开(公告)日：2021-04-22

申请号：PCT/US2020/051727

申请日：2020-09-21

Applicant: MICRON TECHNOLOGY, INC.

Inventor： FAY, Owen R. ,  RICHARDS, Randon K. ,  LIMAYE, Aparna U. ,  LIM, Dong Soon ,  YOO, Chan H. ,  STREET, Bret K. ,  NAKANO, Eiichi ,  LUO, Shijian

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/525 ,  H01L23/528 ,  H01L23/48 ,  H01L23/60

Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed.