公开(公告)号：WO2021076274A1

公开(公告)日：2021-04-22

申请号：PCT/US2020/051727

申请日：2020-09-21

申请人： MICRON TECHNOLOGY, INC.

发明人： FAY, Owen R. ,  RICHARDS, Randon K. ,  LIMAYE, Aparna U. ,  LIM, Dong Soon ,  YOO, Chan H. ,  STREET, Bret K. ,  NAKANO, Eiichi ,  LUO, Shijian

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L23/525 ,  H01L23/528 ,  H01L23/48 ,  H01L23/60

摘要： Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed.

公开(公告)号：WO2019099070A1

公开(公告)日：2019-05-23

申请号：PCT/US2018/043083

申请日：2018-07-20

申请人： MICRON TECHNOLOGY, INC.

发明人： LUO, Shijian ,  HACKER, Jonathan, S.

IPC分类号： H01L23/31 ,  H01L23/29 ,  H01L23/00

摘要： A semiconductor device includes a substrate including traces, wherein the traces protrude above a top surface of the substrate; a prefill material over the substrate and between the traces, wherein the prefill material directly contacts peripheral surfaces of the traces; a die attached over the substrate; and a wafer-level underfill between the prefill material and the die.

公开(公告)号：WO2013074454A2

公开(公告)日：2013-05-23

申请号：PCT/US2012/064672

申请日：2012-11-12

申请人： MICRON TECHNOLOGY, INC.

发明人： GROOTHUIS, Steven, K. ,  LI, Jian ,  ZHANG, Haojun ,  SILVESTRI, Paul, A. ,  LI, Xiao ,  LUO, Shijian ,  ENGLAND, Luke, G. ,  KEETH, Brent ,  GANDHI, Jaspreet, S.

CPC分类号： H01L23/36 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/42 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2225/06589 ,  H01L2924/15311

摘要： Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.

摘要翻译： 本文公开了具有多个热路径以及相关系统和方法的堆叠半导体管芯组件。 在一个实施例中，半导体管芯组件可以包括布置成堆叠的多个第一半导体管芯以及承载第一半导体管芯的第二半导体管芯。 第二半导体管芯可以包括横向向外延伸超过第一半导体管芯的至少一侧的外围部分。 半导体管芯组件还可以包括在第二半导体管芯的外围部分处的热传递特征。 第一半导体管芯可以限定第一热路径，并且热传递特征可以限定与第一半导体管芯分离的第二热路径。

公开(公告)号：WO2013074484A2

公开(公告)日：2013-05-23

申请号：PCT/US2012/064762

申请日：2012-11-13

申请人： MICRON TECHNOLOGY, INC. ,  LUO, Shijian ,  LI, Xiao ,  LI, Jian

发明人： LUO, Shijian ,  LI, Xiao ,  LI, Jian

CPC分类号： H01L23/36 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/42 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2225/06589 ,  H01L2924/15311

摘要： A semiconductor die assembly comprises a plurality of semiconductor dice in a stack. Another semiconductor die is adjacent to the stack and has a region, which may comprise a relatively higher power density region, extends peripherally beyond the stack. Conductive elements extend between and electrically interconnect integrated circuits of semiconductor dice in the stack and of the other semiconductor die. Thermal pillars are interposed between semiconductor dice of the stack, and a heat dissipation structure, such as a lid, is in contact with an uppermost die of the stack and the high power density region of the other semiconductor die. Other die assemblies, semiconductor devices and methods of managing heat transfer within a semiconductor die assembly are also disclosed.

摘要翻译： 半导体管芯组件包括堆叠中的多个半导体管芯。 另一个半导体管芯与堆叠相邻并且具有可以包括相对较高的功率密度区域的区域，其周边地延伸超过堆叠。 导电元件在堆叠中的半导体裸片的集成电路与另一半导体裸片之间延伸并电互连。 热柱插入堆叠的半导体管芯之间，并且诸如盖子的散热结构与堆叠的最上面的管芯和另一个半导体管芯的高功率密度区域接触。 还公开了其他管芯组件，半导体器件和管理半导体管芯组件内的热传递的方法。

公开(公告)号：WO2021252188A1

公开(公告)日：2021-12-16

申请号：PCT/US2021/034194

申请日：2021-05-26

申请人： MICRON TECHNOLOGY, INC.

发明人： FAY, Owen R. ,  RICHARDS, Randon K. ,  LIMAYE, Aparna U. ,  LIM, Dong Soon ,  YOO, Chan H. ,  STREET, Bret K. ,  NAKANO, Eiichi ,  LUO, Shijian

IPC分类号： H01L25/10 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L23/552 ,  H01L23/66 ,  H01L23/34 ,  H01L25/18 ,  H01L25/16 ,  H01L2223/6677 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/1047 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/5384 ,  H01L24/10 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50

摘要： Disclosed are microelectronic device assemblies comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device having bond pads operably coupled to conductive traces in contact with the microelectronic devices and extending over a dielectric material to conductive via locations beyond at least one side of the stack for routing power and ground/bias extending through the dielectric materials to contact exposed conductors of the substrate. Data signals are routed between and through microelectronic devices of the stack by structure for data signal communication. Methods of fabrication and related electronic systems are also disclosed.

公开(公告)号：WO2015153481A1

公开(公告)日：2015-10-08

申请号：PCT/US2015/023377

申请日：2015-03-30

申请人： MICRON TECHNOLOGY, INC.

发明人： KOOPMANS, Michael ,  LUO, Shijian ,  HEMBREE, David, R.

IPC分类号： H01L23/34 ,  H01L23/48

CPC分类号： H01L25/0652 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/373 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/5226 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/15156 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/014 ,  H01L2924/01047

摘要： Stacked semiconductor die assemblies with improved thermal performance and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a stack of semiconductor dies and a thermally conductive casing at least partially enclosing the stack of semiconductor dies within an enclosure. A package substrate carries the thermally conductive casing, and an interposer is disposed between the thermally conductive casing and the stack of semiconductor dies. A peripheral portion of the interposer extends laterally beyond the stack of semiconductor dies and is coupled to a plurality of conductive members interposed between the peripheral portion and the package substrate.

摘要翻译： 本文公开了具有改进的热性能和相关联的系统和方法的堆叠的半导体管芯组件。 在一个实施例中，半导体管芯组件可以包括半导体管芯堆叠和至少部分地围绕外壳内的半导体管芯堆叠的导热外壳。 封装衬底承载导热壳体，并且插入件设置在导热壳体和半导体管芯堆叠之间。 插入器的外围部分横向延伸超过半导体管芯堆叠，并且连接到插入在周边部分和封装衬底之间的多个导电构件。

公开(公告)号：WO2014011638A1

公开(公告)日：2014-01-16

申请号：PCT/US2013/049730

申请日：2013-07-09

申请人： MICRON TECHNOLOGY, INC.

发明人： GROOTHUIS, Steven ,  LI, Jian ,  LUO, Shijian

IPC分类号： H01L23/373 ,  H01L23/12

CPC分类号： H01L23/367 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/34 ,  H01L23/433 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/00014

摘要： Semiconductor device packages comprise a first semiconductor device comprising a heat generating region located on at least one end thereof. A second semiconductor device is attached to the first semiconductor device. At least a portion of the heat generating region extends laterally beyond at least one corresponding end of the second semiconductor device. A thermally insulating material at least partially covers the end of the second semiconductor device. Methods of forming a semiconductor device packages comprise attaching a second semiconductor device to a first semiconductor device. The first semiconductor device comprises a heat generating region at an end thereof. At least a portion of the heat generating region extends laterally beyond an end of the second semiconductor device. The end of the second semiconductor device is at least partially covered with a thermally insulating material.

摘要翻译： 半导体器件封装包括第一半导体器件，其包括位于其至少一端上的发热区域。 第二半导体器件附接到第一半导体器件。 发热区域的至少一部分横向延伸超过第二半导体器件的至少一个对应的端部。 绝热材料至少部分地覆盖第二半导体器件的端部。 形成半导体器件封装的方法包括将第二半导体器件附接到第一半导体器件。 第一半导体器件在其末端包括发热区域。 发热区域的至少一部分横向延伸超过第二半导体器件的端部。 第二半导体器件的端部至少部分地被绝热材料覆盖。