公开(公告)号：WO2008144151A3

公开(公告)日：2009-01-15

申请号：PCT/US2008061117

申请日：2008-04-22

Applicant: RAMBUS INC ,  ABBASFAR ALIAZAM ,  KOMIJANI ABBAS

Inventor： ABBASFAR ALIAZAM ,  KOMIJANI ABBAS

IPC: H04L27/26 ,  H04B7/06

CPC classification number: H04B7/06 ,  H04L27/2614 ,  H04L27/2628

Abstract: Embodiments of a communication circuit are described. This communication circuit includes an input node (212) to receive a set of data symbols and a partitioner (216) coupled to the input node. The partitioner is to divide the set of data symbols into M irregular subgroups of data symbols, a given one of which includes non-consecutive data symbols in the set of data symbols. Moreover, this given irregular subgroup of data symbols includes at least two pairs ofadjacent data symbols having different inter-data-symbol spacings in the set of data symbols. This communication circuit also includes M modulators (218-1,,218-Nl) coupled to the partitioner, where the given irregular subgroup of data symbols is coupled to a given modulator in the M modulators. Furthermore, the communication circuit includes M output nodes, where a given output node in the M output nodes is coupled to the given modulator and is to couple to an antenna element in M antenna elements (226).

Abstract translation: 描述通信电路的实施例。 该通信电路包括用于接收一组数据符号的输入节点（212）和耦合到输入节点的分割器（216）。 分割器将数据符号组分成M个不规则的数据符号子组，给定的一个数据符号包括数据符号组中的非连续数据符号。 此外，该给定的不规则数据符号子组包括在该组数据符号中具有不同的数据间符号间隔的至少两对相邻的数据符号。 该通信电路还包括耦合到分割器的M个调制器（218-1，...，218-N1），其中给定的不规则子数据符号耦合到M个调制器中的给定调制器。 此外，通信电路包括M个输出节点，其中M个输出节点中的给定输出节点耦合到给定的调制器，并且耦合到M个天线元件（226）中的天线元件。

公开(公告)号：WO2007055748A2

公开(公告)日：2007-05-18

申请号：PCT/US2006024600

申请日：2006-06-26

Applicant: WILINX INC ,  ROSTAMI EDRIS ,  BAGHERI RAHIM ,  DJAFARI MASOUD ,  KOMIJANI ABBAS

Inventor： ROSTAMI EDRIS ,  BAGHERI RAHIM ,  DJAFARI MASOUD ,  KOMIJANI ABBAS

IPC: H04B1/26

CPC classification number: H03D7/1458 ,  H03D7/1433 ,  H03D7/1441 ,  H03D7/1483 ,  H03D7/165 ,  H03D2200/0043

Abstract: Embodiments of the present invention include circuits and methods for improving the spectral purity of mixer circuits. In one embodiment the present invention includes mixer circuit including capacitances between sources of mixer transistors to reduce spectral impurity. In another embodiment, the present invention includes a mixer circuit including a bias circuit, the bias circuit comprising feedback loop to control the bias at the gate of mixer transistors.

Abstract translation: 本发明的实施例包括用于提高混频器电路的频谱纯度的电路和方法。 在一个实施例中，本发明包括混合器电路，其包括在混频器晶体管的源极之间的电容以减少频谱杂质。 在另一个实施例中，本发明包括一个包括偏置电路的混频器电路，偏置电路包括用于控制混频器晶体管栅极偏置的反馈环路。

公开(公告)号：WO2007048007A2

公开(公告)日：2007-04-26

申请号：PCT/US2006041187

申请日：2006-10-20

Applicant: WILINX INC ,  BAGHERI MAHDI ,  BAGHERI RAHIM ,  ROSTAMI EDRIS ,  KOMIJANI ABBAS ,  MIRZAEI AHMAD ,  DJAFARI MASOUD

Inventor： BAGHERI MAHDI ,  BAGHERI RAHIM ,  ROSTAMI EDRIS ,  KOMIJANI ABBAS ,  MIRZAEI AHMAD ,  DJAFARI MASOUD

IPC: H03F3/191

CPC classification number: H03F1/48 ,  H03F3/191 ,  H03F3/45179 ,  H03F3/45475 ,  H03F2200/168 ,  H03F2200/36 ,  H03F2203/45302 ,  H03F2203/45318 ,  H03F2203/45342 ,  H03F2203/45354

Abstract: Embodiments of the present invention include circuits and methods with wide bandwidths. In one embodiment, parasitic capacitances of the output of a first stage and the input of a second stage are included in a network. The output of the first stage is coupled to the input of the network, and the input of the second stage is coupled to an intermediate node of the network. In one embodiment, the parasitic capacitance of the second stage is the largest capacitance in the network. In another embodiment, passive networks are coupled to the outputs of a stage, and one or more current injection circuits may be used to extend the bandwidth of the circuit.

Abstract translation: 本发明的实施例包括具有宽带宽的电路和方法。 在一个实施例中，第一级的输出和第二级的输入的寄生电容包括在网络中。 第一级的输出耦合到网络的输入，并且第二级的输入耦合到网络的中间节点。 在一个实施例中，第二级的寄生电容是网络中最大的电容。 在另一个实施例中，无源网络耦合到级的输出，并且可以使用一个或多个电流注入电路来扩展电路的带宽。

公开(公告)号：WO03079547B1

公开(公告)日：2004-07-15

申请号：PCT/US0307157

申请日：2003-03-10

Applicant: CALIFORNIA INST OF TECHN ,  KOMIJANI ABBAS ,  HAJIMIRI SEYED-ALI ,  KEE SCOTT D ,  AOKI ICHIRO

Inventor： KOMIJANI ABBAS ,  HAJIMIRI SEYED-ALI ,  KEE SCOTT D ,  AOKI ICHIRO

IPC: H03F3/60 ,  H03F3/42 ,  H03F3/26 ,  H03F3/72

CPC classification number: H03F3/72 ,  H03F3/26 ,  H03F3/42 ,  H03F3/602 ,  H03F2200/372 ,  H03F2200/421 ,  H03F2200/541

Abstract: Reconfigurable distributed active transformers are provided. The exemplary embodiments provided allow changing of the effective number and configuration of the primary and secondary windings, where the distributed active transformer structures can be reconfigured dynamically to control the output power levels, allow operation at multiple frequency bands, maintain a high performance across multiple channels, and sustain desired characteristics across process, temperature and other environmental variations. Integration of the distributed active transformer power amplifiers and a low noise amplifier on a semiconductor substrate can also be provided.

Abstract translation: 提供可重配置的分布式有源变压器。 提供的示例性实施例允许改变主和次级绕组的有效数量和配置，其中分布式有源变压器结构可以动态地重新配置以控制输出功率电平，允许在多个频带上操作，在多个通道上保持高性能 并保持过程，温度和其他环境变化的期望特征。 还可以提供分布式有源变压器功率放大器和低噪声放大器在半导体衬底上的集成。

公开(公告)号：WO03079547A2

公开(公告)日：2003-09-25

申请号：PCT/US0307157

申请日：2003-03-10

Applicant: CALIFORNIA INST OF TECHN ,  KOMIJANI ABBAS ,  HAJIMIRI SEYED-ALI ,  KEE SCOTT D ,  AOKI ICHIRO

Inventor： KOMIJANI ABBAS ,  HAJIMIRI SEYED-ALI ,  KEE SCOTT D ,  AOKI ICHIRO

IPC: H03F3/60 ,  H03F3/42 ,  H03F3/26

CPC classification number: H03F3/72 ,  H03F3/26 ,  H03F3/42 ,  H03F3/602 ,  H03F2200/372 ,  H03F2200/421 ,  H03F2200/541

Abstract: Reconfigurable distributed active transformers are provided. The exemplary embodiments provided allow changing of the effective number and configuration of the primary and secondary windings, where the distributed active transformer structures can be reconfigured dynamically to control the output power levels, allow operation at multiple frequency bands, maintain a high performance across multiple channels, and sustain desired characteristics across process, temperature and other environmental variations. Integration of the distributed active transformer power amplifiers and a low noise amplifier on a semiconductor substrate can also be provided.

Abstract translation: 提供可重配置的分布式有源变压器。 提供的示例性实施例允许改变主和次级绕组的有效数量和配置，其中分布式有源变压器结构可以动态地重新配置以控制输出功率电平，允许在多个频带上操作，在多个通道上保持高性能 并保持过程，温度和其他环境变化的期望特征。 还可以提供分布式有源变压器功率放大器和低噪声放大器在半导体衬底上的集成。

公开(公告)号：WO2006039500A3

公开(公告)日：2007-01-18

申请号：PCT/US2005035210

申请日：2005-09-29

Applicant: CALIFORNIA INST OF TECHN ,  NATARAJAN ARUN ,  KOMIJANI ABBAS ,  HAJIMIRI SEYED ALI

Inventor： NATARAJAN ARUN ,  KOMIJANI ABBAS ,  HAJIMIRI SEYED ALI

IPC: H04B1/02 ,  H04B7/02 ,  H04M1/00

CPC classification number: H01Q3/42 ,  H01Q3/22

Abstract: A fully integrated CMOS multi-element phased-array transmitter (transmitter)includes, in part, on-chip power amplifiers (PA) (262), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional l-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors (252, 254) in each transmitter path have independent access to all the phases of the VCO (202). The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (1) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.

Abstract translation: 完全集成的CMOS多元件相控阵发射器（发射机）部分地包括片上功率放大器（PA）（262），具有集成的输出匹配。 发射机适于配置为二维2×2阵列或一维1/4乘法阵列。 发射机采用两段升频转换架构，中频频率为4.8GHz。 上转换级的双正交架构在图像频率衰减信号。 每个发射机路径中的相位选择器（252,254）具有对VCO（202）的所有相位的独立访问。 双正交架构为每个路径产生两组相位选择器，一组用于同相（1），另一组用于LO信号的正交相位（Q）。 相位选择分为两个阶段，第一阶段确定期望的VCO差分相位对，下一个阶段选择适当的极性。 片内平衡管用于差分到单端转换。