Abstract:
Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable multi-processor apparatus may include multiple integrated circuit (IC) blocks where each IC block includes a task block to perform one or more assignable task functions and a management block to perform management functions with respect to the corresponding IC block. Each task block and each management block may include one or more instruction processors and corresponding memory. Each IC block may be controllable to perform a function of one or more other IC blocks. The IC blocks may communicate with each other via a management communication infrastructure that may include a communication path from each of the management blocks to each of the other management blocks. Via the management communication infrastructure, the management blocks may bridge communication paths between pairs of management blocks.
Abstract:
The disclosed implementations include a hardware appliance and method of using that appliance that may be configured to be coupled with commodity server nodes to provide a fault tolerant and available private cloud. The implementations can use a host for software containers and a switch to communicate with external networks and cloud nodes. Thus, this cloud controller appliance can provide a system to deploy a private cloud within an enterprise.
Abstract:
A method of fault tolerance in a multiprocessor system based on primary-backup scheme includes: receiving a task to be allocated to a processor in a multiprocessor system; allocating a primary version of the task according to a normal real-time scheduling algorithm; checking validity of the allocation of the primary version of the task; allocating a backup version of the task with overloading; and checking validity of the allocation of the backup version of the task.
Abstract:
A process-level troubleshooting architecture (PLTA) configured to facilitate substrate processing in a plasma processing system is provided. The architecture includes a process module controller. The architecture also includes a plurality of sensors, wherein each sensor of the plurality of sensors communicates with the process module controller to collect sensed data about one or more process parameters. The architecture further includes a process-module-level analysis server, wherein the process-module-level analysis server communicates directly with the plurality of sensors and the process module controller. The process-module-level analysis server is configured for receiving data, wherein the data include at least one of the sensed data from the plurality of sensors and process module and chamber data from the process module controller. The process-module-level analysis server is also configured for analyzing the data and sending interdiction data directly to the process module controller when a problem is identified during the substrate processing.
Abstract:
A storage system that may include one or more memory sections, one or more switches, and a management system. The memory sections include memory devices and a section controller that in an aspect may be capable of detecting faults with the memory section and transmitting messages to the management system regarding detected faults. The storage system may include a management system capable of receiving fault messages from the section controllers and removing from service the faulty memory sections. Additionally, the management system may determine routing algorithms for the one or more switches. In another aspect, the switch may be capable of reading a data request including a data block identifier and routing the data request and any associated data through the switch on the basis of this data block identifier, such that a data request may be routed to a memory section. The section controller, in response, may determine the addresses in the memory devices storing the requested data, and transfers these addresses to those memory devices storing the requested data. Additionally, in yet another aspect, a data request for the data may be received over a communications path by the section controller. The section controller may determine the addresses in the memory devices storing the requested data, transfer these addresses to those memory devices storing the requested data, and transfer an identifier to the memory interface device. The memory device, in response, may read the data and transfer the data to its corresponding memory interface device. The memory interface device then may add to the data the identifier it received from the section controller and forward the requested bits towards their destination, such that the data need not pass through the section controller.
Abstract:
In a data processing system with multiple processors, failing processors are replaced with spare processors. This allows the system to continue to operate without degradation. An intercept process is notified of a processor failure (50) so that it can collect processor registers and states (52). If the registers and states are collected correctly, an indication is set (54) that relief is possible (56). The intercept process notifies a service processor of the failure and then halts the failed processor (55). The service processor then notifies the operating system of the failure and that relief is possible. If fast relief is acceptable, a spare processor is initialized and resumes execution with the state and registers of the failed processor. A service processor modeling file controls the number of active and spare processors in a system. Spare processors sharing the same L2 cache with the failed processor are preferred as replacements.
Abstract:
A distributed computing system comprises a primary server having a primary virtual shared memory and a back-up server having a back-up virtual shared memory. The primary server periodically provides a state table to the back-up server in order to synchronize the virtual shared memory and the back-up virtual shared memory. A plurality of client computer resources are coupled to the primary server and the back-up server through a network architecture. The client computer resources further comprise plural worker processes each adapted to independently perform an operation on a data object disposed within the primary virtual shared memory without a predetermined assignment between the worker process and the data object. Upon an unavailability of either the primary server or the back-up server, the worker process performs the operation on the corresponding data object disposed within the back-up virtual shared memory. The client computer resources further comprise plural input/output (I/O) ports adapted to receive incoming data packets and transmit outgoing data packets.
Abstract:
A system for, and method of, disseminating a functional block to a redundant controller for a real-time process control system and a real-time process control system incorporating the system or the method. In one embodiment, the system includes: (1) a dynamically linkable library object associated with the functional block and (2) a shared memory, associated with at least two nodes of the redundant controller, that receives the dynamically linkable library object and the functional block and provides concurrent access thereto by both the at least two nodes to ensure consistent memory images therefor without requiring one of the at least two nodes to be taken off-line.
Abstract:
In a network of computer nodes, a structured storage system interfaces to a globally addressable memory system that provides persistent storage of data. The globally addressable memory system may be a distributed shared memory (DSM) system. A control program resident on each network node can direct the memory system to map file and directory data into the shared memory space. The memory system can include functionality to share data, coherently replicate data, and create log-based transaction data to allow for recovery. In one embodiment, the memory system provides memory device services to the data control program. These services can include read, write, allocate, flush, or any other similar or additional service suitable for providing low level control of a memory storage device. The data control program employs these memory system services to allocate and access portions of the shared memory space for creating and manipulating a structured store of data such as a file system, a database system, or a Web page system for storing, retrieving, and delivering objects such as files, database records or information, and Web pages.