Abstract:
A method, comprising: providing an electrical energy source having a specified amount of electrical energy; connecting an array comprising n magnetic tunnel junctions (MTJ) in parallel to said electrical energy source, wherein each of said MTJs is at a high resistance initial state; discharging said specified energy amount through said MTJs, thereby causing a random subset of said MTJs to switch to a lower resistance state; determining a post-discharging resistance state of each of the MTJs; and assigning a logical state to each of said MTJs corresponding to said resistance state of said MTJ.
Abstract:
One feature pertains to a method of implementing a physically unclonable function that includes providing an array of metal-insulator-metal (MIM) devices, where the MIM devices are configured to represent a first resistance state or a second resistance state and a plurality of the MIM devices are initially at the first resistance state. The MIM devices have a random breakdown voltage that is greater than a first voltage and less than a second voltage, where the breakdown voltage represents a voltage that causes the MIM devices to transition from the first resistance state to the second resistance state. The method further includes applying a signal line voltage to the MIM devices to cause a portion of the MIM devices to randomly breakdown and transition from the first resistance state to the second resistance state, the signal line voltage greater than the first voltage and less than the second voltage.
Abstract:
A memory device has an information plane (32) for storing data bits in a magnetic state of an electro-magnetic material at an array of bit locations (31). The device further has an array of electro-magnetic sensor elements (51) that are aligned with the bit locations. The information plane (32) is programmable or programmed via a separate magnetic writing device (21). In particular a read-only sensor element (60) is described for a read-only magnetic memory.
Abstract:
A one-time programmable (OTP) memory having a plurality of cells (102), each cell (102) having a magnetic tunnel junction (MTJ) device; and the OTP memory further including a write driver (136) to drive each MTJ device to an anti-parallel state, and a program driver (139) to drive a subset of the MTJ devices to a blown state depending upon the information to be stored.
Abstract:
An antifuse circuit (10) provides on a per bit basis a signal that indicates whether an MTJ (magnetic tunnel junction) antifuse (18) has been previously programmed to a low resistance state in response to a program voltage. A sense amplifier (12) provides the resistance state signal. A plurality of reference magnetic tunnel junctions (16) are coupled in parallel and to the sense amplifier (12), each (50, 52, 54) having a resistance within a range to provide a collective resistance that can be determined by the sense amplifier (12) to differ from each resistance state of the MTJ antifuse (18). A write circuit selectively provides a current sufficient to create the program voltage when the write circuit (20) is enabled to program the antifuse magnetic tunnel junction (18). Upon detecting a change in resistance in the MTJ antifuse (18), the write circuit (20) reduces current supplied to the antifuse (18). Multiple antifuses may be programmed concurrently. Gate oxide thicknesses of transistors are adjusted for optimal performance.
Abstract:
A method and System for providing a magnetic element that can be used in a magnetic memory is disclosed. The magnetic element includes pinned, nonmagnetic spacer, and free layers. The spacer layer resides between the pinned and free layers. The free layer can be switched using spin transfer when a write current is passed through the magnetic element. The magnetic element may also include a barrier layer, a second pinned layer. Alternatively, second pinned and second spacer layers and a second free layer magnetostatically coupled to the free layer are included. At least one free layer has a high perpendicular anisotropy. The high perpendicular anisotropy has a perpendicular anisotropy energy that is at least twenty and less than one hundred percent of the out-ofplane demagnetization energy.
Abstract:
A one time programming (OTP) apparatus unit cell includes magnetic tunnel junctions (MTJs) with reversed connections for placing the MTJ in an anti-parallel resistance state during programming. Increased MTJ resistance in its anti-parallel resistance state causes a higher programming voltage which reduces programming time and programming current.
Abstract:
A method of generating a non - reversible state at a bitcell having a first magnetic tunnel junction (MTJ) and a second MTJ includes applying a program voltage to the first MTJ of the bitcell without applying the program voltage to the second MTJ of the bitcell. A memory device (102) includes a bitcell having a first MTJ (106) and a second MTJ (108) and programming circitry (104) configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell.
Abstract:
A method of programming a programmable resistance element. The programmable resistance element may be programmed to a BLOWN state. After being programmed to the BLOWN state, the element can no longer be programmed to its low resistance state. The method of programming allows the programmable resistance element to be used as a fuse.
Abstract:
A method and system for providing and using a magnetic random access memory are disclosed. The method and system include providing a plurality of magnetic memory cells, a first plurality of write lines, and a second plurality of write lines. The first plurality of write lines is a plurality of magnetic write lines. At least one of the plurality of magnetic lines and at least one of the second plurality of write lines each carrying a current for writing to at least one of the plurality of magnetic memory cells. Preferably, the plurality of magnetic write lines have soft magnetic properties and are preferably magnetic bit lines. For magnetic tunneling junction stacks within the magnetic memory cells, the magnetic bit lines are preferably significantly thicker than and closely spaced to the free layers of the magnetic memory cells.