US07773851B2
A compact optical splitter module is disclosed. One type of compact optical splitter module is a planar attenuated splitter module that includes a branching waveguide network having j≧1 50:50 splitters that form up to n≦2j output waveguides having associated n output ports, wherein only m
US07773850B2
A cable slack manager for managing cable slack comprises two or more spaced apart cable management members rotatable between a first stored position and a second deployed position. At least one arm releasably securable to a cable management assembly (e.g., a rack or data cabinet) may carry the two or more spaced apart cable management members, which may exhibit a round or C-shaped configuration. The cable slack manager may optionally comprise a base mountable to the cable management assembly, with the at least arm securable to the base.
US07773843B2
Bi-directional tap assemblies for two-way fiber topologies are disclosed. The assembly includes a fiber-optic cable having a cable optical fiber adapted to carry bi-directional optical signals and that is preterminated at a mid-span location to form at least one first cable fiber end and at least one second cable fiber end. First and second tether fibers are respectively spliced to the first and second cable fiber ends. In one version of the assembly, the tether fibers are contained in respective first and second tether covers to form first and second tethers that extend in opposite directions from the tap point. In another version of the assembly, the tether fibers are bend-insensitive fibers and are contained in a single tether cover to form a single tether. The tether fibers bend back on themselves within the tether cover and terminate at a common end of the tether, thereby allowing both downstream and upstream optical signals to be accessed at the tether end. The single tether is configured to be translateable along the fiber-optic cable by allowing the bend locations in the bend-insensitive fibers to change as the tether is translated.
US07773842B2
A distributed optical structure comprises a set of diffractive elements. Individual diffractive element transfer functions collectively yield an overall transfer function between entrance and exit ports. Diffractive elements are defined relative to virtual contours and include diffracting region(s) altered to diffract, reflect, and/or scatter incident optical fields (altered index, surface, etc). Element and/or overall set transfer functions (amplitude and/or phase) are determined by: longitudinal and/or angular displacement of diffracting region(s) relative to a virtual contour (facet-displacement grayscale); longitudinal displacement of diffractive elements relative to a virtual contour (element-displacement grayscale); and/or virtual contour(s) lacking a diffractive element (proportional-line-density gray scale). Optical elements may be configured: as planar or channel waveguides, with curvilinear diffracting segments; to support three-dimensional propagation with surface areal diffracting segments; as a diffraction grating, with grating groove or line segments.
US07773839B2
A method of providing dispersion compensation includes providing a dispersion signal indicative of an amount of dispersion for at least one channel of a multi-channel optical signal. A dispersion compensator is controlled in accordance with the dispersion signal to optically compensate for the dispersion of the optical signal.
US07773836B2
Systems and methods for configuring an integrated transceiver are disclosed. In one embodiment, very small form factor transceivers can be configured to allow 10 G optical interconnects over distances up to 2 km. Transceiver circuitry can be integrated on a single die, and be electrically connected to a transmitter such as a laser-diode and a receiver such as a photo-diode. In one embodiment, the laser and photo diodes can be edge-operating, and be mounted on the die. In one embodiment, one or both of the diodes can be surface-operating so as to allow relaxation of alignment requirement. In one embodiment, one or both of the diodes can be mounted on a submount that is separate from the die so as to facilitate separate assembly and testing. In one embodiment, the diodes can be optically coupled to a ferrule via an optical coupling element so as to manage loss in certain situations.
US07773835B2
This invention relates to a coating material that is applied on organic and/or inorganic surfaces and that can detain moisture and easily release the moisture that is detained after a certain time, and a fiber optic sensor (1) where this coating is utilized.
US07773834B2
A polarizing film is made of multilayer polarizing fibers embedded within a matrix. The fibers are formed with layers of at least a first and a second polymer material. Layers of the first polymer material are disposed between layers of the second polymer material. At least one of the first and second polymer materials is birefringent. In some embodiments the thickness of the layers of at least one of the materials varies across the fiber, and may include layers are selected as quarter-wavelength thickness for light having a wavelength of more than 700 nm.
US07773829B1
Image-centric rulers are described, including a method comprising detecting a position of a pointer relative to an image, drawing a ruler extending outward approximately from the position of the pointer, and moving the ruler in response to detecting a movement of the pointer.
US07773824B2
The present invention relates to a signal processing apparatus and a method, a recording medium, and a program, in which portions except an edge can be smoothed while the edge whose change in pixel value is steep is held correctly. A pixel of attention is determined in step S11, and a neighboring pixel is determined in step S12. In step S13, a difference in pixel values between the pixel of attention and each neighboring pixel is calculated. In step S14, according to a relationship in size between the difference and a threshold value ε., flags are raised for the neighboring pixel and a neighboring pixel which are symmetrical. Furthermore, a flag is also raised for a neighboring pixel away from, in view of the pixel of attention, the symmetrical neighboring pixel for which the flag is raised. In step S15, 7-pixel taps centered around the pixel of attention are averaged by weight. However, with respect to the neighboring pixel for which the flag is raised, the pixel value is replaced by that of the pixel of attention C, and is calculated. The present invention can be applied to a video camera, a television receiver, etc.
US07773819B2
Multi-resolution images of a reference image and a target image are generated. Then, whole-range matching is performed on an image of a lower resolution to detect a two-dimensional displacement between the images. Block matching is performed on an image of a higher resolution to detect a displacement at each feature point. The accuracy of motion data is increased by correcting the motion data with an image of a higher resolution by using the previously calculated motion data of the lowest resolution through higher resolutions as an initial value.
US07773816B2
An embodiment of a method for decoding large images performed by a processing unit, comprises the following steps. A compressed bit stream of a minimum code unit (MCU) of an image is acquired. The acquired bit stream is decoded by performing a first stage of a image decoding procedure to generate a temporary decoding result of the acquired bit stream. It is determined whether the MCU requires display. If so, the generated temporary decoding result is decoded by performing a second stage of the image decoding procedure to generate display data of the acquired bit stream. The temporary decoding result of the acquired bit stream is utilized to decode another MCU of the bit stream.
US07773813B2
Systems and methods are described for detecting capture-intention in order to analyze video content. In one implementation, a system decomposes video structure into sub-shots, extracts intention-oriented features from the sub-shots, delineates intention units via the extracted features, and classifies the intention units into intention categories via the extracted features. A video library can be organized via the categorized intention units.
US07773811B2
A method and system for searching a database of graphical data are described. Embodiments of the invention use accelerated image-comparing techniques based on application of the Levenshtein algorithm for matching or searching one-dimensional data strings to recognizing pre-selected targets in graphical contents of 2D images.
US07773802B2
An image processing system includes a photographing apparatus (1) and a processing apparatus (2). The photographing apparatus (1) includes six LEDs (6a to 6f) for emitting light with characteristics of spectroscopic distributions varied in a visible light area, a monochrome-type CCD (8) which picks-up a subject image that is illuminated by the LEDs (6a to 6f) and is formed by an image pick-up optical system (7) and which outputs an image signal, and a CPU (18) which sequentially lights-on the LEDs (6a to 6f) upon an instruction for photographing a subject spectroscopic image being input from an operating switch (14), picks-up the image by the CCD (8), and thus controls the operation for capturing 6-primary-color subject spectroscopic images. The processing apparatus (2) includes a calculating device (21) which captures the 6-primary-color subject spectroscopic images photographed by the photographing apparatus (1) to create a display signal for color reproduction at the high fidelity level, and a display (22) which displays the display signal created by the calculating device (21).
US07773791B2
A method of analyzing a lesion in a medical digital image using at least one point contained within a lesion to be analyzed includes propagating a wave-front surface from the point(s) for a plurality of steps; partitioning the wave-front surface into a plurality of wave-front parts wherein each wave-front part is associated with a different portion of the wave-front surface corresponding to a previous propagation step; and analyzing at least one feature associated with each wave-front part to classify anatomical structures associated with the lesion and normal anatomy within the medical digital image.
US07773790B2
An apparatus and method for imaging metallic nanoparticles is provided. Preferably, the invention provides for an apparatus and method for detection of gold colloid particles and for accurate reporting to the operator. The apparatus includes a substrate holder for holding the substrate, a processor and memory device, an imaging module, an illumination module, a power module, an input module, and an output module. The apparatus may have a stationary substrate holder and imaging module which are proximate to one another. The apparatus provided for a compact sized system without the need for complex motorized devices to move the camera across the substrate. Further, the apparatus and method provide for automatic detection of the spots/wells on the substrate, automatic quantification of the spots on the substrate, and automatic interpretation of the spots based on decision statistics.
US07773780B2
Systems and methods of authorizing an activity, such as a financial transaction, are disclosed. Authorizing the activity may be accomplished by comparing a biometric sample to a biometric specimen. The sample is stored in a database and includes biometric information corresponding to two physiologically distinct portions of an individual. When that individual later is a person desiring to authorize an activity, he provides a specimen that includes biometric information corresponding to two physiologically distinct portions of his person. A comparison between the sample and the specimen is performed, and if a match is determined then the activity is authorized. If the comparison is performed and a match is not determined, then the activity is not authorized.
US07773773B2
The invention provides a method and a computer program stored in a tangible medium for automatically determining a volume of three-dimensional objects represented in two-dimensional images, by acquiring at two least two-dimensional digitized images, by analyzing the two-dimensional images to identify reference points and geometric patterns, by determining distances between the reference points and the component objects utilizing reference data provided for the three-dimensional object, and by calculating a volume for the three-dimensional object.
US07773770B2
The application discloses various methods and systems to provide substitute or replacement components for media objects (e.g., audio, video or images). The substitute or replacement components can be substituted for or to replace corresponding components when making copies of media objects. One claim includes: an apparatus comprising: a processor; and memory. The memory includes instructions for execution by said processor. The instructions include instructions to: upon receipt of a copy request, determine whether an object to be copied comprises a steganographic signal hidden within at least one component of the object; if the object comprises a steganographic signal hidden therein, obtain a substitute or replacement component corresponding to the steganographic signal; and execute the copy request of the object to yield a copy object including providing in the copy object the substitute or replacement component for the at least one component of the object. Of course, other apparatus, methods and combinations are provided as well.
US07773764B2
A hearing device with a plastic mold arranged in the ear, in other words a hearing device shell or an otoplastic, features a loudspeaker in its interior. A cerumen protection system extends from the loudspeaker to the surface of the plastic mold. In accordance with the invention, a microphone is arranged in the cerumen protection system.
US07773750B2
A multimedia stream head end includes a legacy conditional access (CA) device that fully encrypts the stream using legacy keys. A copy of the stream is sent to a secondary CA device that encrypts only critical packets in the stream using secondary keys to render a partially encrypted stream. The critical packets in the fully encrypted stream from the legacy CA device are obtained and inserted next to the corresponding critical packets in the partially encrypted stream. Thus, only critical packets are encrypted, with encrypted versions being generated by both the legacy CA and secondary CA without the legacy CA knowing which of the packets that it encrypts are “critical”.
US07773729B2
A digital notification and response system utilizes an administrator interface to transmit a message from an administrator to user contact devices having an advertising module and a customer module with translation abilities. The system comprises a dynamic information database that includes user contact data, priority information, and response data. The administrator initiates distribution of the message based upon grouping information, priority information, and the priority order. The message is transmitted through at least two industry standard protocols simultaneously to groups of user contact devices based upon priority information. Once the message is received by the user contact device, the user contact device transmits a response through the industry standard protocols back to the dynamic information database.
US07773724B2
A system for generating an improved diffraction profile is described. The system includes at least one x-ray source configured to generate x-rays and a primary collimator outputting a first x-ray beam to a first focus point and a second x-ray beam to a second focus point. The primary collimator generates the first and second x-ray beams from the x-rays. The system further includes a container, and a first scatter detector configured to detect a first set of scattered radiation generated upon intersection of the first x-ray beam with the container and to detect a second set of scattered radiation generated upon intersection of the second x-ray beam with the container. An angle of scatter of the first set of scattered radiation detected by the first scatter detector is at most half of an angle of scatter of the second set of scattered radiation detected by the first scatter detector.
US07773720B2
A unit for X-ray CT imaging to be set in a panorama X-ray imaging apparatus having a cassette holder has a digital sensor cassette for CT imaging to be set in the cassette holder, includes a two-dimensional X-ray detector for acquiring X-ray projection data for CT imaging of an object, and a controller for controlling a timing of X-ray CT imaging, a radiation field of X-ray beam generated by the X-ray detector, and the rotary device. Alternatively, the unit has the digital sensor cassette for X-ray CT imaging, an image reconstructor which calculates to convert the X-ray projection data obtained with the two-dimensional X-ray detector to a distribution of X-ray absorption coefficients of the object and creates tomographic image data of sections of the object, and an image processor which sends and receives signals for X-ray CT imaging between the X-ray detector and the image reconstructor when the digital sensor cassette for CT imaging is set in the cassette holder.
US07773717B2
In a spent fuel pool of a nuclear power plant, there is provided a system for aligning a nuclear fuel bundle and handling selected fuel rods within the fuel bundle. The bundle includes water rods, full-length and part-length fuel rods extending through a plurality of fuel spacers provided between top and bottom ends of the bundle, each spacer having a plurality of cells accommodating corresponding fuel and water rods. The system includes a bundle alignment system for aligning the fuel rods and water rods, a rod grapple tool to extract selected part-length rods from the bundle, and a fuel rod guide block slidable onto the top end of the bundle for protecting an uppermost fuel spacer of the bundle, and for aligning fuel rods within individual cells of all the fuel spacers in the fuel bundle.
US07773716B2
A fast reactor having a reflector control system is provided which decreases the change in reactivity of the reactor core with time without controlling reflector lifting speed and a water flow rate. The reactor has a liquid metal coolant, a reactor core immersed therein, and a neutron reflector provided outside the core and is moved in a vertical direction for adjusting leakage of neutrons therefrom for controlling the reactivity of the core. The reflector described above is gradually moved in an upward direction with the change in reactivity caused by fuel burn-up, and at least a part of a lower region of the reflector is a high reflection region having a high neutron reflection ability as compared to that of the other region. The high reflection region is located between the bottom and one fourth and one half of the height of the neutron reflector.
US07773710B2
A method and system is provided for improving bit error rate (BER) performance in delay spread fading conditions, such as the fading associated with simulcast systems. BER is improved through novel symbol synchronization that comprises oversampling an input signal and filtering the samples to determine a composite symbol sample point that converges toward the center of the signal's effective eye pattern. The composite symbol sample point may be an average of previous composite symbol sample points and an instantaneous sample point determined based on samples from a synchronization field of the signal. The updated composite symbol sample point may be utilized for future sampling of the incoming signal.
US07773707B2
A tunable narrow band radio frequency (RF) filter (200) includes an RF input (225), an RF output (227), a capacitive network (201-209) for coupling the RF input (225) with the RF output (227) and an inductive network (219-223) for resonating the filter at a predetermined center frequency. A number of semiconductor devices such as varactor diodes (215, 217, 229, 233) are used for tuning respective capacitors in the capacitive network (201-209). A single voltage source (Vc) is used for tuning each one of the respective varactor diodes for moving the resonant frequency of the filter over a substantially wide frequency range.
US07773702B2
A receiver in an OFDM communication system includes a power detector and a gain controller. The power detector detects for total received power of a received OFDM signal, e.g., by computing the power of the data samples from an ADC and averaging the power. The gain controller adjusts the gain of the receiver in discrete gain steps and in one direction, e.g., from the lowest gain state to the highest gain state, based on the detected total received power. The gain controller initializes the receiver to the lowest gain state. Thereafter, the gain controller detects for low total received power, e.g., by comparing the detected total received power against a predetermined threshold. The gain controller transitions to a higher gain state if low total received power is detected and maintains the current gain state otherwise.
US07773701B2
The present invention comprises systems, methods, and devices for detecting the presence of a specified signal type by autocorrelating the signal with a time-delayed copy of itself, by simultaneously crosscorrelating the signal with an expected signal type, and by then comparing the results of the autocorrelation and crosscorrelation to determine whether or not the signal is present and to ascertain its type.
US07773700B2
Channel Equalization of a digital TV is disclosed. In channel equalization for restoring an original signal from a digital TV reception signal having passed through a channel, the present invention includes estimating an impulse response of the channel from a received signal having passed through the channel using conjugate-gradient algorithm, finding an equalizer coefficient in a frequency domain using the estimated impulse response of the channel, outputting a signal equalized by multiplying a signal resulting from transforming the received signal into the frequency domain by the found equalizer coefficient, and predicting to remove an amplified noise of the equalized signal using the conjugate-gradient algorithm in a time domain. Accordingly, the variation of the channel impulse response according to time can be tracked in the dynamic channel having fast channel variation as well as the static channel, whereby equalizing performance can be enhanced.
US07773699B2
A method and apparatus are provided for combining pilot symbols and Transmit Parameter Signalling (TPS) channels within an OFDM frame. The method uses Differential Space-Time Block Coding to encode a fast signalling message at an OFDM transmitter. At an OFDM receiver, the encoded fast signalling message can be decoded using differential feedback to recover information about the channel responses that would normally be carried by pilot symbols. In wireless data transmission employing adaptive modulation and coding, an instantaneous channel quality measurement, independent of the origin of interference for example, neighboring-cell interference, white thermal noise, or residual Doppler shift is provided. Using the correlation between a signal which has been symbol de-mapped, and one which has also been soft decoded and re-encoded, a channel quality indicator is produced. Another embodiment uses TPS data as pilot symbols by decoding TPS and then re-encoding.
US07773698B2
The invention relates to a radio receiver for receiving received signals transmitted by radio. The radio receiver includes a demodulation unit for demodulating the received signals and a first estimating unit for estimating the noise power of the received signals. The demodulation unit outputs the demodulated received signals as softbits and sets the weighting of the least significant softbit in dependence on the estimated noise power of the received signals.
US07773695B2
A circuit for amplitude modulating a carrier signal includes a carrier signal input, circuitry for splitting the carrier signal into first and second paths, circuitry for phase modulating the carrier signal on the first path, circuitry for phase modulating the carrier signal on the second path, and circuitry for combining the phase modulated carrier signal on the first path with the phase modulated carrier signal on the second path for generating an amplitude modulated output signal. Feedback loops virtually eliminate residual phase shift and make the amplitude modulated output signal linearly proportional to the baseband signal.
US07773691B2
Power control circuitry is provided for controlling an output power of a transmitter of a mobile terminal operating according to a continuous time transmit scheme such as Wideband Code Division Multiple Access (WCDMA). Transmit circuitry processes a quadrature baseband signal to provide a radio frequency transmit signal. The radio frequency transmit signal is coupled to the power control circuitry via a coupler and processed to provide a feedback amplitude signal. The power control circuitry operates to remove an amplitude modulation component from the feedback signal using a reference amplitude signal generated from the quadrature baseband signal, thereby providing a measured gain signal of the transmit circuitry. Based on the measured gain signal and a target output power, the power control circuitry operates to control a gain of the transmit circuitry such that the output power of the transmit circuitry is within a predetermined range about the target output power.
US07773687B2
A wireless apparatus 1 receives reception quality information, propagation environment information, and block error rate detection information from a wireless apparatus of the other end of communication together with a data signal, and the target error rate selecting unit 7 selects any one of a plurality of tables in which target block error rates of respective ones of a plurality of transmission modes are registered in accordance with propagation environment information. The threshold value control unit 8 controls the threshold value of the reception quality to select the transmission mode by the control amount on the basis of the target block error rate in accordance with error rate detection information. The transmission mode selecting unit 9 compares reception quality information with the threshold value, selects any one of the transmission modes, and makes the selected one into the transmission mode to the wireless apparatus of the other end of communication.
US07773682B2
A time from the start of a reception operation to the output of video, audio or the like is shortened. An OFDM reception apparatus is provided for receiving an OFDM signal composed of a plurality of carriers, comprising a fast Fourier transform section for converting a received time-domain OFDM signal into a frequency-domain OFDM signal, an equalization section for performing waveform equalization with respect to the frequency-domain OFDM signal, and outputting the waveform-equalized OFDM signal, and a modulation scheme estimating section for estimating a modulation scheme for a plurality of carriers constituting the waveform-equalized OFDM signal based on signal points of the plurality of carriers, and outputting an obtained estimation result. The OFDM reception apparatus performs a process for obtaining transmitted information with respect to the received OFDM signal, depending on the estimation result.
US07773680B2
System performance in wireless communication is improved by increasing diversity in time, space and frequency. Information to be transmitted is processed by a convolution encoder to produce encoded bits. The encoded bits are interleaved and mapped to subcarriers. Symbols are created from the subcarriers and the symbols are transmitted so as to increase diversity in time, space and frequency. Circulation transmission in addition to interleaving is used to increase diversity. For example, circulation transmission can be symbol based or subcarrier based.
US07773678B2
In a method for reducing the dynamic range of a multicarrier transmission signal (12′) which is formed in a transmitter and is composed of two or more carriers, the various signal structure timings of the carriers are determined. A delay unit (100; D0, D1, . . . , DN-1) is then used to set a delay profile between the signal structure timings of various carriers, in such a manner that the signal structures of different carriers or substructures of them are not aligned in time with respect to one another.
US07773677B2
Image block error concealing apparatus and methods in a mobile communication system can improve a picture quality. When a pixel/block has an error, a motion vector is generated by fast-motion-estimating a preceding frame and a subsequent frame, and the error-generated pixel/block can be restored using the motion-compensated pixel/block. Filtering can be performed by selecting first or second filters (e.g., an adaptive weight sum and an average sum) according to a difference value between the restored pixel/block and an average value of adjacent pixels/blocks, to refine the restored pixel/block.
US07773670B1
A method of content adaptive encoding video is disclosed. The method comprises segmenting video content into segments based on predefined classifications or models. Examples of such classifications include action scenes, slow scenes, low or high detail scenes, and brightness of the scenes. Based on the segment classifications, each segment is encoded with a different encoder chosen from a plurality of encoders. Each encoder is associated with a model. The chosen encoder is particularly suited to encoding the unique subject matter of the segment. The coded bit-stream for each segment includes information regarding which encoder was used to encode that segment. A matching decoder of a plurality of decoders is chosen using the information in the coded bitstream to decode each segment using a decoder suited for the classification or model of the segment. If scenes exist which do not fall in a predefined classification, or where classification is more difficult based on the scene content, these scenes are segmented, coded and decoded using a generic coder and decoder.
US07773666B2
Using DSL modems as data collectors, the modems processes the data to, for example, allow easier interpretation of the line characteristics. In particular, the modems postprocess the data including calibration, filter compensation, determination of the SNR medley from the bits and gains tables and rate conversion. The interpretation process uses the postprocessed data and determines loop characterization, interferer detection, a data reduction estimation and a data rate estimation. The outputs of these determinations least allow for the characterization of the line conditions between the two modems.
US07773663B2
A communication apparatus including: a despreading section despreading a reception signal with a spreading code defined in one communication system; a decoding section decoding the reception signal despread by the despreading section; and a first occupation detection section correlatively detecting an occupation state of a communication band with a preamble code defined in the communication system; and a second occupation detection section correlatively detecting an occupation state of a communication band of a signal of another communication system, the signal being expected to arrive as an interference wave, with a preamble code defined in the another communication system.
US07773641B2
An optically pumped disk type solid state laser oscillator includes: a cylindrical shape thin film laser gain medium having a through-hole; a ring mirror whose surface is opposing to a side surface of the thin film laser gain medium; a conical mirror arranged in the through-hole and reflects a light from the ring mirror to a direction perpendicular to the thin film laser gain medium where an output mirror is arranged. The ring mirror, the conical mirror and the output mirror compose a resonator for oscillating a laser beam to be outputted from the output mirror.
US07773638B2
A transmission device which selects all or a part of streams from among input streams and then transmits the selected streams, and includes a measuring section and an output control signal generating section. The measuring section inputs an output timing reference signal and an output reference clock required in outputting a stream, detects a time when the output timing reference signal indicates the start of output, and predicts a period in which an output transmission clock to be generated is to be paused. The output control signal generating unit N-frequency-divides (N is an integer of 2 or more) an output reference clock, generates an output transmission clock, and outputs an output timing signal having a predetermined phase correlation with an output transmission clock.
US07773637B2
A method and apparatus for simplifying a structure needed to delay data in delay units when a reference signal and data are transmitted by using chaotic signals are provided. The method includes delaying data by at least two delay times, wherein each of the delay times occurs sequentially; multiplexing the data, which has been delayed, according to a control signal; and transmitting the data and a reference signal which corresponds to the data at an interval of delay time. The apparatus includes a first delay unit which is configured to delay data for a first delay time; a second delay unit which is configured to delay the data output from the first delay unit for a second delay time; and a multiplexer which is configured to multiplex the data from the first and second delay units according to a control signal.
US07773635B2
Resources of two frequency division duplex (FDD) frequency bands at a distance from each other are allocated for transmissions by a time division duplex (TDD) transmission method. The resources in the first FDD frequency band are allocated for FDD transmissions in the uplink and for TDD transmissions predominantly in the uplink as the primary transmission direction, and in a secondary manner in the downlink as the secondary transmission direction. The resources in the second FDD frequency band are allocated for FDD transmissions in the downlink and for TDD transmissions predominantly in the downlink as the primary transmission direction and in a secondary manner in the uplink as the secondary transmission direction. No resources are allocated for time periods of an allocation of resources for one of the secondary transmission directions in the first and second frequency bands, for FDD transmissions in the counter transmission direction to this secondary transmission direction.
US07773634B1
Media and methods are provided for constructing data structures associating data segments in packets with reference identifiers to optimize bandwidth usage within a network during transmission. In one embodiment, a data structure is initialized to contain no data. A minimum length of a data segment to be examined is determined. For each packet in the transmission, data segments of the packet are examined. Data segments are added to the data structure as necessary. Examination is repeated along with an appropriate addition until the packet contains less data than a segment of the minimum length and further continued until all packets are examined. The data structure is constructed associating the portions of the packet and respective reference identifiers. In certain embodiments, the count can be a total count of frequently occurring segments, the count of unique segments or the count of packets containing unique segments. In other embodiments, the construction is accomplished by a compression library. In still other embodiments, one or more filtering criteria are added to the process to optimize efficiency. Embodiments are described where packet size, packet source, packet destination or proportion of alpha-numeric characters are used as the filtering criteria.
US07773631B2
A wireless communication system and method is provided for the transfer and processing of data in accordance with specialized data transfer protocols while utilizing conventional base station equipment. For example, the wireless communication system may include a subscriber station that provides for the modification of data packets in accordance with a proprietary protocol and the addressing of the modified data packets to a server. The server is adapted to reconstruct the data packets for transmission to other local subscriber stations or to a packet-switched network. In additional embodiments, the base station itself rather than a server operates to reconstruct the data packets.
US07773620B2
Provided are a method, system, and program for identifying overrun conditions in data reception, for example. As a receive buffer approaches capacity, received data packets may be truncated to a smaller size. For example, header information may be saved but payload data discarded. The truncated packets may be used to facilitate sending acknowledgments to trigger resending of lost or dropped packets.
US07773616B2
Systems and methods for communicating on a richly-connected multiprocessor computer system using a pool of buffers for dynamic association with a virtual channel. Packets are communicated in a multiprocessor computer system having a large plurality of processing nodes interconnected by a defined interconnection topology, in which a communication from a source processing node to a target processing node may pass through one or more intermediate nodes en route to the target processing node. A set of virtual channels is associated for each link in the interconnection topology. A first subset of buffers is dedicated for fixed correspondence to virtual channel identifiers, and a second subset of buffers is dedicated for dynamic allocation and assignment to virtual channels.
US07773613B2
A switch 1 having a tag VLAN function includes a plurality of physical ports P1, P2 . . . , and adds an ID tag unique to each physical port to the header of a packet received by the physical port and sends the packet, and on the other hand, refers to an ID tag attached to a packet received from a GW 2 and sends the packet to a physical port corresponding to the ID tag. The GW 2 searches for a server address corresponding to the ID tag attached to the packet received from the switch 1 and modifies a destination address of the packet into the server address. In addition, the GW 2 attaches an ID tag corresponding to a source address of the packet received from the shared server 3 to the received packet, and modifies the source address of the packet into a GW address.
US07773609B2
An overlay network system comprises an overlay network composed of a plurality of nodes and a plurality of sub-overlay networks each of which is composed of a subset of the plurality of nodes and which are hierarchized. The overlay network is managed as a 0th-level sub-overlay network at the highest hierarchical level. Each of the plurality of sub-overlay networks is allocated a sub-overlay network ID whose number of bits corresponds to the hierarchical level of the network. The high-order one or more bits in the sub-overlay network ID also indicate the sub-overlay network ID of a sub-overlay network at the high hierarchical level corresponding to the number of the one or more bits.
US07773604B2
A hardware-based policy engine that employs a policy cache to process packets of network traffic. The policy engine includes a stream classifier that associates each packet with at least one action processor based on data in the packet, and the action processor further acts on the packets based on the association determined by the stream classifier.
US07773603B2
A packet communication system includes a first communication apparatus and a second communication apparatus. The first communication apparatus generates one or more data packets each having its data volume not more than a prescribed data volume, and transmits the generated data packets to the second communication apparatus. The second communication apparatus receives the data packet transmitted from the first communication apparatus, in order of transmission. The first communication apparatus generates the data packets to be transmitted to the second communication apparatus such that one of the data packets to be last transmitted is a short packet having its data volume less than the prescribed data volume, and each of the data packets other than the data packet to be last transmitted has its data volume equal to the prescribed data volume. The second communication apparatus determines whether or not the data packet received each time is a short packet. Thereby, the second communication apparatus can determine that the data packet transmitted last has been received.
US07773597B2
A system, method, apparatus and machine-readable medium for stashing an information packet, received by a network interface device, are provided. The method includes i) extracting information from the received information packet; ii) determining the stashing size of the information packet; and iii) stashing the information packet, based on the determined size. The information can be extracted from the layer-2, layer-3 and layer-4 headers and trailers of the information packet. Dynamic stashing results in an enhanced performance of the communication systems.
US07773590B2
Mechanisms for programming and performing combined interface and non-interface specific associative memory lookup operations for processing of packets are disclosed. One system includes multiple interfaces, a content-addressable memory, multiple memory entries and a lookup mechanism. The content-addressable memory includes multiple interface independent entries, multiple first interface dependent entries corresponding to the first interface, and multiple second interface dependent entries corresponding to the second interface. The lookup mechanism is configured to initiate lookup operations in order to produce the interface independent and interface dependent results.
US07773587B2
The invention includes a device and a method for testing a communication network that includes an Internet Protocol (VoIP) network. The inventive device includes a user interface for communicating results of a test, a transceiver for allowing the test device to communicate with a telecommunications network, and a digital signal processor for reformatting a communication signal to be tested by the device. The digital signal processor may include at least one coder/decoder that uses various compression protocols including wherein the digital signal processor uses at least one of the following data compression techniques: G.711a-law, G711μ-law, G.720, G.723.1, G.726, G.728, G.729, G.729A, and G.729AB2. The transceiver also may be a power line modem. The inventive device may include a processor, random access memory, read only memory, a user interface, and a network interface. The inventive method for testing the VoIP network includes accessing a telecommunications network that includes the VoIP network, conducting tests on the VoIP network using a butt set device, and displaying results of the test on the user interface located on the test device. The present invention may also comprise a power line communication VoIP network telephone.
US07773586B1
Configuration data within a Signal Transfer Point (STP) is updated to support a new trunk line in an automatic fashion by a computer system. A user is prompted for a first and second point code for switches on either end of the new trunk line, and the identity of one or more STPs is determined from the second point code. One or more linksets are determined from the first and second point codes. Network configuration data is then retrieved from the STPs, and linksets corresponding to the first point code are determined. New signaling data to support the new trunk line is automatically generated from the point codes and the linksets, and the new signaling data is inserted into the configuration data. The modified configuration data is then stored back into the STPs.
US07773585B2
A method for signaling an Integrated Messaging System (IMS) on an Internet Protocol (IP) based network to deposit a message, including the steps of sending a Session Initiation Protocol (SIP) SIP INVITE request to the IMS indicating a message deposit action; receiving a corresponding SIP message from the IMS agreeing to participate in the message deposit action; and sending an SIP acknowledge message to the IMS confirming receipt of the corresponding SIP message; and depositing the message in a destination mailbox. A method of signaling an IMS on an IP based network to retrieve a deposited message, the method including the steps of sending a SIP INVITE request to the IMS indicating a message retrieval action; receiving a corresponding SIP message from the IMS agreeing to participate in the message retrieval action; sending an SIP acknowledge message to the IMS confirming receipt of the corresponding SIP message; and retrieving the deposited message from a mailbox corresponding to known account information.
US07773583B2
To provide a thin client (TC) system at least capable of using a thin client terminal as a telephone terminal in a thin client system. In a personal TC (PTC) system consisting of a PTC server with a server side telephone control section consisting of a call control section, and a PTC terminal with a terminal side telephone control section consisting of a device control section and a voice packet communication section, and a handset connected to the PTC terminal, this is achieved by notifying an IP address of the PTC terminal as an communication target IP address to be notified upon call connection, and notifying the PTC terminal an IP address of a telephone terminal.
US07773572B2
In one embodiment a pico cell may be used to detect a presence of a wireless device and receive a wireless signal from the wireless device. The wireless signal may then be converted from a protocol used by the wireless device to a converted signal in a protocol suitable for use with a broadband connection. The converted signal may then be transmitted over the broadband connection.
US07773565B2
A method for multiple input multiple output wireless communication begins by determining protocols of wireless communication devices within a proximal region. The method continues by determining whether the protocols of the wireless communication devices within the proximal region are of a like protocol. The method continues by determining the number of transmit antennas. The method continues, when the protocols of the wireless communication devices within the proximal region are of the like protocol, formatting a preamble of a frame of the wireless communication utilizing at least one of cyclic shifting of symbols, cyclic shifting of tones, sparse tone allocation, and sparse symbol allocation based on the number of transmit antennas.
US07773563B2
An apparatus and method for determining a vertical handoff for a node supporting a WLAN and an IEEE 802.16 communication system are provided. Reception of a handoff request message from the node is monitored, an expected change in the total throughput of the WLAN in the case where the node is connected to the WLAN is calculated and compared with zero, and if the throughput change is equal to or greater than zero, the handoff request of the node is acknowledged and the node is handed off to the WLAN.
US07773562B2
A wireless communication system, method and apparatus are provided for soft and softer handover of a mobile wireless transmit/receive unit (WTRU) between two or more base stations and/or base station sectors. A network control unit assigns selected base stations to transmit communication data to the WTRU based on the WTRU being disposed in base station or base station sector geographic range of service. A joint detector (JD) receiver is configured to receive and process one or more wireless data signals in each of a series of timeframes where each signal received within a common timeslot has a unique channel encoding of the same communication data. The JD receiver has a plurality of channel estimators that estimate received signals within a common timeslot and a combiner configured to decode and combine the channel estimates to derive a resultant data signal.
US07773547B2
A method and apparatus for requesting PPP instances from a packet data services network includes a mobile station configured to send an origination message to a packet data service node (PDSN) at which it has arrived upon leaving the vicinity of another PDSN. The message informs the new PDSN of the new location of the mobile station and indicates both the number of dormant PPP instances associated with the mobile station and a service reference identifier for each such PPP instance. A flag within the message may be used to indicate whether the PPP instances are dormant (i.e., whether the mobile station is engaged in a call).
US07773543B2
A method is provided for determining the length of node-to-node links in a computer network. The method includes measuring the forwarding time for each node-to-node link in the network, eliminating queuing time from each forwarding time measurement, determining and subtracting store-forward time from each forwarding time measurement, determining and subtracting execution time from each forwarding time measurement to obtain a propagation time for a signal being transmitted on each node-to-node link and, based upon the propagation time for each node-to-node link, calculating a length of each node-to-node link. A network map may also be derived by identifying internal nodes in the network, translating each store-forward time into a hop count, constructing a connectivity map of the network including a connection map of internal nodes and superimposing the calculated link lengths onto the connectivity map to determine cable length between any internal nodes with more than two connections.
US07773539B2
The present invention provides a mechanism and a method for indirectly controlling a router interface from an optical management system in an IP-optical network. A mechanism is provided for controlling a router interface from a management system indirectly, by using optical equipment as a proxy and communicating between the optical gear and router via a peer-to-peer signaling protocol. The present invention provides a management method that allows separate management systems for the optical layer and the IP layer and a method for managing the network across the domains.
US07773530B2
Methods, apparatuses and systems directed to a network traffic synchronization mechanism facilitating the deployment of network devices in redundant network topologies. In certain embodiments, when a first network device directly receives network traffic, it copies the network traffic and transmits it to at least one partner network device. The partner network device processes the copied network traffic, just as if it had received it directly, but, in one embodiment, discards the traffic before forwarding it on to its destination. In one embodiment, the partner network devices are operative to exchange directly received network traffic. As a result, the present invention provides enhanced reliability and seamless failover. Each unit, for example, is ready at any time to take over for the other unit should a failure occur. As discussed below, the network traffic synchronization mechanism can be applied to a variety of network devices, such as firewalls, gateways, network routers, and bandwidth management devices.
US07773528B2
A packet measuring system and method for sending and receiving a test packet between a plurality of probes located in networks of different protocols. The system includes a packet sending unit for embedding communication information used for a transmission quality measurement in a payload field of a test packet and sending the test packet to an opposite probe, and a packet extracting unit for receiving the test packet sent by the opposite probe and extracting the communication information from the payload field of the test packet.
US07773523B2
A data receiving portion receives data from a network. A filtering portion classifies the data received at the data receiving portion by flow. A condition monitoring portion monitors, for each flow, ACK-number information and SN-number information of the received data. A quality-determining portion determines whether or not a packet loss has occurred and the position of occurrences of packet losses, on the basis of information from the condition monitoring portion.
US07773520B2
Wireless networks are becoming increasingly heterogeneous in terms of the processing capabilities of network users' receiving equipment. According to embodiments of the invention, in a communications network comprising a plurality of receivers with different data reception rate capabilities, data frames targeted to respective receivers may be transmitted to the receivers in accordance with the respective data reception rate capabilities of the receivers.
US07773519B2
A method and system to manage network congestion are provided. In one example embodiment, the system comprises a congestion point queue, a monitor to sample a state of the congestion point queue, a consolidated parameter generator to generate a consolidated feedback parameter, and a feedback message generator to generate a feedback message, utilizing the consolidated feedback parameter. The congestion point queue may be configured to queue messages from a reaction point to a congestion point. The state of the congestion point queue may be reflected by an equilibrium queue level, a queue offset, and a rate of change of a size of the congestion point queue. The equilibrium queue level may represent a particular predetermined size of the congestion point queue. The queue offset may represent a deviation from the equilibrium queue level. The consolidated feedback parameter may be generated to reflect the queue offset and the rate of change of the size of the congestion point queue.
US07773514B2
Systems and methods are disclosed for providing resilient flow control in the context of the Universal Mobile Telecommunication System (UMTS) and in other contexts. In one embodiment, a method is provided for managing access to a network resource such as a forward access channel. Upon receiving a request from an entity such as a radio network controller to use the network resource, a set of credits is allocated to the entity. Periodically, the credits that have been allocated are reviewed, and revoked if they have not been used within a predefined period of time.
US07773512B2
A bandwidth control method is adapted for use in a network device having a system clock. The network device has a register for storing a transmittable data amount to control bandwidth. The method includes: calculating a number of elapsed periods of the system clock so as to change a counting value every predetermined time interval, the counting value being cyclic within a specific range; adjusting the transmittable data amount in the register by a first unit amount when the counting value reaches a first count value; and adjusting the transmittable data amount in the register by a second unit amount after adjusting the transmittable data amount by the first unit amount and elapse of the predetermined time interval and when the counting value corresponds to a second count value. The first count value is different from the second count value, and the first unit amount is different from the second unit amount.
US07773510B2
A multi-level classification scheme for classifying subscriber traffic at a network node coupled between subscribers of network services and providers of the network services includes two levels of classification. The subscriber traffic is received at the network service node. A first portion of the subscriber traffic is selectively routed from a plurality of first level routers to a plurality of second level routers within the network service node. The first portion of the subscriber traffic is then selectively routed from the second level routers to network applications executing within the network service node for processing.
US07773505B2
Embodiments of the present invention provide packet timing recovery stress testing by generating packet delay variation (PDV) with a uniformly distributed probability density function (PDF). A delay-step method determines a delay for each packet in a stream of packets generated at a regular interval. In the delay-step method, delay-steps are determined for each packet based on delay target values. To generate PDV with a uniform PDF, the delay target values are randomly selected based on a pre-biased PDF which is a uniform distribution that is pre-biased by a pre-bias function. The pre-bias function increases the values of small delay target values so that an increased number of delay target values are at the extremes of the uniform distribution, which causes the delay-step method to result in a PDV with a uniform distribution.
US07773502B2
In a wireless communication network providing voice and data services, one or more entities in the network, such as a base station controller and/or radio base station, can be configured to reduce data services overhead responsive to detecting a congestion condition, thereby increasing the availability of one or more network resources for voice services. In one or more exemplary embodiments, one or more current data services users are targeted for modification of their ongoing data services to effect the reduction in data services overhead. Modifications can include, but are not limited to, any one or more of the following: forward or reverse link data rate reductions, and shifting of forward or reverse link traffic from dedicated user channels to shared user channels. Targeting of users for service modification can be based on reported channel quality information. For example, users reporting poor radio conditions can be targeted first for service modifications.
US07773501B2
The present invention is directed towards systems and methods of routing payload data in a communications system. Specifically, the payload data is routed using a source address. The destination node(s) utilize a dynamically-stored look-up table indicating the source address when the payload data is to be dropped at that node(s).
US07773497B2
Superimposing phantom-mode signals reinforces existing differentially driven DSL downstream signals in a vectored binder of DSLs or reinforces upstream vectored signals in a binder of differentially excited twisted pairs, thus expanding the extra transmission modes of the previous GDSL multi-wire two-sided-excitation invention to the case where coordination can only occur on one-side of the binder. Each pair is treated as a common-mode antenna with respect to earth ground, with some pairs selectively excited at the transformer center tap at the transmit end with respect to a common (earth or chassis) ground reference. Corresponding receivers on other non-excited pairs sense the signals between their center taps and a ground at the opposite ends of the lines to the exciting transmitters. A dual use with hybrid circuits allows the receiving circuit to also have an upstream transmitter and an upstream-sensing receiver on the center tap of the opposite side of an adjacent wire.
US07773496B2
An optical disk apparatus for use with the combination type optical disk medium comprises an optical head capable of accessing the first and second recording layers and reading recording marks, a demodulator for applying a demodulation process to a signal read out of the first or second recording layer, an address converter for deciding from an optical disk reproduction instruction a recording layer to be accessed and performing conversion to a physical address of the recording layer, a reproduction controller following the recording layer determination and the physical address to control the optical head and the demodulator so as to control access and reproduction to and from the optical disk medium, and an instruction generator for generating an instruction to reproduce the optical disk.
US07773491B2
An optical disc recording apparatus records external data on an optical disc by using a semiconductor laser. The optical disc recording apparatus includes a circuit board. The circuit board is mounted with a power supply source and an MCM (multi chip module). The power supply source outputs at least one power voltage including a first voltage, and the MCM receives the at least one power voltage including the first voltage output from the power supply source. The MCM includes a first circuit and a second circuit. The first circuit includes at least one power supply circuit which generates at least one power voltage including a second voltage. The second circuit receives the at least one power voltage including the second voltage output from the at least one power supply circuit of the first circuit. An optical disc recording method is also described.
US07773490B2
An optical compensator is included in an optical scanning device for scanning optical record carriers. There are at least two different information layer depths within two different carriers. The scanning device produces first to third radiation beams respectively having different wavelengths for scanning first to third record carriers, respectively. The optical compensator has a non-periodic phase structure through which each radiation beam is arranged to pass. The non-periodic phase structure includes stepped annular zones separated by steps. The zones form a non-periodic radial pattern. The stepped annular zones introduce first to third different wavefront modifications into at least part of the first to third radiation beams, respectively. Radial height variations are included in the stepped annular zones, and are arranged such that non-zero contributions are provided to each wavefront modification by the optical compensator in each stepped annular zone.
US07773487B2
A method is disclosed to determine an optimal optical detector orientation to decode information encoded holographically. The method supplies a matched filter, an orientation image, a holographic data storage medium encoded with the orientation image, and an optical detector comprising a moveable input screen comprising a plurality of detector elements. The method positions the input screen in a plurality of input screen orientations and calculates a correlation factor for each of the input screen orientations. The method determines an optimal optical detector orientation using the plurality of correlation factors.
US07773482B2
A record carrier of a disc-like optically inscribable type, has a preformed track in which an auxiliary signal including a sequence of codes recorded by a preformed track modulation. The codes include a sequence of address codes specifying the addresses of the track portions in which the address codes are recorded and special codes. The special codes can be distinguished from the address codes and specify control data for controlling a recording by a recording device. The record carrier is provided with an extended area preceding a program calibration area. The extended area includes special codes representing additional control information for controlling the recording.
US07773477B2
An optical disk driving unit includes a pickup configured to supply a drive current to a laser unit, and to irradiate a laser beam to an optical disk. A plurality of signal lines are configured to transmit control information of the drive current to the pickup. A pickup controller is configured to control operation of the pickup by transferring control data to the pickup via the signal lines when the drive current is a constant value.
US07773476B2
An aspect of the present invention provides an apparatus for reproducing encoded data that includes a data analyzer configured to analyze an encode method of the encoded data to reproduce, a controller configured to receive a seek command and a target time to seek, calculate a seek controlling bit rate according to a part of the encoded data, and compute, according to the calculated seek controlling bit rate, a data size corresponding to the target time to seek, and a decoder configured to skip the encoded data for the computed data size by the controller and decode, based on the analyzed encode method by the data analyzer, the encoded data after the end of the skipped part thereof.
US07773471B2
A recording apparatus and a recording method are provided. Control information is generated by the microcontroller based on the received command. The data preparing unit has a control register and a preparing circuit, wherein the control register is used for storing a set of control register values corresponding to the control information, and the preparing circuit is used for generating prepared data based on the set of control register values and storing the prepared data in the data buffer. The recording circuit records on an optical storage media based on the prepared data. The optical storage media has a lead-in area having a plurality of continuous zones. The prepared data includes a plurality of data to be written into the corresponding zones and the plurality of data are stored in the data buffer in the same sequence as the writing sequence to the zones and are read continuously.
US07773464B2
An elapsed time and remaining time liquid crystal measuring device having a display face around the periphery of which there are a plurality of numerical indicia marks arranged in a generally clockwise pattern with successive numerical indicia marks decreasing in numerical value in a clockwise direction from a twelve o'clock position. An annular ring of electronically generated graphic indicia are visible on the display face and spaced inwardly from the peripheral numerical indicia and a digital numerical read-out display of elapsed times is visible internally of the annular ring of graphic indicia. There is at least one electronic control element for setting a desired elapsed set time into the device, which desired elapsed set time is indicated both on the digital read-out display and as a complete ring or an arcuate section of the annular ring on the display face. There is also an actuator for initiating progressive clockwise disappearing movement of the electronically generated graphic indicia so as to expose decreasing areas of the annular ring in a clockwise direction as time elapses and while the digital numerical display remains synchronized with the graphic indicia until all of the set time has elapsed. Preferably, the device is in the form of a wrist watch.
US07773461B1
Method and apparatus for a tennis watch having a watch-like case containing a central processing unit and an input/output controller connected to the central processing unit, a display driver that takes data from the central processing unit and converts it into the electrical signals required by the alphanumeric display, a program read only memory ROM connected to the central processing unit wherein the ROM contains the operating program for the tennis watch and a clock circuit connected to the CPU. The tennis watch case also comprises an alphanumeric screen having an luminescent background which displays various tennis related data controlled by a plurality of buttons disposed on the watch case.
US07773454B2
A method and apparatus useful to determine the integrity of a cement bond log disposed in the annular space between a casing and a wellbore. The method and apparatus produce a transversely polarized shear wave and emit the wave through the casing and into the wellbore. The transversely polarized shear wave attenuates upon passage through the cement bond log. The integrity of the cement bond log can be determined through an analysis and evaluation of the attenuation results.
US07773448B2
A semiconductor memory device having multiple banks each including multiple memory blocks arranged in column and row directions. The memory blocks are divided into multiple memory block groups each sharing a corresponding column select signal. The memory blocks belonging to the respective memory block groups are arranged adjacently in the column direction. Multiple global input/output lines are separately connected to the memory block groups of the respective banks to transfer data of the memory blocks belonging to the respective memory block groups in a time division manner.
US07773447B2
A memory circuit of the invention comprises N look-up tables for implementing a desired logic function of L inputs/M outputs by partitioning a memory cell array including a plurality of memory cells into portions each corresponding to at least a predetermined number of input/output paths; a decode circuit for selecting one of the N look-up tables by decoding a look-up table select signal and for selecting M memory cells to be accessed included in the selected look-up table by decoding an L-bit logic input signal of the logic function; and a select connect circuit for selectively connecting the input/output paths of the M memory cells to be accessed with an input/output bus for transmitting an M-bit logic output signal of the logic function in response to a decoded result of the decode circuit.
US07773445B2
A circuit for determining the value of a datum stored in an array memory cell of a non-volatile memory device having at least one reference memory cell of known content. The circuit has a determination stage, which compares an array electrical quantity, correlated to a current flowing in the array memory cell, with a reference electrical quantity, and supplies an output signal indicative of the datum, based on the comparison; and a generator circuit, provided with an input receiving a target electrical quantity correlated to a current flowing in use in the reference memory cell, and an output, which supplies the reference electrical quantity with a controlled value close or equal to that of the target electrical quantity. The generator circuit is provided with a variable generator, and a control unit connected to, and designed to control, the variable generator so that it will generate the controlled value of the reference electrical quantity.
US07773443B2
A memory array includes a sensing circuit for sensing bit line current while keeping the voltage of the selected bit line substantially unchanged. The word lines and bit lines are biased so that essentially no bias voltage is impressed across half-selected memory cells, which substantially eliminates leakage current through half-selected memory cells. The bit line current which is sensed arises largely from only the current through the selected memory cell. A noise detection line in the memory array reduces the effect of coupling from unselected word lines to the selected bit line. In a preferred embodiment, a three-dimensional memory array having a plurality of rail-stacks forming bit lines on more than one layer, includes at least one noise detection line associated with each layer of bit lines. A sensing circuit is connected to a selected bit line and to its associated noise detection line.
US07773442B2
A complementary field-effect (CMOS) circuit is provided which includes a current-limiting device arranged along a power-supply bus or a ground bus of the circuit. The current-limiting device is configured to prevent latch up of the CMOS circuit. More specifically, the current-limiting device is configured to maintain a junction of the parasitic pnpn diode structure as reverse-biased. A method is also provided which includes creating a current-voltage plot of a pnpn diode arranged within a first CMOS circuit which is absent of a current-limiting device arranged along a power bus of the circuit. In addition, the method includes determining a holding current level from the current-voltage plot and sizing a current-limiting device to place along a power bus of a second CMOS circuit comprising similar design specifications as the first CMOS circuit such that the current through the second CMOS circuit does not exceed the holding current level.
US07773438B2
An integrated circuit including an array of memory cells, volatile storage, non-volatile storage and a circuit. The circuit is configured to sense first addresses of first defective memory cells from the non-volatile storage to obtain sense first addresses. The circuit detects second defective memory cells via the sense first addresses and stores second addresses of the second defective memory cells in the volatile storage and in the non-volatile storage.
US07773437B2
A design structure embodied in machine readable medium used in a design process includes a system for implementing a memory column redundancy scheme. The system comprises a core array having a plurality of columns and a redundancy column each configured for reading or writing a bit of information and circuitry for steering around a defective column in the core array, wherein the circuitry includes one column multiplexor, which results in having the memory column redundancy scheme include one multiplexing stage.
US07773434B2
A delay circuit is capable of securing a constant delay time in spite of a process variation as well as voltage and temperature variations. Using the delay circuit that secures a sensing margin time in spite of process, voltage and temperature variations, a semiconductor memory device is capable of amplifying desired data within a preset RAS to CAS delay (tRCD). The delay circuit includes a delay unit including a current source controlled by a bias voltage, a delay time of the delay unit being changed depending on current amount of the current source, and a bias voltage generating unit configured to divide a power supply voltage using a first resistor to generate the bias voltage, wherein the delay unit includes a second resistor inserted into a current path of the current source.
US07773426B2
Erasing is performed with respect to a nonvolatile memory cell without causing depletion halfway therethrough. A control circuit for reversibly and variably controlling the threshold voltage of the nonvolatile memory cell by electrical erasing and writing controls an erase process of performing erasing to the plurality of nonvolatile memory cells assigned to one unit in an erase operation, a first write process of performing writing to the nonvolatile memory cell exceeding a pre-write-back level before a depletion level, and a second write process of performing writing to the nonvolatile memory cell exceeding a write-back level after the first write process. Since the occurrence of depletion is suppressed by successively performing the first write process with respect to the nonvolatile memory cells which may exceed the depletion level in the erase process, erasing can be performed to the nonvolatile memory cell without causing depletion halfway therethrough.
US07773424B2
A circuit for a nonvolatile memory cell can include a charge-altering terminal and an output terminal. The circuit can also include a first transistor having a gate electrode that electrically floats and an active region including a current-carrying electrode, wherein the current-carrying electrode is coupled to the output terminal. The circuit can further include a second transistor having a first electrode and a second electrode, wherein the first electrode is coupled to the gate electrode of the first transistor, and the second electrode is coupled to the charge-altering terminal. When changing the state of the memory cell, the second transistor can be active and no significant amount of charge carriers are transferred between the gate electrode of the first transistor and the active region of the first transistor. Other embodiments can include the electronic device itself and a process of forming the electronic device.
US07773419B2
In a NOR flash memory device with a serial sensing operation, and method of sensing data bits in a NOR flash memory device, the device includes a multilevel cell, a sense amplifying circuit, a data buffer, a data latch circuit, and a control logic circuit. The sense amplifying circuit serially detects plural data bits stored in the multilevel cell. The data buffer is provided to buffer the data bit detected by the sense amplifier. The data latch circuit stores an output value of the data buffer for a time. The control logic circuit regulates the sense amplifying circuit to detect a lower data bit stored in the multilevel cell in response to a higher data bit held in the data latch. Here, the control logic circuit initializes an output terminal of the data buffer before or while sensing each of the plural data bits by the sense amplifier. According to the invention, a stabilized serial sensing operation can be conducted because the data line is conditioned to a uniform charge level regardless of the level of the data bit previously sensed.
US07773405B2
A magnetic random access memory includes: a first and second wirings, a plurality of third wirings, a plurality of memory cells and a terminating unit. The first and second wirings extend in a Y direction. The plurality of third wirings extends in an X direction. The memory cell is provided correspondingly to an intersection between the first and second wirings and the third wiring. The terminating unit is provided between the plurality of memory cells and connected to the first and second wirings. The memory cell includes transistors and a magnetoresistive element. The transistors are connected in series between the first and second wirings and controlled based on a signal of the third wiring. The magnetoresistive element is connected to a wiring through which the transistors are connected. At a time of a writing operation, when the write current 1w is supplied from one of the first and second wiring to the other through the transistors, the terminating unit grounds the other.
US07773403B2
High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable element size of the process being used. Spacers are formed that serve as a mask for etching one or more layers beneath the spacers. An etch stop pad layer having a material composition substantially similar to the spacer material is provided between a dielectric layer and an insulating sacrificial layer such as silicon nitride. When etching the sacrificial layer, the matched pad layer provides an etch stop to avoid damaging and reducing the size of the dielectric layer. The matched material compositions further provide improved adhesion for the spacers, thereby improving the rigidity and integrity of the spacers.
US07773398B2
A DC power source device is provided which comprises conduction detectors 17, 18 for producing detection signals VP1, VP2 during the detective period of rectification MOS-FETs 15, 16 and timer circuits 19, 20 connected to polarity detectors 17, 18. Timer circuits 19, 20 count output time of detection signal VP1, VP2 from polarity detectors 17, 18 until electric current through one of rectification MOS-FETs 15, 16 comes to zero, and turns the other of rectification MOS-FETs 15, 16 off immediately before termination of the counted time so that timer circuits 19, 20 can reliably turn rectification MOS-FETs 15, 16 off during the conductive period of forward current flow for efficient synchronous rectification.
US07773396B2
Method for synchronizing inverter units (INU11, INU12) that are connected in parallel and supply a motor, and a parallel connection arrangement, in which motor is either one winding, which is supplied by inverter units connected in parallel, or a plurality of parallel windings, in which each winding is supplied by its own inverter unit, in which parallel connection one inverter unit functions as a master and the others as slaves, in which method a telecommunications bus is arranged between the units, and in which each inverter unit has its own modulation cycle counter, which are synchronized with each other on the basis of telecommunications messages, preferably serial telecommunications messages. In the invention all the inverter units take into memory the value of their own modulation counter at the termination time of a telecommunications message (Mes2), the master inverter unit sends the reading of its own counter in the following message to the other inverter units, and the other inverter units correct the reading notified by the master on the basis of the readings of their own modulation counters in the direction that makes the counters operate as simultaneously as possible.
US07773394B2
An AC/DC power supply with over-voltage protection includes a voltage converting circuit and a digital latch control circuit. The voltage converting circuit has a first-side winding, a second-side winding, and an auxiliary winding for providing a supply voltage according to the AC input voltage. The digital latch control circuit is coupled to the voltage converting circuit and utilized for latching a voltage level of the supply voltage at a first predetermined level according to an over-voltage protection (OVP) trigger signal, where the voltage converting circuit is disabled when the voltage level is latched at the first predetermined level.
US07773392B2
A primary side is provided with an oscillation circuit arranged to turn on a power switch at a constant cycle. The secondary side is provided with an on period control circuit arranged to output an off signal for turning the power switch off by detecting output voltage and comparing with a reference triangle wave signal. An isolated signal transfer circuit is provided between the primary side and secondary side to transfer an on signal. The primary side is provided with a power switch off circuit arranged to turn off the power switch based on the on signal.
US07773381B2
A semiconductor device includes: a first output unit configured to output a first phase; a second output unit configured to output a second phase different from the first phase, the second output unit being disposed to be stacked on the first output unit; and a controller configured to control the output units.
US07773379B2
A module assembly includes a component housing having a plurality of walls forming a cavity. At least one of the walls includes an opening therethrough open to the cavity. The heat transfer plate is mounted within the opening of the component housing and his exposed on an exterior of the component housing. The heat transfer plate forms at least a portion of a mounting surface of the component housing.
US07773375B1
A computer assembly having a processor integrated circuit, a hard disk drive electrically connected to the processor units and a power supply assembly, powering the processor integrated circuit and hard disk drive. These components are sealed in an liquid-tight case defining fluid channels. Electrical connectors permit connection of the processor to outside devices. Finally, a fan in the liquid-tight case, adapted to drive fluid through the fluid channel, thereby facilitates the movement of heat through the computer assembly and creates a monolithic thermal structure. In one embodiment, the computer assembly is powered by a raw DC power supply input and self manages this power input source to provide consistent and reliable power to the computer assembly without burdening the raw DC power supply during transient conditions.
US07773374B2
A slide mechanism (100) used in portable electronic device (300) is described including a main plate (10), a slide plate (20), two sliders (40), and two guiders (30). The slide plate is installed on the main plate and slidable relative to the main plate. The sliders are securely attached to the slide plate, and the guiders are securely attached to the main plate deformably guiding the sliders to move along it. When the slide plate slides along the main plate, the sliders and the guiders compress with each other, thereby generating deformations therebetween and driving the sliding of the slide plate along the main plate.
US07773366B2
A solid electrolytic capacitor comprising an anode body, a dielectric layer placed on the surface of the anode body, a conductive polymer layer placed on the surface of the dielectric layer, and a housing accommodating at least the anode body, the dielectric layer and the conductive polymer layer, wherein a water-retaining layer having higher water absorption than that of the housing is placed between the conductive polymer layer and the housing.
US07773365B2
One embodiment of a dielectric material may include a metal containing cation and a polyatomic anion.
US07773360B2
Fault protection is provided with fuse saving in a power distribution system. An operating characteristic of a fault protection device protecting a portion of the power distribution system is configured in view of fuse melting characteristics. In this manner, fault protection is provided with fuse saving, when possible, with reduced service disruptions.
US07773358B2
Overcurrent and overload protection for the power output of a pulse-width-modulated digital audio system is disclosed. The overcurrent protection circuitry includes a latch that is set in responsive to output current from the power output stage that exceeds an overcurrent threshold; the output of the latch gates the pulse-width-modulated control signal to block power output for the remainder of the current pulse-width-modulated cycle; upon the end of the cycle, or the beginning of the next, the latch is cleared to enable power output in that next cycle. Overload protection is provided by circuitry including counters for counting the relative number of overcurrent cycles to normal, non-overcurrent cycles, and generating an overload signal to block power output in the event of too frequent overcurrent cycles.
US07773351B2
An object of the present invention is to improve safety of a motor by instantaneously detecting the abnormality of a PWM signal. To achieve the object, provided is a motor control microcomputer for outputting PWM signals to a motor drive circuit driving a motor, which includes an abnormal signal detection circuit and a PWM signal stop circuit. The abnormal signal detection circuit receives inputs of positive-phase and negative-phase signals of the PWM signals, detects that both of the positive-phase and negative-phase signals are at the H level, and then outputs detection signals. The PWM signal stop circuit receives the detection signals from the abnormal signal detection circuit, and stops the outputs of the PWM signals.
US07773350B2
A power converter controller circuit is disclosed. In one aspect, a power converter controller circuit includes a control circuit to generate a switching signal to be coupled to a power switch to control power delivered to an output of a power converter. A timing circuit is to be coupled to the power switch and coupled to receive a feedback signal and the switching signal. The timing circuit is to disable the power switch from receiving the switching signal in response to the feedback signal after detection of a fault condition. The feedback signal repeatedly transitions between first and second states in response to the output when the power supply operates normally. The feedback signal maintains its state when the power supply is in the fault condition. The feedback signal transitions between the first and second states independently from the switching signal.
US07773346B1
A disk drive includes a drive circuitry, a storage disk and a slider. The storage disk has a data surface, and the slider magnetically interacts with the storage disk to transmit a signal between the storage disk and the drive circuitry. The slider includes a leading surface, an opposed trailing surface, a data transducer positioned near the trailing surface, and a piezoelectric element. The piezoelectric element receives a driving voltage from the drive circuitry to adjust a distance between the data transducer and the data surface. The piezoelectric element can form a portion of the trailing surface. The slider includes a slider body that forms a portion of the trailing surface, and a portion of the piezoelectric element can be coplanar with the portion of the trailing surface formed by the slider body. Further, at least a portion of the piezoelectric element can be constrained by the slider body. The piezoelectric element can include an exposed surface that is substantially parallel with the leading surface. The slider body can have an element cavity that completely receives the piezoelectric element. In one embodiment, the piezoelectric element has only one substantially planar exposed surface.
US07773343B2
With a magnetic recording medium, servo pits have to be recorded one disk at a time, which is a problem in that it takes more time and is more expensive. In view of this, with the present invention, at least one signal region whose surface roughness is different from that of other than the signal region is formed on the substrate of a magnetic recording medium comprising a recording layer on a substrate, or on an under layer formed on a substrate.
US07773338B2
Embodiments of the present invention provide a magnetic disk drive with an enclosure that prevents the low-density gas from leaking out owing to reduction of shrinkage cavities near tapped holes. According to one embodiment of the present invention, an aluminum alloy is forced into the region of the base in which the tapped hole is to be made, by squeezing in the final stage of die casting to form the base. This procedure increases the density of aluminum alloy above 2.7 g/cm3, and the densified aluminum alloy in the region for tapped holes, is free of shrinkage cavities that can cause gas leakage.
US07773337B2
The present invention provides a multilayer tape for simultaneously providing shielding of electromagnetic interference (EMI) and evidence of tampering with an electronic device to which it is applied. The multilayer tape can be attached to an electronic device to cover a seam or other opening in the electronic device. An embossed surface provides evidence of the disruption of the tape, and the tape includes a conductive adhesive to provide EMI shielding. The multilayer tape is particularly useful for sealing the seams of a disk drive device.
US07773324B2
A phase-acquisition (PA) loop for a read channel comprises an accumulator, a comparator, and a filter. The accumulator holds an acquired phase-correction value corresponding to a difference between a phase of a sample clock and a phase of data carried by a read signal, and provides the acquired phase-correction value to a circuit that modifies the read signal to compensate for the phase difference. The comparator receives a reference phase-correction value that also corresponds to the difference between the phases of the sample clock and the data, and generates an error signal that is related to a difference between the reference and acquired phase-correction values. And the filter causes the acquired phase-correction value to have a predetermined relationship to the reference phase-correction value. Because such a PA loop may require significantly fewer samples of a read-signal preamble than prior PA loops requires to acquire the phase between a sample clock and data carried by a read signal, such a PA loop may allow one to significantly reduce the length of the preamble.
US07773323B2
On a magnetic recording medium, M sets of burst patterns are formed along a direction of rotation of a substrate in each burst pattern region. Each burst pattern is formed so as to include two types of burst signal units that have an equal length along a radial direction of the substrate. In a predetermined range, (2M) centers in the radial direction of the burst patterns are present at intervals of (1/N) times the track pitch in the radial direction. The predetermined range has a length along the radial direction of (2M/N) times the track pitch. M or N is a natural number of 2 or higher. The two types of burst signal units are formed of non-recording regions and end regions of the burst signal units overlap in the radial direction in at least one part region of the substrate.
US07773319B2
An exemplary lens includes an active part configured for refracting light transmitting therethrough, an inactive part surrounding the active part, and a collar formed on a surface of the inactive part.
US07773316B2
An optical imaging assembly (22) having cylindrical symmetry, comprising a plurality of lenses having surfaces with curvatures and spacings between the surfaces, such that an optical image formed by the plurality of lenses has a defocus aberration coefficient greater than 0.1 at a focal plane of the assembly.
US07773300B2
An optical filter is provided which includes a plurality of hard coating layers of alternating high and low refractive index provided on a substrate and has an associated first transmission band. The filter also includes at least one additional plurality of hard coating layers including high and low refractive index layers and Herpin equivalent layers sandwiched therebetween. The additional plurality of layers has an associated second transmission band that substantially coincides with the first transmission band, but provides additional blocking at wavelengths outside the first transmission band. Relatively wide transmission bands and high blocking over an extended range of wavelengths can be achieved such that the filter is suitable for use in multiphoton fluorescence systems.
US07773287B2
A method and system for determining specific pixel modulation states of a spatial light modulator (SLM) to print a desired pattern on a substrate are disclosed. The method includes selecting at least one super-pixel in an object plane of the desired pattern, the super-pixel being formed of at least two pixels. At least one edge of the desired pattern crosses a boundary within the super-pixel, the at least one edge being defined by specific slope and position parameters relative to the super-pixel. The method also includes (i) forming an interpolation table to tabulate pre-calculated pixel modulation states and (ii) determining the specific pixel modulation states for each of the pixels in accordance with the interpolation table. Disclosed also are a method and system for providing a spatial light modulator (SLM). The SLM includes a plurality of mirrors structured to form groups of super-pixels. Each super-pixel (i) includes two or more mirrors from the plurality of mirrors and (ii) is configured to switch only one pixel of light. Each of the two or more mirrors can be separately actuated.
US07773285B2
A display element that excels in electrode durability. This display element is one having opposed electrodes and, interposed therebetween, an electrolyte containing either silver or a compound containing silver in its chemical structure, the opposed electrodes driven and operated so as to induce dissolution and precipitation of silver, characterized in that of the opposed electrodes, the electrode at a face not lying on an image observation side, after hermetic charging of the electrolyte, is plated with silver with the use of the electrolyte as a silver plating solution.
US07773279B2
An actuator includes: a first vibration system including a driving member having a frame shape, and a pair of first axial members each one end of which supports the driving member so as to allow the driving member to rotate about an X-axis; a second vibration system including a movable plate provided inside the driving member, and a pair of second axial members each one end of which supports the movable plate so as to allow the movable plate to rotate about a Y-axis perpendicular to the X-axis; a driving unit including a ferromagnetic member, a coil generating a magnetic field on the ferromagnetic; and a positioning portion that places the ferromagnetic member or the coil symmetrical with respect to an intersection point of the X and Y-axes.
US07773275B2
A method is disclosed to store information in a holographic data storage medium. The method provides a hologram comprising an alignment pattern, and disposes that hologram into a holographic data storage medium during manufacture.
US07773274B2
A method to store information in a holographic data storage medium, wherein the method supplies a holographic data storage medium comprising an encoded focusing hologram and one or more encoded data holograms. The method disposes the holographic data storage medium in a holographic data storage system such that a moveable imaging lens is disposed at an (i)th position. The method illuminates the encoded focusing hologram to generate an (i)th reconstructed focusing image, projects that (i)th reconstructed focusing image through the moveable imaging lens, and onto said optical detector. The method then calculates an (i)th measured focusing metric, and determines if the (i)th measured focusing metric is greater than or equal to the threshold focusing metric. If the (i)th measured focusing metric is greater than or equal to the threshold focusing metric, then the method decodes the one or more encoded data holograms.
US07773273B2
Provided are a method and apparatus for removing show-through of a scanned image. The method includes: performing forward scanning on a medium placed on a glass platen of an image scanner; performing backward scanning on the medium; and removing show-through of a forward-scanned image based on a backward-scanned image.
US07773248B2
A device information management system has a plurality of managed computers connected with devices. Device information of each device is to be transmitted to a requestor upon request thereby. That is, each of the plurality of managed computers has a data spooler that adds jobs in a data queue. The jobs in the data queue is transmitted to the device one by one. An information requesting system transmits a request command that requests a device to return the device information when the number of jobs in the data queue is equal to or less than a predetermined value. Then, an information receiving system receives the device information returned from the device, which is stored in the storage. The stored device information is transmitted to the requestor in response to inquiry therefrom.
US07773247B2
Provided is a document copier having an input transport mechanism and an output transport mechanism linked via a media path, the mechanisms configured to feed sheets of media through the media path. Also included is a print engine located in the media path for printing on media fed through the media path, and a code sensor arranged before the print engine in the media path, said sensor configured to capture images of a sheet surface. The copier also includes a controller for controlling the transport mechanisms, the print engine and code sensor. The controller decodes optical patterns found in the captured images to obtain one or more codes able to identify an electronic source where an electronic copy of the sheet is stored, and to print the electronic copy on a blank sheet of media with the print engine.
US07773244B2
A sensed image is saved in a printer in an environment in which a digital camera can directly communicate with a printer, and the sensed image can be directly printed. A printer and a digital camera (DSC) can be directly connected to each other via a USB interface. Upon this direct connection, the digital camera and printer serve as a print system, and the DSC serves as a user interface in that system. When the user inputs a print instruction of a desired image on the DSC, a print process of that image is executed. When the user inputs a save instruction of a given image, that image is saved in a storage device in the printer. Even when the image is erased on the DSC side, original image data can be prevented from being lost.
US07773243B2
An image forming apparatus judges whether the number of pages to print exceeds the number as a reference to judge whether to print many pages based on the setting of a confidential document print job, when receiving the print job. When the number of pages to print exceeds the reference number, the image forming apparatus ejects printed paper sheets to a housing box having a key unit to lock not to be taken out from the main body together with printed confidential documents. When the number of pages to print does not exceed the reference number, the apparatus performs a private print which starts printing and ejecting printed paper sheets to the paper eject unit after receiving an instruction from a user.
US07773241B2
An image-forming device is configured so that a process to print confidential print data is not automatically resumed after the printing process has been interrupted and the cause of the interruption has been resolved. Accordingly, the printing of confidential print data is not resumed when the user who requested the printing operation is not near the printer during an interruption and another person resolves the cause of the interruption. In this way the image-forming device prevents content of the confidential print data from being exposed to another person.
US07773234B2
Means for measuring a working machine's structural deviation from five reference axes includes a main sensing body bonded with a main axis of the working machine (or controlled to revolve), and a lighting unit set around the main sensing body to circle about the main sensing body with a fixed radius (or the lighting unit radiates a light on the main sensing body from that radial distance and circles along with the main sensing body) such that as soon as the main sensing body has detected an optical signal, it is converted to an error signal informing of the working machine's structural deviation in two or three dimensional displacement.
US07773230B2
An improved condition testing system and method includes a structure including a semiconductor material with a target portion and a second portion. The target portion has a first feature when at least one of the following occurs: an external force is received by the second portion of the structure and an internal condition occurs in the target portion. The system and method further has a interferogram shaped and located to produce a first optical interference pattern when the target portion and the interferogram are exposed to non-invasive illumination and when the target portion has the first feature. Further implementations use a second test interferogram spaced apart from the first test interferogram.
US07773229B2
A Doppler Asymmetric Spatial Heterodyne (DASH) spectrometer includes an input aperture for receiving an input light; a collimating lens for collimating the input light into a collimated light; offset establishing means, including at least one grating, for i) receiving and splitting the collimated light into a first light wavefront in a first optical path and into a second light wavefront in a second optical path, ii) establishing an offset in a light wavefront path distance between the first and second optical path light wavefronts, and iii) diffracting and recombining the first and second optical path light wavefronts into an interference wavefront to form an interference image that includes a plurality of phase points of a heterodyned interferogram measured simultaneously over the path distance offset; and an output optics section comprising a detector for receiving the interference image and outputting an interference image pattern.
US07773226B2
Systems and methods for calibrating a web inspection system.
US07773225B2
A device for the optical analysis, including two-dimensional, of a thread or yarn (F) fed to a textile machine, said device comprising at least one light emitter element (3, 4) and at least one receiver element (5), said emitter element (3, 4) generating a light signal which strikes said thread (F) before being sensed by the receiver element (5) which, based on this sensing, defines a characteristic of the thread (F) such as its movement or its stoppage, a dimensional defect or another dimensional characteristic, between said light emitter element (3, 4) and said receiver element (5), there being interposed light transparent means (6) which are encountered by the light signal after it has interacted with the thread (F), and which act as a thread guide.
US07773217B2
A probe of a Raman spectroscopy system has a wavelength and/or amplitude referencing system for determining a wavelength of the excitation signal. Preferably, this referencing system is near an output aperture, through which the excitation signal is transmitted to the sample. In this way, any birefringence or polarization dependent loss (PDL) that may be introduced by optical elements in the system can be compensated for since the wavelength reference system will detect the effect or impact of these elements.
US07773211B2
A method and system as described herein provides for detecting certain anomalies in a wafer. According to one aspect, these anomalies relate to defects or stress that can lead to wafer breakage before, during or after further wafer processing. According to other aspects, the method includes passing polarized light through a wafer and analyzing the transmitted light for any changes in polarization. According to additional aspects, the method includes analyzing the entire wafer in one image capturing operation. According to still further aspects, the light passed through the wafer is below the bandgap for a material such as silicon that comprises the wafer, so that substantially all light will be transmitted through rather than absorbed or reflected by the material. According to still further aspects, the detection operation can be rapid and automatic, so that it can be easily included in an overall processing sequence. According to yet additional aspects, the detection includes analyzing different portions of the wafer differently, for example using different contrast ratios for edge and center portions of the wafer respectively.
US07773207B1
Polarization mode dispersion (PMD) induced system penalty ε is determined from optical characteristics of an optical wavelength division multiplexed (WDM) signal that is carried on a network. The method involves tapping the optical WDM signal, separating an optical channel from the tapped optical WDM signal, performing a frequency-resolved state of polarization (SOP) measurement on the channel, and computing the PMD-induced system penalty as ε=AL2+BL4, in which A and B are predetermined parameters and L is an SOP string length based on the SOP measurement.
US07773201B1
A system for testing an optical surface includes a rangefinder configured to emit a light beam and a null assembly located between the rangefinder and the optical surface. The null assembly is configured to receive and to reflect the emitted light beam toward the optical surface. The light beam reflected from the null assembly is further reflected back from the optical surface toward the null assembly as a return light beam. The rangefinder is configured to measure a distance to the optical surface using the return light beam.
US07773199B2
A method and system are provided of using a patterning device. An exemplary method includes defining a first region on a surface, the first region being associated with a first element of the patterning device, defining a second region on the surface, the second region being associated with a second element of the patterning device, activating the first element to expose the overlapping region, and deactivating the second element when the first element is active. The first region and the second region overlap in an overlapping region.
US07773198B2
A device container assembly (30) for storing a reticle (26) includes a device container (246) and a shield assembly (250). The device container (246) encircles the reticle (26). Further, the device container (246) includes a fluid port (254) that allows for the flow of fluid (276) into and out of the device container (246). The shield assembly (250) is encircled by the device container (246). Further, the shield assembly (250) is positioned between the fluid port (254) and the reticle (26) when the reticle (26) is positioned within the device container (246). The shield assembly (250) can inhibit contaminants (278) near the fluid port (254) from being deposited on the reticle (26) and can maintain the integrity of the reticle (26).
US07773196B2
Projection-optical systems are disclosed that reduce OoB radiation doses on the wafer while reducing deterioration of optical properties of the systems. An exemplary system includes a first reflector having a reflectance for light of a second predetermined wavelength, different from light of a first predetermined wavelength, that is less than a predetermined reflectance. The system also includes a second reflector having a reflectance for light of the second wavelength which is greater than the predetermined reflectance. When the reflectors in the system are classified as reflectors having a high percentage of overlap for the reflecting regions corresponding to two different points on the wafer, and reflectors having a low percentage of overlap for the reflecting regions, then, among the reflectors having a lower percentage of overlap for the reflecting regions, the most upstream reflector in the light path of the system is the second reflector.
US07773193B2
A jig for a flexible substrate comprises a glass plate having a concave portion and a plurality of grooves at periphery of the concave portion. The jig further comprises a plurality of fixing elements inserted in the plurality of grooves to fix the flexible substrate to the glass plate.
US07773192B2
A system for manufacturing liquid crystal displays is provided, which includes: a sealant-applying unit for depositing a sealant on one of the two panels having at least one liquid crystal cell area and a cell gap measuring pattern formed outside of the liquid crystal cell area; a liquid crystal depositing unit for depositing liquid crystal material on the liquid crystal cell area and the cell gap measuring pattern; a substrate-attaching unit for receiving the two panels from the sealant-applying unit or the liquid crystal depositing unit, then conjoining the panels in a vacuum state to complete the manufacture of a liquid crystal panel; and a the cell gap measuring unit for measuring a cell gap between the two panels by detecting the spread areas of liquid crystal material deposited on the cell gap measuring pattern.
US07773188B2
An LCD device and a method of manufacturing the same are discussed. According to an embodiment, the method includes preparing first and second substrates; and spraying spacers on the first or second substrate through an ink-jet process, wherein the spacers including both positively charged spacers and negatively charged spacers are sprayed on the first or second substrate, thereby preventing the spots and the deterioration of luminance caused by the movement of spacers.
US07773187B2
The present invention provides a liquid crystal display device which can enhance the accuracy in feeding back a common potential applied to common voltage supply lines. A display panel includes a common bus line electrically connected to common electrodes and formed annularly on a periphery of the display region, a common sensing line for feeding back a voltage of the common bus line to a control printed circuit board, a scanning-signal-drive-circuit-use power source line for supplying electricity for driving a scanning signal drive circuit, and a common-voltage-supply-use line for supplying a common voltage to the common bus line. The common-voltage-supply-use line, the common sensing line and the scanning-signal-drive-circuit-use power source line are formed along one side of the display panel to which at least the scanning signal drive circuit is connected. The common sensing line is formed between the common-voltage-supply-use line and the scanning-signal-drive-circuit-use power source line on one side of the display panel.
US07773184B2
The present invention provides a liquid crystal display device which can enhance a numerical aperture of pixels. A liquid crystal display device includes pixels which are arranged close to each other without having a signal line in a boundary on a substrate, and a counter electrode, an insulation layer and a pixel electrode which generates an electric field between the pixel electrode and the counter electrode which are sequentially stacked in each pixel. The pixel electrode is constituted of a plurality of electrodes which are arranged in parallel in a state that the electrodes are overlapped to the counter electrode and include portions which are arranged close to the pixel electrode of another neighboring pixel. A conductive layer is provided between a boundary portion of the pixels arranged close to each other and between a layer on which the pixel electrode is formed and the substrate. Further the conductive layer is electrically connected with the counter electrode and a height of a surface of the conductive layer from the substrate is set higher than a height of a surface of the counter electrode from the substrate.
US07773181B2
A liquid crystal display device according to an embodiment of the present invention includes a liquid crystal display panel which has a plurality of data lines, a plurality of gate lines crossing the data lines, and a plurality of liquid crystal cells that are defined by the data lines and the gate lines; a first data driver disposed at an upper side of the liquid crystal display panel to supply data to odd-numbered data lines; a second data driver disposed at a lower side of the liquid crystal display panel to supply data to even-numbered data lines; a first gate driver disposed at a left side of the liquid crystal display panel to supply a scan pulse to odd-numbered gate lines; and a second gate driver disposed at a right side of the liquid crystal display panel to supply a scan pulse to even-numbered gate lines, and wherein at least any one of the data lines and the gate lines has a line width that varies along its length.
US07773174B2
A wide viewing angle compensation polarizing plate of the invention comprises a laminate comprising an optical film (1) that is formed of an obliquely oriented material exhibiting optically-negative uniaxiality, an anisotropic light-scattering film (2) and a polarizer (3). The wide viewing angle compensation polarizing plate can widen viewing angle characteristics both in the lateral and vertical directions with respect to the direction of the normal to the screen when used in liquid crystal displays.
US07773171B2
A display apparatus includes a light providing unit generating light, a display unit displaying an image using the light generated by the light providing unit, a driving unit driving at least one of the light providing unit and the display unit, and a bottom chassis receiving the light providing unit, the bottom chassis having a driving unit receiving recess that receives the driving unit.
US07773169B2
A flat panel display having an improved picture quality is disclosed. In one embodiment, a first pixel electrode and a second pixel electrode are formed in each subpixel area. The electrodes enclose an open space (gap) such that their outer boundary has a substantially rectangular shape. The flat panel display may also include a capacitance electrode coupled to the second pixel electrode to form a coupling capacitor. In use, the coupling capacitor operates such that a magnitude of a voltage applied to the first pixel electrode is lower than an applied data voltage, and a magnitude of a voltage applied to the second pixel electrode is higher than an applied voltage. The different voltages operate such that a tilt direction of LC molecules disposed above the first pixel electrode differs from a tilt direction of LC molecules disposed above the second pixel electrode.
US07773164B2
An active device array substrate including a substrate, a plurality of pixel units, a plurality of driving lines, a plurality of common lines, an electrostatic discharge (ESD) protection circuit, and a plurality of switch elements is provided. The substrate has a display region and a peripheral region adjacent to the display region. The pixel units are arranged as an array in the display region of the substrate. The driving lines are disposed in the display region and the peripheral region and are electrically connected to the pixel units. The common lines are disposed in the display region and are extended into the peripheral region. The ESD protection circuit is disposed in the peripheral region of the substrate. The switch elements are disposed in the peripheral region, wherein each of the switch elements is electrically connected between one of the common lines and the ESD protection circuit.
US07773158B2
The invention achieves a visual processing device that can execute precise contrast adjustment on image signals that have been input and that does not cause discrepancies in the output timing of the image signals that are output. The visual processing device is provided with a gain-type visual processing portion that outputs a first gain signal having predetermined gain characteristics with respect to the input image signal, and a correction portion that corrects the input image signal based on the first gain signal.
US07773157B2
An adaptive digital video signal processing apparatus and method for Y/C separation. In the video signal processing apparatus, an adaptive 2D BPF carries out Y/C separation through comb filtering and bandpass filtering selected according to local characteristics of an image (e.g., based on the direction in which an edge in the image extends in vertical and horizontal directions. The adaptive 2D BPF performs 2D bandpass filtering in general case. The 2D BPF adaptively executes a series of selections of the various filtering operations in a continuous manner.
US07773154B2
An information processing apparatus includes: an information transmitter; a plurality of receivers that receive information transmitted from the information transmitter; a storage unit that stores first information indicating an output destination of display data and sound data, the first information being correlated with and second information indicating ON/OFF states of each of the receivers; a setting unit that sets the ON/OFF states based on the first information and the second information when the output destination of the display data and sound data is switched.
US07773149B2
The image-capturing system comprises a image-capturing module and a plurality of mirrors, wherein the image-capturing module has a lens and a charge-coupled device (CCD). The image-capturing module is located on about the center in the image-capturing system, and a plurality of mirrors are arranged in the peripheral region within the image-capturing system to make the layout of optical path around the image-capturing module. Furthermore, reflectional angle of each mirror can be adjusted according to the requirement for design, so as to obtain the longest optical path.
US07773139B2
An image sensor array includes image sensors having photo TFTs to generate photocurrent in response to received images. The photo TFTs each have their respective gate electrodes and source electrodes independently biased to reduce the effects of dark current. Storage capacitors are coupled to each photo TFT and discharged upon generation of a photocurrent. Each storage capacitor is coupled to a readout TFT that passes a current from the storage capacitor to a data line. The photo TFT may be disposed above the storage capacitor to increase the exposed surface area of the photo TFT.
US07773138B2
A color image sensor includes an array of pixels arranged in a plurality of pixel groups, each pixel group including a floating diffusion that is shared by four pixels disposed in a 2×2 arrangement. Each of said four pixels includes a photodetector and a color filter superposed over the photodetector, wherein a first pair of said four pixels include green color, and a second pair of said four pixels includes either red or blue color filters. A control circuit controls the pixel groups such that discrete image information is generated from each pixel in normal light situations, and such that summed image information is generated from each pixel group in low light situations by simultaneously connecting the green pixels to the floating diffusion during a first time period, and simultaneously connecting the red/blue pixels to said floating diffusion during a second time period.
US07773137B2
An imaging element includes a pixel group that has pixels arranged two dimensionally therein, each including a photoelectric converting unit. The pixel arrangement of the pixel group is m rows by n columns. In the pixel group, a pixel area of an arbitrary two rows by two columns respectively includes a red pixel, a green pixel, a blue pixel and a non-color pixel. A red color signal for a given red pixel is a signal value obtained from the pixel. A green signal for the red pixel is obtained by averaging the signal values of two green pixels adjacently on the right and the left of the pixel. A blue signal for the red pixel is obtained by averaging the signal values of four blue pixels adjacently on the upper-right, the upper-left, the lower-right, and the lower-left of the pixel.
US07773136B2
An image pickup device receives an incident light by way of the color filter that also transmits an infrared light component. For the purpose of correcting an infrared light component contained in an output signal, a control unit adds correcting infrared light components to image signals of multiple colors supplied from the image pickup device, respectively. To remove the infrared light components contained in the output signals, the correcting infrared light components are subtracted from the image signals of multiple colors supplied from the image pickup device. The control unit switches between an addition processing where an infrared light component is added and a subtraction processing where the infrared component is subtracted, according to a predetermined condition.
US07773135B2
An imaging apparatus is provided and includes: a solid-state imaging device; and a correction section that corrects a defective signal contained in image signals output from the solid-state imaging device, the number of defective signals differing in accordance with an imaging condition, the correction section changing a manner of correction in accordance with the imaging condition.
US07773130B2
A signal processing apparatus to be used for a solid-state image pickup element having a plurality of output systems that output video signals obtained from pixels arranged in a column direction includes a subtraction unit that subtracts an amended error value for each column from the video signals output from the solid-state image pickup element. The signal processing apparatus also includes an error value computing unit that shields the solid-state image pickup element from light or irradiates light to the solid-state image pickup element at a constant rate, computes a respective average value of each of a plurality of pixel signals obtained from the pixels in a predetermined region of the solid-state image pickup element, subtracts the respective average value from a respective of the plurality of the pixel signals obtained from the pixels of the solid-state image pickup element, and accumulates values obtained by subtractions for respective columns.
US07773125B2
A microcontroller for an image sensing and processing apparatus is provided. The microcontroller has VLIW processor circuitry, image sensor interface circuitry connected between the VLIW processor circuitry and the image sensor, bus interface circuitry connected between the VLIW processor circuitry and a bus connectable with devices other than the image sensor, and buffer memory and queuing circuitry intermediate the image sensor and bus interface circuitry and the VLIW processor to control delivery of information to the VLIW processor.
US07773121B1
A high resolution CMOS imaging system especially suitable for use in a periscope head. The imaging system includes a sensor head for scene acquisition, and a control apparatus inclusive of distributed processors and software for device-control, data handling, and display. The sensor head encloses a combination of wide field-of-view CMOS imagers and narrow field-of-view CMOS imagers. Each bank of imagers is controlled by a dedicated processing module in order to handle information flow and image analysis of the outputs of the camera system. The imaging system also includes automated or manually controlled display system and software for providing an interactive graphical user interface (GUI) that displays a full 360-degree field of view and allows the user or automated ATR system to select regions for higher resolution inspection.
US07773119B2
A small-sized and highly efficient drive apparatus, an image pickup unit and an image pickup apparatus are provided, by using a polymer actuator that is small in size and has high speed of response and has high degree of freedom for arrangement, and by realizing an actuator having excellent assembly simplicity. By being provided with a polymer actuator and by moving objects to be driven such as an image pickup device, a lens, an image pickup optical system and a lens barrel unit by the use of the actuator, an actuator that is small in size and has the high speed of response, a high degree of freedom for arrangement and excellent assembly simplicity can be provided, which makes it possible to provide a small-sized and highly efficient drive apparatus, an image pickup unit and an image pickup apparatus.
US07773117B2
An image stabilizer includes an image pickup device; a guide device which guides the image pickup device in a manner to allow the image pickup device to move linearly in a plane orthogonal to an optical axis, the guide device and the image pickup device being arranged at different positions in the plane; and a flexible printed wiring board which extends from the image pickup device. The flexible printed wiring board includes an integrally-movable portion which is connected to the image pickup device to move with the image pickup device, and a freely-deformable portion extending from the integrally-movable portion. The flexible printed wiring board is orientated toward the guide device so that a boundary between the integrally-movable portion and the freely-deformable portion is positioned close to the guide device.
US07773114B2
A system and method for converting a film camera into a digital camera uses an electronic device placed in a space of the camera that normally contains film. The device includes an image sensing array arranged in optical communication with a lens of the camera when a shutter is open. An audio sensor is used to detect sounds within the camera, and an acoustic pattern recognizer with a built-in training mode is used to determine if the detected sounds correspond with the shutter operation. The image sensing array is switched into an image capture mode when the acoustic pattern recognizer determines that the shutter is being opened. When the shutter is opened, a read-out circuit captures multiple image frames from the image sensing array. An image processor associated with the image sensing array processes the captured images using advanced image processing algorithms.
US07773113B2
A method of operating a handheld camera comprises causing a sensor to sense an image, supplying predetermined data to an input of the camera via a card on which the predetermined data is disposed, and causing a processing system to obtain the image from the sensor, determine a card image in accordance with signals received from the input, rotate the card image in accordance with a skew of the card with respect to the input, and manipulate the image in accordance with the predetermined data to thereby generate a manipulated image.
US07773112B2
A system and method for automatic measurement of video parameters for a video sequence using a video processor that has a software waveform monitor implemented as an integral part of a video processing application run by the video processor. Each frame of the processed video sequence, either in realtime as processed by the video processor, in near realtime after storage by the video processor in a storage device, or in the background for each video sequence stored in the storage device, is analyzed against specified parameters for legalization and/or color balancing of the video sequence. The analysis results may be reported as a display in several forms—an error image map, an error log, a timeline graphic, etc. The analysis results may also be provided to the video processor for automatic correction of the video sequence when the specified parameters are not satisfied.
US07773104B2
The present invention discloses an apparatus for driving a display in which each pixels of the display receives a driving voltage and a common voltage, and a luminance of each pixel is determined by a difference between the received driving voltage and the common voltage. The apparatus comprises a plurality of source driver chips, each of which receives a pixel value and generates the driving voltage corresponding to the pixel value according to a plurality of Gamma voltages, wherein at least one of the Gamma voltages is generated by one of the source driver chips.
US07773102B2
An apparatus for driving a display device including a plurality of four color pixels is provided, which includes: an input unit receiving input three-color image signals; an image signal modifier converting the three-color image signals into output four-color image signals such that a maximum gray of the input three-color image signals is equal to a maximum gray of the output four-color image signals; and an output unit outputting the output four-color image signals.
US07773096B2
Various technologies and techniques are disclosed that improve the operation of accessibility applications. A graphics pipe is provided that can be called in user mode from multiple accessibility programs. A request is received from an accessibility application to access the graphics pipe, and a connection is established. The accessibility application listens to the graphics pipe for particular content of interest and builds a model based on that content. The model is used to deliver content to an end user appropriately. Screen captures can be performed on at least part of the content and then rendered onto another surface.
US07773080B2
A plurality of organic EL elements which are arranged on a display panel lowers the brightness along with a lapse of light emitting time and hence, the power consumption is increased to maintain the brightness. However, the increase of the power consumption shortens a lifetime of the organic EL elements. To overcome this drawback, a power supply circuit which drives the display panel has a function of controlling an electric power supplied to the display panel to a fixed value or less in response to a detection signal from a detection part which detects a cathode current of the organic EL elements.
US07773063B2
To increase the proportion of the perfects to the whole lot of final products and to reduce the cost for active matrix EL display devices by checking the operation of a TFT substrate before depositing an EL material. A capacitor for testing is connected to a drain terminal of a driving TFT in a pixel portion to observe charging and discharging of the capacitor. Whether the driving TFT is normal or not is judged by the observation, so that the rejects can be removed before the manufacturing process is completed.
US07773047B2
An antenna having an antenna element bent in a predetermined shape. The antenna element has a plurality of line conductors that are arranged in parallel and are sandwiched by two insulation films. A method of making an antenna has the steps of: arranging in parallel a plurality of line conductors, each of which having a width of 0.04 mm or less, at intervals of 10 times or more the width of each of the line conductors; discharging continuously the plurality of line conductors such that visibility of the line conductors is reduced; and sandwiching continuously the discharged line conductors by planar transparent insulation films with a sticking or adhesion layer to have an antenna element.
US07773040B2
A dual-band antenna includes a planar conductive layer comprising a conductive region and a central non-conductive region. The conductive region and the non-conductive region together define a pair of interconnected F-slot structures, and a loop strip structure coupled to and disposed around the F-slot patch slot antenna structures.
US07773039B2
A high frequency wave antenna for an automobile is provided, which improves antenna gain of an antenna conductor provided in a spoiler. A defogger is provided on a rear window glass plate 14, a part of a plurality of heater wires extend in a horizontal direction, a spoiler including an antenna conductor 6 embedded therein is provided above the rear window glass plate 14, at least one of a plurality of bus bars has a bus bar horizontal portion 1H extending in a horizontal direction, the bus bar horizontal portion 1H is provided in an upper region of the rear window glass plate 14, and a plurality of vertical heater wires 2 extending in a vertical direction from the bus bar horizontal portion 1H, are provided.
US07773031B2
An acquisition channel (20) includes a UWB sampler block (21) coupled to an analog integration block (22) further coupled to a digital integration block (24) via an analog/digital converter (23). For each range cell the UWB sampler block (21) repeatedly samples the received signal by tuning the sampling instants to the range cells to be acquired. The acquisition channel (20) is further coupled to a processor (26) and a database (25).
US07773029B1
A system and method for filtering clutter is contemplated that in one aspect performs clutter-filtering on complex-voltages. In one aspect, spectral coefficients identified from a series of spectral coefficients as having been affected by clutter are replaced by a refilling procedure to maintain the statistical properties of the spectral coefficients that are unaffected by clutter. Dual-polarization radar variables that have phase dependence can be subsequently generated from the modified spectral data.
US07773028B2
A system and method are described for generating waveforms for use in radar and sonar systems. The system includes waveform generation circuitry a waveform generator and an up-conversion module. The waveform generator generates concatenated pulse waveforms at an IF band. In a given pulse repetition interval (PRI), the concatenated pulse waveforms comprise a first and second pulse types associated with first and second IF frequencies respectively. The up-conversion module up-converts the concatenated pulse waveforms to an RF band to form first and second sets of pulses. In the given PRI, each pulse is up-converted to a different RF frequency, pulses of different lengths are associated with a similar carrier frequency, and at least one pulse from each of the sets of pulses implements frequency diversity.
US07773021B2
High speed, low power all CMOS thermometer-to-binary demultiplexer. A received signal undergoes digital sampling (e.g., as within an ADC) to generate a signal that subsequently undergoes encoding (e.g., transformation from thermometer encoded data to binary encoded data) and de-multiplexing. Two separate de-multiplexing stages are employed when performing combined encoding and de-multiplexing. In addition, the individual DEMUXs of the two stages are clocked using a distributed clock generation architecture, such that, reset and time-interleaving is controlled on the ADC clock generator. The thermometer-to-binary encoders are placed very close to the input stage which facilitates very fast data rates while consuming relatively lower power.
US07773019B2
A PRA-DAC is disclosed. The PRA-DAC is operable to increase its conversion speed.
US07773016B2
Low-cost switching converter systems are provided which combine analog generation of a current signal with digital generation of a loop error signal that is realized with a control loop that includes a high-resolution, low-bandwidth sigma-delta modulator and a low-resolution digital-to-analog converter. The current signal and error signal are differenced to provide a control signal to the switching converter. This economical system structure facilitates quick and easy digital alteration of system parameters (e.g., loop compensation and voltage reference). System embodiments add a high-frequency analog feedback path in parallel with the control loop to supplement and enhance its control performance.
US07773008B2
A signal conditioning circuit time share multiplexes anti-aliasing filters and an A/D converter. A plurality of first tier multiplexers each time share multiplex one of a plurality of antialiasing filters between a plurality of AC or baseband input signals from a plurality of sensors. A second tier multiplexer selects its inputs from the outputs of the first tier multiplexers. The output of the second tier multiplexer feeds a high speed A/D converter. Thus, the A/D converter is time share multiplexed by the second tier multiplexer. In this manner, a plurality of sensors can share a single A/D converter. After allowing a settling time for the multiplexers and antialiasing filters, a plurality of samples of the input signals are taken, such as for one period. The samples of each AC input signal are multiplied by a sine vector and a cosine vector. The product vectors are then each averaged and the root mean square of the two averages yields the magnitude of the input signal. Mechanical angle of the input signal can be determined based upon the sign of the sine and cosine product vector averages.
US07773001B2
For controlling the DC-content of a Run Length Limited RLL modulated channel bit stream organized in data blocks, control bits are periodically inserted into control blocks which are dynamically placed and sized near the data block boundaries in such a way as to enable independent dk-encoding of the data blocks body and the control blocks. Running digital sum differences are calculated. Control bit insertion is done in such a way that the d,k constraints of the RLL code are not violated, that the encoded dk sequence of the data block body is not altered, and that the running digital sum is minimized by eventually inverting the contribution of the data block body thereto. Compared to the number of data bits per data block, few control bits are sufficient to keep the digital sum variation DSV of the Running Digital Sum RDS small.
US07772995B2
A display system for an aircraft includes a device for controlling the presentation on a head-down screen of primary piloting information during a detected display defect on a head-up display device, which normally displays such primary piloting information.
US07772993B2
An icing detector is disclosed for detecting presence of ice in static air. An exemplary detector includes an ice collecting surface; a light emitter for emitting a light beam crossing an ice collecting surface, having a prismatic light manipulating window for internally-reflecting the light beam when no ice is present on the ice collecting surfaces, and externally-refracting the light when clear ice is present on the ice collecting surface, wherein the ice collecting surface is oriented to cause standing water to be directed away from the prismatic light manipulating window by gravity; a light sensor in a path of the reflected light; and an annunciator coupled to the light sensor for annunciating the presence of ice when light is sensed by the light sensor.
US07772977B2
When multiple readers for RF transponders have to be placed in close proximity, such as in adjacent lanes of a highway toll barrier, they can be set to operate at different frequencies. When signals from two adjacent ones of the readers interfere, the resulting signal includes interference terms whose frequencies equal the sum of the reader frequencies and the difference between the reader frequencies. To remove such interference terms while passing the desired terms, a tag includes a low-pass or other frequency-selective filter.
US07772976B2
The present invention provides systems and methods for locating an entity both within and outside of a structure using an RFID system in conjunction with other location systems and methods. The RFID systems may include a portable RF transmitter/receiver transported by the entity within the structure, a base unit, and a plurality of RFID tags. The methods may comprise the steps of: (a) emitting an RF interrogation signal at constant, predetermined intervals; (b) powering up and emitting a signal containing location data; (c) receiving the location data and broadcasting the location data to the base unit; and (d) receiving and displaying the location data; wherein steps (a) and (c) are performed by the RF transmitter/receiver, step (b) is performed by an RFID tag when the RF interrogation signal is within an effective range of the RFID tag, and step (d) is performed by the base unit.
US07772971B1
Apparatus for alarm data communication with a central alarm-monitoring station having a central station receiver linked to a communications medium involves a remote, premise-protecting alarm system. It has a central processing unit (CPU), at least one sensor reporting to the CPU, an interface for communications with the central station receiver across the communications medium, and at least one user interface for a user to enter inputs to the CPU. The alarm system furthermore has a pro-active verify utility configured to allow a user, after the alarm system has automatically propagated a message to the central station receiver comprising a report of an exception sensed by the sensor, to enter an input through the user interface that causes the alarm system to propagate a later message comprising the user's verification. Preferably the user interface is a keypad, and the pro-active verify utility is actuated by minimal key strokes.
US07772968B2
An alarm system for a vehicle includes a first diffraction raster, a first light source for emitting light to the first diffraction raster so as to form a first diffraction pattern on an object, an image capturing module for capturing the first diffraction pattern, and a control module electrically connected to the image capturing module for determining a relative position of the vehicle corresponding to the object according the first diffraction pattern captured by the image capturing module.
US07772965B2
A remote wellness monitoring system with universally accessible interface consists of an apparatus or home appliance unit running an embedded software program connected to a server computer via a phone line or high-speed internet. At home, the apparatus communicates with an optional set of medical health monitoring devices using wired or wireless communications methods in order to perform wellness measurements. Embodiments of the invention provide a novel user interface on the home appliance to make the system accessible to people with disabilities. The simple user interface is designed to be accessible to people who are blind or deaf or people who cannot use their hands and require an alternative interface device such as a sip & puff controller. The home unit can further monitor wellness activity of the care recipient by pegging the number of times the care recipient passes by an infra-red motion sensor.
US07772959B2
A fuse seat having light-emitting module includes an insulating body, two electricity-conducting pieces and a light-emitting module. The insulating body is arranged with an accommodating space, in which two electricity-conducting pieces are fixed respectively. A fuse is plugged into the accommodating space and connected conductively to the electricity-conducting pieces. The light-emitting module is hidden in the insulating body and is connected electrically to the electricity-conducting pieces, thus a cost-saving effect is thereby achieved.
US07772939B2
An apparatus adapted for easily performing polarization switching is disclosed. Within a second waveguide connected to a first waveguide, there is embedded a polarization transformation circuit in the state rotated relative to the second waveguide at an angle set, based on a reflection characteristic indicating a characteristic of a reflection coefficient with respect to a polarization frequency.
US07772935B2
A power source circuit for an oscillator is provided comprising a multiplexer, a plurality of transmission gates, a plurality of resistors, a current source circuit, and an output circuit. The multiplexer inputs a digital signal and outputs one or more control signals. The transmission gates is individually coupled to the multiplexer and receives the one or more control signals, wherein each of the plurality of transmission gates are turned on or off according to the one or more control signals. The plurality of resistors is coupled in series and individually coupled to the plurality of transmission gates. The current source circuit is coupled to the plurality of resistors and provides a current source. The output circuit is coupled to the current source and provides output power for the oscillator according to the current source and the operation of the transmission gates.
US07772931B2
There is provided an oscillator including: a reference signal generator that generates a reference signal having a reference frequency; a phase comparator that outputs a voltage in accordance with a phase difference between the reference signal and a feedback signal; a loop filter that receives a voltage output from the phase comparator, and gain-adjusts a voltage output from the phase comparator by means of an external control signal; a voltage controlled oscillator that oscillates an output signal at a frequency in accordance with an adjusted signal having been gain-adjusted by the loop filter; and a frequency divider that feeds back a frequency-divided signal resulting from frequency-dividing the output signal, to the phase comparator as the feedback signal.
US07772930B2
Various embodiments are disclosed relating to calibration techniques for a phase-locked loop (PLL) bandwidth. According to an example embodiment, a calibration technique may include calibrating a voltage-controlled oscillator (VCO) of a phase-locked loop (PLL) circuit, and calibrating a bandwidth of the PLL circuit based on the calibrating the VCO.
US07772926B2
In an output stage of an operational amplifier, first and second transistors each provide a collector current under quiescent conditions to first and second current sources. A resistor receives a portion of one the collector currents and produces a resistor voltage in response. An output transistor provides a quiescent current having a value calculated as a function of the resistor voltage and a base-emitter voltage of the second transistor.
US07772912B2
A level shift circuit comprises a first input terminal, a second input terminal, a first output terminal, a second output terminal, a level shifter and an equalization unit. The first and second input terminals receive an input signal and an inverted input signal respectively. The first and second output terminals output an output signal and an inverted output signal respectively. The level shifter is connected to the first and second input terminals, the first and the second output terminals. The equalization unit is coupled between the first and second output terminals. Wherein, at a reset phase, the input signal and the inverted input signal are inputted to the level shifter, and the equalization unit is turned on. After the reset phase, the equalization unit is turned off and the level shifter starts to shift a level of the input signal.
US07772901B2
A slew rate control circuit is disclosed. An output impedance buffer and a slew rate buffer are coupled in parallel. An edge detector detects an input signal to accordingly control the output impedance buffer and the slew rate buffer, such that the input signal passes through the slew rate buffer during a rising or falling time period, and the input signal only passes through the output impedance buffer during a stable time period, thereby conforming to specification requirements for the slew rate and the output impedance at the same time.
US07772898B2
The phase interpolator includes two adjustable delays 30 and 31, phase comparator 32 which detects a phase difference between a signal delayed by the adjustable delay 30 and a signal delayed by the adjustable delay 31, an integrator 33 which integrates the outputs of the phase comparator 32 and multipliers 34-1 and 34-2 which set a control voltage for the adjustable delays 30 and 31. The feedback loop comprising phase comparator 32 and integrator 33 controls a delay amount of the adjustable delay 30 thereby securing a phase relation between {ACK1, ACK2} and ICK to achieve a stable ICK phase.
US07772890B2
Various systems and methods for implementing dynamic logic are disclosed herein. For example, some embodiments of the present invention provide dynamic logic devices with a logic circuit that includes an inverting output buffer, a logic function, a bias transistor, and a current circuit. An input of the logic function is electrically coupled to a logic input, an output of the logic function is electrically coupled to an input of the inverting output buffer, and the logic function exhibits a leakage current. The gate of the bias transistor is electrically coupled to an output of the inverting buffer, and a first leg of the bias transistor is electrically coupled to the input of the inverting buffer. The current circuit supplies a current corresponding to the to a second leg of the bias transistor. In some cases, an improved performance may be achieved for a given leakage, or a reduced leakage may be achieved for a given performance.
US07772887B2
A signal interface circuit has a signal path for communicatively coupling host circuitry to peripheral circuitry of multiple peripherals. Communication signals in the signal path are of a peripheral signal level. The signal path has electronic components adapted for use in communicating signals between the host circuitry and the peripheral circuitry. The electronic components in the signal path have reliability limits less than the peripheral signal level. The configuration of the electronic components in the signal path allow communication of signals at the peripheral signal level.
US07772886B2
The integrated circuit device (1) backs up the configuration of output terminals (O, SP) of said integrated circuit in low-power mode. To do this, the device includes several voltage level shift units (2, 2′, 2″, 2′″) and an output stage (3) connected to each output of the level shift units and connected to at least one external contact pad (SP) of said integrated circuit. Each level shift unit includes an input stage powered by a regulated internal voltage (VREG) and a part for transferring the state of a specific output function, which is powered by a supply voltage (VDD) of the integrated circuit. Each level shift unit also includes a memory cell at output powered by the supply voltage, for storing the output state of a specific function of the level shift unit in the idle mode of the integrated circuit where the regulated voltage is cut off.
US07772884B2
Provided is a level shift circuit. The level shift circuit includes an inverter including a first transistor having a first polarity to which an input signal from an input port is applied through a gate and a second transistor having a second polarity which is an opposite polarity to the first polarity, the second transistor being connected in series to the first transistor between a positive source voltage and a negative source voltage and a connection node between the first and second transistors being an output port, a capacitor connected between a gate of the first transistor and a gate of the second transistor, and a voltage adjusting means for accurately adjusting a voltage applied to the gate of the second transistor according to an exact switching operation time of the second transistor, using a clock signal and an output port signal of the inverter. A stable and high-speed operation can be performed with a comparatively small size and low power consumption can be achieved.
US07772882B2
A system for FPGA (Field Programmable Gate Array) upgrade includes: an FPGA, a FLASH memory and a CPLD. The FLASH memory includes a first section configured to store a workable version of bit files for the FPGA and a second section configured to store a backup version of bit files for the FPGA. The CPLD is coupled to the FPGA and the FLASH memory. The CPLD is configured to download the bit files from the FLASH memory to the FPGA to provide the FPGA with functionality. As a result, the CPLD communicates with CPU to upgrade the bit files in the FLASH memory, and indicates to the CPU which version of bit files has been downloaded to the FPGA.
US07772873B2
A method is provided for thermal electric binary logic control. The method accepts an input voltage representing an input logic state. A heat reference is controlled in response to the input voltage. The method supplies an output voltage representing an output logic state, responsive to the heat reference. More explicitly, the heat reference controls the output voltage of a temperature-sensitive voltage divider. For example, the temperature-sensitive voltage divider may be a thermistor voltage divider.
US07772870B2
There is provided a detector for detecting a layer short of a field winding in operation by measuring, with a field detector, a magnetic field generated from a field winding of an electric rotating machine. In the present invention, a field detector is installed outside an electric rotating machine to measure a leakage flux at the installation point to detect layer short by detecting the increase in a leakage flux or asymmetry of waveform of the leakage flux at an occurrence of a layer short of a field winding thereof, simplifying installation and enabling installation without halting operations of an electric rotating machine.
US07772868B2
Test structures and methods for measuring contact and via parasitic capacitance in an integrated circuit are provided. The accuracy of contact and via capacitance measurements are improved by eliminating not-to-be-measured capacitance from the measurement results. The capacitance is measured on a target test structure that has to-be-measured contact or via capacitance. Measurements are then repeated on a substantially similar reference test structure that is free of to-be-measured contact or via capacitances. By using the capacitance measurements of the two test structures, the to-be-measured contact and via capacitance can be calculated.
US07772866B2
Embodiments of the present invention provide a test structure for inspection of integrated circuits. The test structure may be fabricated on a semiconductor wafer together with one or more integrated circuits. The test structure may include a common reference point for voltage reference; a plurality of voltage dropping devices being connected to the common reference point; and a plurality of electron-collecting pads being connected, respectively, to a plurality of contact points of the plurality of voltage dropping devices. A brightness shown by the plurality of electron-collecting pads during an inspection of the integrated circuits may be associated with a pre-determined voltage.
US07772860B2
Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes. The parallel interface assemblies provide tight signal pad pitch and compliance, and preferably enable the parallel testing or burn-in of multiple ICs, using commercial wafer probing equipment. In some preferred embodiments, the parallel interface assembly structures include separable standard electrical connector components, which reduces assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form.
US07772856B2
A junction-current probe is provided which can measure a current flowing in a junction port adapted to connect a circuit board or an electronic apparatus to a chassis under the condition that the circuit board or electronic apparatus is packaged to the chassis. Structurally, the current probe has a circular or rectangular insulator having a hole in the center, a coiled conductor wire for converting linkage flux into voltage, an insulating member for preventing the insulator from making electrical contact with surroundings, an extraction lead for connecting opposite ends of the conductor wire to a cable and the cable for connection to a measurement unit. The current probe is reduced in thickness within in a range in which the condition of packaging to the chassis can remain unchanged.
US07772854B2
An improved contacting-type conductivity measurement system and method are provided. A first conductivity measurement is obtained by driving a contacting-type conductivity sensor with an excitation voltage at a first frequency, a second conductivity is obtained by driving the contacting-type conductivity sensor with the excitation voltage at a second frequency. The first and second conductivity measurements are used to provide a more accurate conductivity output.
US07772852B2
A DC power supply system in which the resistance of a battery is measured. The voltage of the DC power supply is reduced such that the battery supplies some current to the load, and the voltage and current are measured. The voltage of the DC power supply is further reduced such that the battery supplies increased power to the load, and the voltage and current are measured. A resistance value is computed, and may be compared with various pre-established criteria. The battery resistance may also be measured by comparing the charging time of a known resistive-capacitive circuit with the charging time established at a prior measurement epoch.
US07772850B2
An electronic battery tester and method includes generating battery test data from an electronic battery test. The battery test data is transmitted over a wireless communication medium. In another aspect, a method and apparatus is provided for receiving battery test data from a wireless communication medium. Also, a diagnostic battery charger, which is capable of transmitting battery condition information to an external receiver, is provided.
US07772838B2
Apparatus for detecting vibration of an object adapted to rotate includes one or more vibration processors selected from: a direction-change processor adapted to detect changes in a direction of rotation of the object, a direction-agreement processor adapted to identify a direction of rotation of the object in at least two channels and identify an agreement or disagreement in direction of rotation identified by the at least two channels, a phase-overlap processor adapted to identify overlapping signal regions in signals associated with the rotation of the object, and a running mode processor adapted to identify an unresponsive output signal from at least one of the at least two channels. A method for detecting the vibration of the object includes generating at least one of a direction-change output signal with the direction-change processor, a direction-agreement output signal with the direction-agreement processor, a phase-overlap output signal with the phase-overlap processor, and a running-mode-vibration output signal with the running-mode processor, each indicative of the vibration the object.
US07772835B2
An AMR array magnetic position sensing system for improved sensor flexibility and improved air gap performance is disclosed. A pair of magnets can be enclosed in a magnet carrier that moves along a path and located above an array of AMR position sensors. The magnets are generally magnetized through the length of the magnets, and the magnets are positioned in the carrier such that an angle between the magnets exists in a manner similar to an angle made by AMR runners on a surface of the AMR positions sensors to create magnetic flux lines thereof. The AMR position sensors come into contact with the uniform magnetic flux lines to sense a change in linear and angular position associated with the magnet carrier. The output signal generated by the AMR position sensors have less susceptibility to variations in air gap as the angles of the magnetic flux lines generated by the magnets do note change with respect to air gap variation.
US07772827B2
A method for operating a measuring device, in particular, a vectorial network analyzer, which can be connected via at least two ports to a device under test, with excitation units assigned to each port, wherein each excitation unit provides a signal generator, with which the assigned port can be supplied with an excitation signal, provides the following procedural stages: a measurement at measuring positions of the actual phase offset between the excitation signals output at the ports; and a variation of the frequency of at least one of the two signal generators during a correction interval so that a specified set phase offset is achieved at reference positions between the excitation signals output at the ports.
US07772819B2
Embodiments include systems and methods for voltage regulation in a coupled inductor topology. Embodiments comprise a switching voltage regulator that is responsive to a light load signal from the device to which power is supplied. When the light load signal indicates that the device is not in a light load condition, the voltage regulator exhibits a low resistance to reduce I2R losses. When the light load signal indicates that the device is in a light load condition, the voltage regulator exhibits a higher resistance but lower capacitive losses within. In some embodiments, a first set of switches enables an inductor to charge through switches of the first set and a second set of switches enables the inductor to discharge through switches of the second set. The number of switches and their associated drivers in a set that are placed in a continuously-off state depends upon whether the device is in a light load condition or not.
US07772809B2
A low dropout (LDO) regulator for generating an output voltage on an output from an input voltage of an input source. The LDO regulator including a switch module to generate the output voltage. The switch module including at least two parallel connected switches responsive to corresponding switch control signals to regulate a flow of energy from the input source to the output. Each of the switches having an on-state and an off-state. A digital controller to sense the output voltage and in response to generate the switch control signals such that the output voltage is regulated to a predetermined amplitude.
US07772805B2
A charge/discharge protection circuit that protects a secondary battery from overcharge, over-discharge, charge over-current, and discharge over-current is disclosed. The charge/discharge protection circuit includes an overcharge detection circuit, an over-discharge detection circuit, a charge over-current detection circuit, a discharge over-current detection circuit, a charge control FET that is turned off when overcharge is detected and when charge over-current is detected, a discharge control FET that is turned off when over-discharge is detected and when discharge over-current is detected, and a charger connection recovery circuit that controls on/off operations of the discharge control FET. When connection with a charger is established at a time over-discharge is detected and the discharge control FET is turned off, the discharge control FET is forcefully turned on after a first predetermined time elapses.
US07772803B2
A method and system for measuring voltage of individual cells connected in series includes a pair of busses connectable to the cells and a flying capacitor connectable to the busses. The capacitor stores the charge of one of the cells such that an analog-to-digital converter (ADC) connected to the capacitor may process an accurate representation of the voltage of the cell being measured. In order to prevent electrical interference with the capacitor and the ADC, the charge on the busses is reduced prior to measurement by the ADC.
US07772796B2
Various robotic devices and related medical procedures are disclosed herein. Each of the various robotic devices have an agent delivery component. The devices include mobile robotic devices and fixed base robotic devices as disclosed herein. The agent delivery component can have at least one agent reservoir and a discharge component in fluidic communication with the at least one reservoir.
US07772794B2
A wiper controlling apparatus capable of discriminating between a signal change at the time of a wiper blade passage and that at the time of a raindrop impact so as to allow a wiper control promptly responding to the change in the condition of the sensing surface is provided. An estimating part (6) includes a displacement status data generating part (61) that calculates displacement status data representing a displacement status of the output signal of the photo-detector respectively based on a plurality of sampling data trains obtained at plural kinds of sampling periods in both of a period in which the wiper is in operation and a period in which the wiper is not in operation, a pattern data storing part (64) that stores in advance respective displacement status pattern data representing a displacement status of the output signal of the photo-detector when a lying object or a contact object is present on the sensing surface and when a wiper blade passes over the sensing surface, and a matching part (62) that compares the displacement status data calculated by the displacement status data generating part (61) with the displacement status pattern data in the pattern data storing part (64) and outputs the estimation result signal representing the condition of the sensing surface.
US07772793B2
A raindrop detecting device for detecting a raindrop amount on a windshield of a vehicle and selecting a wiping mode of a wiper based on the detected raindrop amount includes a controller for lowering the wiping mode when the detected raindrop amount is kept to be smaller than a mode-keep threshold while the wiper performs a predetermined number of wiping operations. The controller changes the predetermined number of wiping operations based on at least one of a sensitivity data of a user of the vehicle and a rainfall block data relative to the vehicle.
US07772791B2
The present invention provides a method for controlling motor torque in a hybrid electric vehicle, which can reduce current control mapping time and simplify control algorithm by providing a torque control compensation logic against a change in temperature of a motor (interior permanent magnet synchronous motor) of the hybrid electric vehicle. The present method includes: forming a single current control map based on an engine room temperature; determining a motor operation range that requires temperature compensation according to motor load conditions such as speed and torque; obtaining an optimization formula for torque command compensation; determining a torque command compensation value using the optimization formula; generating a new torque command with the torque command compensation value and applying the new torque command to the single current control map; and applying to a motor a current for which a torque variation according to a temperature change is compensated.
US07772786B2
A battery-powered light source device 5 has an DC/DC converter 61 that boosts the supply voltage of a battery 51 and supplies electrical power to a lamp 31, and, inside this DC/DC converter 61, are provided a comparator 65 that compares a specific reference voltage to the output voltage of a DC/DC converter 61, and a control component 66 that keeps the output voltage from the DC/DC converter 61 at a specific lamp voltage on the basis of the comparison result of this comparator 65, whereby the supply voltage of the battery 51 is boosted and the optimal lamp voltage is obtained. Consequently, the battery-powered light source device 5 allows the brightness of the lamp to be adjusted and a high step-up efficiency to be obtained, and the battery can therefore be used more efficiently, and a more convenient use of the endoscope is possible.
US07772778B2
To provide a method for forming electrodes and/or black stripes for a plasma display substrate, wherein display electrodes, bus electrodes and optionally black stripes for a plasma display panel are formed of the same material by the same dry step, whereby a clear image having reflection prevented, can be displayed on a PDP display device with a low load on the environment, at low costs, with low resistance, without erosion by a dielectric.A method for forming electrodes and/or black stripes for a plasma display substrate, which comprises applying a laser beam to a mask layer formed on a transparent substrate to form openings at areas corresponding to the respective patterns of display electrodes, bus electrodes and optionally black stripes, then continuously forming an antireflection layer to provide an antireflection effect over the entire surface and an electrode layer, and applying again a laser beam to peel off the mask layer and at the same time to remove an unnecessary thin film layer.
US07772773B1
Electrode configurations for a plasma display panel (PDP) device having one or more substrates and a multiplicity of pixels or sub-pixels that are defined by a hollow plasma-shell filled with an ionizable gas. The invention is described with reference to a plasma-dome, but other plasma-shells may be used including plasma-disc and plasma-sphere. Two or more addressing electrodes are in electrical contact with each plasma-dome, at least one electrode being in contact with a flat side of the plasma-dome. The PDP may include inorganic and/or organic luminescent substances that are excited by the gas discharge within each plasma-dome. The luminescent substance may be located on an exterior and/or interior surface of the plasma-dome and/or incorporated into the shell of the plasma-dome. Up-conversion (Stokes) and down-conversion (Anti-Stokes) phosphor materials may be used. The PDP substrate(s) may be rigid, flexible, or semi-flexible with a flat, curved, or irregular surface.
US07772772B2
There is disclosed a green phosphor that is adaptive for improving its driving voltage and brightness characteristic, and at the same time, improving its color purity. A green phosphor according to an embodiment of the present invention includes a mixed phosphor composed of a first class phosphor of Zn2SiO4:Mn, a second class phosphor of at least one of LaPO4:Tb, Y3Al3(BO3)4Tb, Y(Al, Ga)5012:Tb, YBO3:Tb, (Y, Gd)BO3:Tb, and a third class phosphor of at least one of BaAl12O19:Mn, BaAl14O23:Mn, Ba(Sr, Ma)AlO:Mn, and the mixing rate of the third class phosphor to the total weight of the mixed phosphor is 1˜25 wt %.
US07772768B2
A polarizer and a flat panel display apparatus including the polarizer are provided. The polarizer includes: a base; and a plurality of grids on the base, the plurality of grids including a first component and a second component, and having a thickness in a thickness direction of the polarizer. The first component includes a dielectric material and the second component includes a metal. The first component and the second component have a concentration gradient in the thickness direction, wherein a concentration of the first component in the grids increases along a thickness direction toward the external light incidence side, and a concentration of the second component in the grids increases along a thickness direction away from the external light incidence side.
US07772767B2
A display device includes; first, second and third pixel electrodes, each of the first, the second and the third pixel electrodes comprising a first edge and a second edge longer than the first edge, a first, a second and a third electrode connected to the first, second and third pixel electrodes respectively, a fourth electrode opposing the first electrode with respect to a fifth electrode, a sixth electrode opposing the second electrode with respect to a seventh electrode, and an eighth electrode opposing the third electrode with respect to a ninth electrode, wherein each of the first, fourth and fifth electrodes include a first portion disposed between the first and second pixel electrode and a second portion disposed outside of a space between the first and second pixel electrode, and the second, the sixth and the seventh electrodes are disposed outside of a space between the second and third pixel electrode.
US07772766B2
A light-emitting device includes a plurality of unit circuits that are arranged in an element forming region on a substrate, each unit circuit having a light-emitting element that has a first electrode and a second electrode, and a transistor that controls a current flowing in the light-emitting element, a plurality of power lines that are wired in a peripheral region disposed in a periphery of the element forming region so as to supply power having different potentials, a current supply line that is wired to extend from the peripheral region to the element forming region and that is electrically connected to the first electrode via the transistor in each of the unit circuits, and a current supply line protective circuit that is provided in the peripheral region and that has protective elements connected between the current supply line and the plurality of power lines.
US07772751B2
A spark plug and method of manufacturing the same, the spark plug including a metal housing holding an insulator therein, the metal housing having a threaded portion formed on an outer circumferential surface of a frontward portion of the metal housing in a crimp portion formed at a rear end of the metal housing and crimping the insulator in the axial hole of the metal housing. Furthermore, the rear-end portion of the threaded portion has a hardness that is higher than that of the crimp portion.
US07772749B2
The invention relates to a discharge lamp having a thin film indium oxide coating on the interior lamp envelope surface that effectively reflects UV, near IR and microwave radiation while transmitting light in the visible spectrum, the lamp being a high temperature operating lamp.
US07772742B2
A boundary acoustic wave device includes a first medium, a second medium, a third medium, and a fourth medium that are laminated in that order and, an electrode including an IDT electrode disposed at an interface between the first medium and the second medium, the temperature coefficient of delay time TCD of a boundary acoustic wave has a positive value, the fourth medium or the second medium has a positive temperature coefficient of sound velocity TCV, the first medium has a negative temperature coefficient of sound velocity TCV, and the sound velocity of transverse wave of the third medium is set to be less than the sound velocity of transverse wave of the fourth medium and/or the second medium.
US07772738B2
An electric machine which has an arched stator and a cylindrical rotor fitted inside it and in which the flux flows in the radial direction between the stator and the rotor as in a permanent-magnet radial-flux synchronous electric machine, and in which the stator of the machine consists of stator segments (2), each of which has an independent stator core and winding, and the stator segments are arranged to be physically separate from each other so that the stator consists of stator segments arched according to the radius of the rotor and working electromagnetically independently like a linear machine, each stator segment having a stator core and a winding separate from the other stator segments, and that it comprises an overhead supporting frame structure separate from the stator cores and consisting of several longitudinal ribs (41) and parts (42) between them.
US07772733B2
An electrical generator includes a rotary disk that is made of plastic injection molding in which a plurality of coils each having an exposed contact is embedded. Two stationary disks are arranged on opposite sides of the rotary disk and each has an inside surface that opposes the rotary disk and carries two semi-circular magnets. The rotary disk is fixed to a shaft having opposite ends fit into bearings that are received in central bores defined in the stationary disks. The coils are each formed by winding a wire in at least one turn in the form of a circle or an ellipse, the turns being coincident with each other or partially offset with respect to each other. Or alternatively, the coils are formed concentric with respect to each other and the rotary disk.
US07772727B2
A planar pulse motor includes a stator and a mover which is arranged opposite to the stator and which has a plurality of coils. The planar pulse motor can drive the mover in a first direction on a horizontal plane and in a second direction orthogonal to the first direction by controlling current flowing in the plurality of coils. The stator has a plurality of raised portions, including a plurality of first raised portions composed by laminating a plurality of layers of members including magnetic materials through which magnetic flux can pass only in the first direction and a plurality of second raised portions composed by laminating a plurality of layers of members including magnetic materials through which magnetic flux can pass only in the second direction, and a plurality of recessed portions through which magnetic flux does not pass in either the first or the second direction. The plurality of raised portions are regularly arranged in a vicinity of each of recessed portions in the first and second directions.
US07772720B2
A secondary power source system, includes a first unit receiving a primary power input and restricting a current used for charging to a predetermined amount, a second unit including a device providing capacitance, receiving a first output from the first unit with restricted current, a third unit generating a second output of a certain voltage, and a fourth unit performing a logical OR operation with the primary power input, first output from the first unit and second output from the second unit, to generate a single third output of a certain voltage.
US07772711B2
A semiconductor device including a substrate, a P-MOS single crystal TFT formed on the substrate, and an N-MOS single crystal TFT formed on the P-MOS single crystal TFT. The source region of the P-MOS single crystal TFT and the source region of the N-MOS single crystal TFT may be connected to each other. The P-MOS single crystal TFT and the N-MOS single crystal TFT may share a common gate. Also, the P-MOS single crystal TFT may include a single crystal silicon layer with a crystal plane of (100) and a crystal direction of <100>. The N-MOS single crystal TFT may include a single crystal silicon layer having the same crystal direction as the single crystal silicon layer of the P-MOS single crystal TFT and having a tensile stress greater than the single crystal silicon layer of the P-MOS single crystal TFT.
US07772701B2
An improved integrated circuit structure and method of making the same is provided. The integrated circuit structure comprises a substrate, the substrate having a top surface and a bottom surface. The top surface has a circuit device formed thereon. The structure includes a plurality of metallization layers, a bonding structure formed over the bottom surface and a conductive interconnect structure formed through said substrate.
US07772699B2
A semiconductor device includes an electrode pad formed on a pad forming surface of a semiconductor integrated circuit chip, and a step formed on the pad forming surface to surround the electrode pad. A method of manufacturing the semiconductor device includes forming a metal film on a pad forming surface of a semiconductor integrated circuit chip, forming an electrode pad on a pad forming surface by selectively etching a metal film using a first mask pattern and forming a step to surround the electrode pad by selectively etching the pad forming surface using a second mask pattern.
US07772698B2
A package structure for packaging at least one of a plurality of integrated circuit devices of a wafer is provided. The package structure includes an extension metal pad, a first conductive bump and an insulator layer. The extension metal pad electrically contacts the at least one of the plurality of integrated circuit devices. The first conductive bump is located on the extension metal pad. The insulator layer is located over the at least one of the plurality of integrated circuit devices and on a sidewall of it.
US07772693B2
A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.
US07772689B2
It is configured to comprise a semiconductor chip 110, a resin member 106 for forming a cavity 109 in which this semiconductor chip 110 is installed, and wiring 105 constructed of pattern wiring 105b formed so as to be exposed to an upper surface 106b of this resin member 106 and also connected to the semiconductor chip 110 and a post part 105a in which one end is connected to the pattern wiring 105b and also the other end is formed so as to be exposed to a lower surface 106a of the resin member 106.
US07772680B2
The invention includes semiconductor fuse arrangements containing an electrically conductive plate over and in electrical contact with a plurality of electrically conductive links. Each of the links contacts the electrically conductive plate as a separate region relative to the other links, and the region where a link makes contact to the electrically conductive plate is a fuse. The invention also includes methods of forming semiconductor fuse arrangements.
US07772677B2
A semiconductor device has a semiconductor substrate including an n-type high impurity concentration layer inhibiting a depletion layer from spreading, an n-type low impurity concentration drift layer, and a p-type high impurity concentration layer forming a p-n main junction between the drift layer. In the active region, an effective current flows in the direction of the thickness of the substrate. The device has an inclined trench that cuts the p-n main junction at a positive bevel angle from the semiconductor substrate surface on the side of the n-type high impurity concentration layer to penetrate through the substrate for separating it into chips. In the device, along the sidewall of the inclined trench in the n-type drift layer, an n-type surface region is formed with an impurity concentration lower than that in the n-type drift layer.
US07772670B2
A method facilitates generally simultaneously fabricating a number of shallow trench isolation structures such that some selected ones of the shallow trench isolation structures have rounded corners and other selected ones of the shallow trench isolation structures do not have rounded corners. The method includes forming patterned photoresist over a hard mask so that portions of the hard mask are exposed over a portion of a cell region and over a portion of a periphery region, and then removing the exposed hard mask layer in the periphery region while removing a portion of the exposed hard mask layer in the cell region. A trench having rounded corners is then partially formed in the periphery region and more of the hard mask layer is removed in the cell region, before the trench in the periphery region is deepened while a trench in the cell region is formed.
US07772660B2
A magnetic random access memory includes a transistor having a gate electrode formed above a surface of a substrate, and first and second impurity diffusion regions which sandwich a channel region below the gate electrode, a first plug formed on the first impurity diffusion region, a recording element formed on the first plug, including a plurality of stacked layers, and configured to hold information in accordance with an internal magnetization state, a first signal line formed on the recording element, a second plug formed on the second impurity diffusion region, an electrical conductor formed on the second plug, an area of a shape of the electrical conductor, which is projected onto the surface of the substrate, being larger than that of a shape of the recording element, which is projected onto the surface of the substrate, and a second signal line formed on the electrical conductor.
US07772656B2
A semiconductor device. The device including: a planar FET formed in a single crystal-silicon substrate, the FET comprising a first channel region, first and second source drains on opposite sides of the first channel region and a gate, the gate over the channel region and electrically isolated from the channel region by a first gate dielectric layer; and a FinFET formed in single crystal silicon block on top of and electrically isolated from the substrate, the FinFET comprising a second channel region, third and fourth source drains on opposite first and second ends of a second channel region and the gate, the gate electrically isolated from the second channel region by a second gate dielectric layer.
US07772655B2
In a semiconductor substrate in a first section, a channel region having an impurity concentration peak in an interior of the semiconductor substrate is formed, and in the semiconductor substrate in a second section and a third section, channel regions having an impurity concentration peak at a position close to a surface of the substrate are formed. Then, extension regions are formed in the first section, the second section and the third section. After that, the substrate is thermally treated to eliminate defects produced in the extension regions. Then, using gate electrodes and side-wall spacers as a mask, source/drain regions are formed in the first section, the second section and the third section.
US07772646B2
There is a method of manufacturing a semiconductor device with a semiconductor body comprising a semiconductor substrate and a semiconductor region which are separated from each other with an electrically insulating layer which includes a first and a second sub-layer which, viewed in projection, are adjacent to one another, wherein the first sub-layer has a smaller thickness than the second sub-layer, and wherein, in a first sub-region of the semiconductor region lying above the first sub-layer, at least one digital semiconductor element is formed and, in a second sub-region of the semiconductor region lying above the second sub-layer, at least one analog semiconductor element is formed.According to an example embodiment, the second sub-layer is formed in that the lower border thereof is recessed in the semiconductor body in relation to the lower border of the first sub-layer Fully depleted SOI devices are thus formed.
US07772642B2
A trench-gated field effect transistor (FET) is formed as follows. Using one mask, a plurality of active gate trenches and at least one gate runner trench are defined and simultaneously formed in a silicon region such that (i) the at least one gate runner trench has a width greater than a width of each of the plurality of active gate trenches, and (ii) the plurality of active gate trenches are contiguous with the at least one gate runner trench.
US07772640B2
This disclosure concerns a semiconductor device comprising a convex-shaped semiconductor layer formed on a semiconductor substrate; an insulation film formed on the semiconductor substrate, the insulation film having a film thickness to the extent that a lower part of the semiconductor layer is buried; a gate electrode formed on a set of both opposed side faces via a gate insulation film; and a source region and a drain region formed on a side face side on which the gate electrode is not formed in the semiconductor layer, wherein the semiconductor layer is formed so as to dispose surfaces of a peripheral part excepting a central part on an outer side than surfaces of the central part covered by at least the gate electrode.
US07772637B2
Methods of forming a semiconductor device may include forming a tunnel oxide layer on a semiconductor substrate, forming a gate structure on the tunnel oxide layer, forming a leakage barrier oxide, and forming an insulating spacer. More particularly, the tunnel oxide layer may be between the gate structure and the substrate, and the gate structure may include a first gate electrode on the tunnel oxide layer, an inter-gate dielectric on the first gate electrode, and a second gate electrode on the inter-gate dielectric with the inter-gate dielectric between the first and second gate electrodes. The leakage barrier oxide may be formed on sidewalls of the second gate electrode. The insulating spacer may be formed on the leakage barrier oxide with the leakage barrier oxide between the insulating spacer and the sidewalls of the second gate electrode. In addition, the insulating spacer and the leakage barrier oxide may include different materials. Related structures are also discussed.
US07772634B2
A channel stop region is formed immediately under an STI, and thereafter, an ion implantation is performed with conditions in which an impurity is doped into an upper layer portion of an active region, and at the same time, the impurity is also doped into immediately under another STI, and a channel dose region is formed at the upper layer portion of the active region, and another channel stop region is formed immediately under the STI.
US07772620B2
A junction field effect transistor comprises a silicon-on-insulator architecture. A front gate region and a back gate region are formed in a silicon region of the SOI architecture. The silicon region has a thin depth such that the back gate region has a thin depth, and whereby a depletion region associated with the back gate region recedes substantially up to an insulating layer of the SOI architecture.
US07772619B2
A semiconductor device includes a silicon on insulator (SOI) substrate, comprising an insulation layer formed on semiconductor material, and a fin structure. The fin structure is formed of semiconductor material and extends from the SOI substrate. Additionally, the fin structure includes a source region, a drain region, a channel region, and a gate region. The source region, drain region, and the channel region are doped with a first type of impurities, and the gate region is doped with a second type of impurities. The gate region abuts the channel region along at least one boundary, and the channel region is operable to conduct current between the drain region and the source region when the semiconductor device is operating in an on state.
US07772613B2
A normally-off type junction FET in which a channel resistance is reduced without lowering its blocking voltage is provided. In a junction FET formed with using a substrate made of silicon carbide, an impurity concentration of a channel region (second epitaxial layer) is made higher than an impurity concentration of a first epitaxial layer to be a drift layer. The channel region is formed of a first region in which a channel width is constant and a second region below the first region in which the channel width becomes wider toward the drain (substrate) side. A boundary between the first epitaxial layer and the second epitaxial layer is positioned in the second region in which the channel width becomes wider toward the drain (substrate) side.
US07772609B2
LED packages are provided that include a material that is both thermally conductive and has a coefficient of thermal expansion that is matched to that of an LED. The material can be a ceramic such as aluminum nitride. The package has a body that includes a bottom surface and a cavity disposed into the body. The cavity has a floor for bonding to the LED so that the LED sits within the cavity. The thermally conductive material is disposed between the floor of the cavity and the bottom surface of the package. The body can be fabricated from a number of layers where the thermally conductive material is in a layer disposed between the floor and the bottom surface. The other layers of the body can also be fabricated from the thermally conductive material. A light emitting device is made by attaching the LED to the LED package.
US07772608B2
A photoelectric element package with temperature compensation includes a substrate, and a first light-emitting element, a second light-emitting element, a photosensitive element, and a drive element disposed on the substrate, all of which are disposed in an internal space formed by a first casing joined with a second casing. Alternatively, the second light-emitting element and the photosensitive element are disposed in an internal space of a third casing. By adding the second light-emitting element, the photosensitive element can sense the light emitting intensity accurately in the absence of other interferences, so as to feed back the current operating state of the light-emitting element. A temperature compensation function is achieved by a laser driver, so as to reduce the influence of temperature on the light-emitting element, such that the light-emitting element emits light in an accurate intensity.
US07772605B2
An object of the present invention is to provide a compound semiconductor light-emitting device having side surfaces of large surface area to improve the efficiency for outwardly transmitting the emitted light. Another object of the present invention is to provide a technology capable of easily forming the side surfaces with large surface area without using a cutting tool and without the need of taking a trouble to impart mechanical damage.The inventive compound semiconductor light-emitting device has a light-emitting layer, on a substrate, wherein at least a part of a substrate portion of the device side surface has recessed portions in a side direction of the device. The inventive method of producing compound semiconductor light-emitting device comprises the steps of: (a) forming a compound semiconductor layer including a light-emitting layer of an n-type or p-type compound semiconductor on a wafer that serves as a substrate, (b) arranging a negative electrode and a positive electrode at predetermined positions for passing a drive current through the light-emitting layer, (c) forming a separation zone for separating the individual light-emitting devices, (d) perforating many small holes linearly in the wafer that serves as the substrate along the separation zone, and (e) dividing the wafer into individual light-emitting devices along the separation zone.
US07772596B2
It is an object of the present invention to provide a light-emitting element and a light-emitting device, in which a plurality of electroluminescent layers are stacked with a charge generation layer interposed therebetween between a pair of electrodes that are opposed to each other, and for which the charge generation layer can be formed on the electroluminescent layer by sputtering without damaging the electroluminescent layer. A material that is not easily etched is used for, of the electroluminescent layer, the closest layer to the charge generation layer formed by sputtering on the electroluminescent layer. Specifically, a benzoxazole derivative or a pyridine derivative is used.
US07772592B2
After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film exhibits {110} orientation. Since individual crystal grains have approximately equal orientation, the crystalline semiconductor thin film has substantially no grain boundaries and has such crystallinity as to be considered a single crystal or considered so substantially.
US07772589B1
A high performance thin film transistor includes a flexible substrate, a layer of metal oxide semiconductor material deposited on the flexible substrate, and a layer of self-assembled organic gate dielectric material deposited on the metal oxide semiconductor material. The metal oxide semiconductor material has high carrier mobility and is transparent. An interface is formed between the layer of metal oxide semiconductor material and the layer of organic gate dielectric material that is substantially free of reactions and Fermi level pinning. The polymer materials are not polar and do not give rise to gap state formation and interface scattering.
US07772587B2
Due to the indirect transition characteristic of silicon semiconductors, the light extraction efficiency of a silicon-based light emitting diode is lower than that of a compound semiconductor-based light emitting diode. For this reason, there are difficulties in practically using and commercializing silicon-based light emitting diodes developed so far. Provided is a silicon-based light emitting including: a substrate with a lower electrode layer on a lower surface thereof; a lower doped layer that is formed on an upper surface of the substrate and supplies carriers to an emitting layer; the emitting layer that is a silicon semiconductor layer including silicon quantum dots or nanodots formed on the lower doped layer and has a light-emitting characteristic; an upper doped layer that is formed on the emitting layer and supplies carriers to the emitting layer; an upper electrode layer formed on the upper doped layer; and a surface structure including a surface pattern formed on the upper electrode layer, a surface structure including an upper electrode pattern and an upper doped pattern formed by patterning the upper electrode layer and the upper doped layer, or a surface structure including the surface pattern, the upper electrode pattern, and upper doped pattern, wherein the surface structure enhances the light extraction efficiency of light emitted from the emitting layer according to geometric optics.
US07772586B2
The present invention aims at providing a structure in which a high p-type carrier concentration of 1×1017 cm−3 or more is obtained in a material in which, although it shows normally p-type conductivity, a carrier concentration smaller than 1×1017 cm−3 is only obtained. Also, the present invention aims at providing highly reliable semiconductor element and device each of which has excellent characteristics such as light emitting characteristics and a long lifetime.Each specific layer, i.e., each ZnSe0.53Te0.47 layer (2 ML) is inserted between host layers, i.e., Mg0.5Zn0.29Cd0.21Se layers (each having 10 ML (atomic layer) thickness) each of which is lattice matched to an InP substrate. In this case, each specific layer in which a sufficient carrier concentration of 1×1018 cm−3 or more is obtained when a single layer is inserted at suitable intervals. As a result, a sufficient hole concentration of 1×1017 cm−3 or more is obtained in the overall crystal in a material in which a hole concentration smaller than 1×1017 cm−3 has been only conventionally obtained.
US07772585B2
A nitride semiconductor crystal substrate is produced by forming a network mask repeating a closed loop unit shape upon an undersubstrate, growing a nitride semiconductor crystal in vapor phase, producing convex facet hills covered with facets on exposed parts Π, forming outlining concavities on mask-covered parts , not burying the facets, maintaining the convex facet hills on Π and the network concavities on , excluding dislocations in the facet hills down to the outlining concavities on , forming a defect accumulating region H on , decreasing dislocations in the facet hills and improving the facet hills to low defect density single crystal regions Z, producing a rugged nitride crystal, and slicing and polishing the nitride crystal into mirror nitride crystal wafers. After the fabrication of devices on the nitride wafer, dry-etching or wet etching of hot KOH or NaOH divides the device-carrying wafer into chips by corroding the network defect accumulating region H.
US07772582B2
Reconfigurable devices and methods for the fabrication thereof are provided. In one aspect, a reconfigurable device is provided. The reconfigurable device comprises a substrate; a first dielectric layer on the substrate; a conductive layer recessed into at least a portion of a side of the first dielectric layer opposite the substrate; at least one second dielectric layer over the side of the first dielectric layer opposite the substrate, so as to cover the conductive layer; a heater within the second dielectric layer; at least one programmable via extending through the second dielectric layer, extending through and surrounded by the heater and in contact with the conductive layer, the programmable via comprising at least one phase change material; a capping layer over the programmable via; a first conductive via and a second conductive via, each extending through the second dielectric layer and in contact with the heater; and a third conductive via extending through the second dielectric layer and in contact with the conductive layer.
US07772580B2
In an embodiment of the invention, an integrated circuit having a cell is provided. The cell may include a field effect transistor structure which includes a gate stack and a resistivity changing material structure disposed above the gate stack, wherein the resistivity changing material structure includes a resistivity changing material which is configured to change its resistivity in response to the application of an electrical voltage to the resistivity changing material structure.
US07772577B2
A particle beam therapy system using a spot scanning method includes a synchrotron, a beam transport system, an irradiation system, and a controller. A controller is configured to turn on a radio frequency electromagnetic field to be applied to an extraction system when a charged particle beam is to be supplied to the irradiation system, and turn off the radio frequency electromagnetic field to be applied to the extraction system when the supply of the charged particle beam to the irradiation system is to be blocked by means of an electromagnet provided in the beam transport system or in the synchrotron. The controller is also adapted to turn off a radio frequency acceleration voltage to be applied to an acceleration cavity in synchronization with the turning-off of the radio frequency electromagnetic field to be applied to the extraction device.
US07772576B2
A shielding assembly for use in a semiconductor manufacturing apparatus, such as an ion implantation apparatus, includes one or more removable shielding members configured to cover inner surfaces of a mass analyzing chamber. The shielding assembly reduces process by-products from accumulating on the inner surfaces. In one embodiment, a shielding assembly includes first and second shielding members, each having a unitary construction and configured to cover a magnetic area in the mass analyzing chamber. The shielding members desirably are made entirely of graphite or impregnated graphite to minimize contamination of the semiconductor device being processed caused by metal particles eroded from the inner surfaces of the mass analyzing chamber.
US07772574B2
In a pattern-lock system of particle-beam apparatus wherein the imaging of the pattern is done by means of at least two consecutive projector stages of the projecting system, reference marks are imaged upon registering means to determine the position of the particle-beam, at the location of an intermediary image of the reference marks produced by a non-final projector stage, with the registering means being positioned at locations of nominal positions of an intermediary imaging plane. Furthermore, to produce a scanning movement over the registering means the reference beamlets are shifted laterally by means of deflector means provided in the pattern defining means in dependence of a time-dependent electric voltage.
US07772572B2
An apparatus includes a primary electrode and an acceleration electrode. The acceleration electrode or, alternatively, an additional secondary electrode contains a slot that extends obliquely through the acceleration electrode or through the secondary electrode. This measure allows secondary electrons to be produced in a highly effective manner.
US07772570B2
An assembly is provided for blocking a beam of radiation. The assembly has a pipe arranged to transmit at least part of the beam of radiation. The pipe has an inner surface provided with an ablation material and encloses a volume. The assembly further has an ablation generation device. The ablation generation device is arranged to ablate at least a portion of the ablation material upon reception of a blocking signal. The assembly has a control unit, which is arranged to control the ablation generation device.
US07772565B2
A radiation-shielding assembly can contain any of multiple containers of different sizes in a predetermined, fixed location within the assembly. A clamping system in of the assembly is able to clamp any of the containers so that they are held in the same fixed location within the assembly. The containers, regardless of size, are always located in the desired position within the shield. The positive location is achieved with out the use of separate components not attached to the assembly.
US07772564B2
The invention relates to an electron impact gas ion with high brightness and low energy spread. This high brightness is achieved by injecting electrons in a small ionization volume (from less than 1 μm to several tens of micrometers in size) from one side and extracting ions from the other. The electrons injected are produced by a high brightness electron source, such as a field emitter or a Schottky emitter.In one embodiment of the invention the required high electron density in the ionization volume is realized by placing a field emitter close to the ionization volume (e.g. 30 μm), without optics between source and ionization volume.In another embodiment of the invention the source is imaged onto a MEMS structure. Two small diaphragms of e.g. 50 nm are spaced e.g. 1 μm apart. The electrons enter through one of these diaphragms, while the ions leave the ionization volume through the other one. The two diaphragms are manufactured by e.g. drilling with an ion beam, resulting in two small and well aligned diaphragms.
US07772563B2
This device is a gamma imagery device including: a gamma camera with an observation field, a gamma spectrometry detector collimated with a collimator with an observation field extending around an axis and that is included in the observation field of the gamma camera beyond a given distance from it; a laser pointer with a line of sight, this laser pointer being located close to the gamma spectrometry collimator, such that the line of sight is substantially parallel to the axis of the observation field of the collimator and intersects the observation field of the collimator, means for localising a zone pointed at by the laser pointer.
US07772550B2
The present invention discloses an mixed signal RF drive electronics board that offers small, low power, reliable, and customizable method for driving and generating mass spectra from a mass spectrometer, and for control of other functions such as electron ionizer, ion focusing, single-ion detection, multi-channel data accumulation and, if desired, front-end interfaces such as pumps, valves, heaters, and columns.
US07772540B2
An RF controlled lighting system that activates lights in adjacent spaces when a person walks into a first space and then traverses the spaces in sequence. A detection device senses the entry of a person into a first space controlled by the system. A micro-controller activates the lights in that space for immediate light and in the adjacent spaces in preparation for the person to traverse the spaces in either direction from the origin space. As the person traverses the contiguous spaces, controllers in each space sense the person's presence and communicate by RF signals to activate lights along the person's path. The controllers extinguish their lights a predetermined time after the person passes or no one enters a space.
US07772539B2
A system is provided for determining characteristic information of an object positioned adjacent to a route. The system includes a first camera configured to collect a first set of spectral data of the object. The system further includes a second camera configured to collect a second set of spectral data of the object. The first and second cameras are attached to a powered system traveling along the route. The system further includes a controller coupled to the first camera and the second camera. The controller is configured to determine the characteristic information of the object based on the first set of spectral data and the second set of spectral data of the object. Additionally, a method is provided for determining characteristic information of the object positioned adjust to the route.
US07772532B2
There are many inventions described herein. Some aspects are directed to methods and/or apparatus to provide relative movement between optics, or portion(s) thereof, and sensors, or portion(s) thereof, in a digital camera. The relative movement may be in any of various directions. In some aspects, relative movement between an optics portion, or portion(s) thereof, and a sensor portion, or portion(s) thereof, are used in providing any of various features and/or in the various applications disclosed herein, including, for example, but not limited to, increasing resolution, optical and electronic zoom, image stabilization, channel alignment, channel-channel alignment, image alignment, lens alignment, masking, image discrimination, range finding, 3D imaging, auto focus, mechanical shutter, mechanical iris, multi and hyperspectral imaging, and/or combinations thereof. In some aspects, movement is provided by actuators, for example, but not limited to MEMS actuators, and by applying appropriate control signal thereto.
US07772528B2
A heated body mat realized by an assembly covered by a protective enclosure. The assembly has a major dimension (e.g., length) and includes a heat reflecting layer disposed between a top foam panel and a bottom foam panel. A resistive heater element is arranged in a single loop that provides coverage over a substantial part of the area of the mat. A plurality of thermostats (preferably 3 or more) are integrated as part of the loop and arranged in a series configuration being spaced apart along the major dimension of the assembly. Each one of said thermostats is normally closed and opens at one or more predetermined threshold temperatures to thereby open the current path loop realized by the resistive heater element. In use, electric power is supplied to the resistive heater element to generate heat that is emitted from the mat.
US07772526B2
A hair styling device includes a hand unit having an air inlet, an outlet, and a blower between the inlet and outlet. The device further includes a storage case having a water reservoir and being configured to receive the hand unit. Tubing connects the water reservoir to the hand unit. A pump is included that selectively connects the water reservoir to the hand unit liquid inlet. A heater is situated between the water reservoir and the hand unit outlet to vaporize the contents of the water reservoir. The hair styling device includes controls in communication with the pump and blower, for actuating the pump and blower, respectively. The device may be used to selectively deliver hot hair, steam, or mist.
US07772522B2
A mother glass substrate is continuously heated by a first laser spot LS1 to a temperature which is lower than a softening point of the mother glass substrate, along a scribe line formation line SL on a surface of the mother glass substrate, along which a scribe line is to be formed, while an area close to the first laser spot LS1 is continuously cooled along the scribe line formation line SL; and an area which is close to the cooled area and is on an opposite side to the first laser spot LS1 is continuously heated by a second laser spot LS2 along the scribe line formation line SL to a temperature which is lower than the softening point of the mother glass substrate.
US07772516B2
A machine tool is provided comprising a base, a slide assembly attached to the base for supporting a tool and translating the tool along an axis, and a workpiece holder attached to the base. At least one of the slide assembly and the workpiece holder are movable laterally with respect to the axis. Means are provided for aligning the slide assembly and the workpiece holder in a desired lateral relationship. A method of aligning a machine tool is also provided.
US07772512B2
A push plate assembly sends a signal to a receiver. The push plate includes a housing, a push plate, a signal generator, a biasing member, a first latch element, a second latch element, and a button. The push plate is movably mounted to the housing. The signal generator includes a switch. The switch is in electrical communication with circuitry through which a signal is transmitted. The biasing member is disposed between the push plate and the signal generator. The biasing member biases the push plate away from the signal generator. The first latch element is connected to the push plate. The second latch element is disposed in the housing. The first latch element and the second latch element engage with one another to limit the movement of the push plate away from the signal generator as the biasing member acts on the push plate.
US07772505B2
According to various aspects, exemplary embodiments are provided of shielding apparatus suitable for use in providing electromagnetic interference shielding for one or more electrical components on a substrate. In one exemplary embodiment, a shielding apparatus generally includes first and second walls. The first wall includes laterally spaced-apart detent protrusions. The second wall includes an edge portion disposed relative to the first wall such that an interface between the edge portion of the second wall and the first wall is substantially sealed against the ingress and/or egress of electromagnetic interference through the interface. The edge portion of the second wall is engaged generally between and laterally confined by the laterally spaced-apart detent protrusions of the first wall, such that the laterally spaced-apart detent protrusions inhibit movement of the second wall relative to the first wall. Accordingly, this helps retain the interface between the edge portion of the second wall and the first wall substantially sealed against the ingress and/or egress of electromagnetic interference through the interface.
US07772488B2
The present invention provides a case assembly structure of an electronic device. The case assembly structure includes a first case, a second case and a heat-dissipating element. The first case has an engaging hole and a first opening. The second case has an engaging element engaged with the engaging hole of the first case and a second opening aligned with the first opening of the first case. The heat-dissipating element includes a fastening hole aligned with the first opening of the first case and the second opening of the second case. The first case, the second case and the heat-dissipating element are combined together by penetrating a fastening element through the first opening, the second opening and the fastening hole.
US07772471B2
In order to allow a two-sided instrument case to also serve as a stand for guitars and the like, when the case is in its open position, a flat plate having a central notch in one end is adapted to be supported between the open case side so it is closely spaced relative to the hinge which joins the case sides. When the case is moved to the closed position, the plate may either be removed for storage in the case with the instrument, or may be alternatively positioned so that it may be folded into a closed position within the case.
US07772470B1
A self-contained, surface-mount guitar tremolo is disclosed. A particular embodiment includes a surface-mount base plate; a plurality of individually adjustable string fingers attached to the base plate; side plates attached to the base plate; a first pivot roller attached to the side plates; a second pivot roller attached to the side plates; a rocker attached to the second pivot roller; and a spring preload adjuster attached to the rocker, the spring preload adjuster including a plurality of springs attached at one end to the base plate and attached at a second end to the spring preload adjuster.
US07772463B2
The present invention relates to plant cells and plants, which are genetically modified, whereby the genetic modification leads to an increase in the activity of a starch-phosphorylating OK1 protein in comparison to the corresponding wild type plant cells or wild type plants that have not been genetically modified. In addition, the present invention concerns means and methods for the manufacture of such plant cells and plants. These types of plant cells and plants synthesize a modified starch. Therefore, the present invention also concerns the starches synthesized from the plant cells and plants according to the invention, methods for manufacturing these starches, and the manufacture of starch derivatives of these modified starches, as well as flours containing starches according to the invention.Furthermore, the present invention also relates to nucleic acids, coding starch-phosphorylating OK1 proteins, vectors, host cells, plant cells, and plants containing such nucleic acid molecules. In addition, the present invention relates to OK1 proteins that have starch-phosphorylating activity.
US07772459B2
The invention relates to the production of proteins and other substances of interest in saliva of transgenic animals, particularly in mammals that produce large quantities of saliva, particularly monogastric ruminants, and ovine, caprine and bovine mammals. Preferred embodiments of the invention relate in particular to the production of foreign and modified proteins in the transgenic saliva of these animals, including particularly human fibrinogen, human prothrombin and human thrombin, among others. The invention relates as well to methods, devices, genetic constructs and to transgenic constructs for making the proteins and other substances of interest, to novel saliva and saliva-derived compositions, novel products from the saliva, and to uses of the saliva, saliva-derived compositions and novel products.
US07772443B2
An iodine-containing fluoropolyether represented by the following general formula [I]: RfO[CF(CF3)CF2O]mCF(CF3)(CH2)nI [I] (where Rf is a perfluoroalkyl group having 1-3 carbon atoms, m is an integer of 0-10, and n is an integer of 3-12), is a novel compound having a perfluoropolyetheralkyl group capable of giving a flexibility to the molecule chain through the etheral bond, said perfluoropolyether alkyl group being bonded to the alkyl iodide having an alkyl group having 3 or more carbon atoms, and can be produced by reaction of a fluoropolyether group-containing alcohol represented by the following general formula [II]: RfO[CF(CF3)CF2O]mCF(CF3)(CH2)nOH [II] (Where Rf, m, and n have the same meanings as defined above) with a metal iodide, preferably potassium iodide.
US07772434B2
The invention provides a novel β2 adrenergic receptor agonist in crystalline salt form. The invention also provides pharmaceutical compositions comprising the novel β2 adrenergic receptor agonist in crystalline salt form, formulations containing the pharmaceutical compositions, methods of using the crystalline salt to treat diseases associated with β2 adrenergic receptor activity, and processes useful for preparing such crystalline compounds.
US07772430B2
Described herein are derivatives of arylsulfonamido-substituted hydroxamic acid of formula (I) having good solubility in water and inhibitory activity of matrix metalloproteinases, useful for the preparation of pharmaceutical compositions for the treatment of diseases associated to a pathologic activity and/or an over-expression of metalloproteinases, and of cosmetic preparations having anti-ageing properties in particular for hair and skin.
US07772413B2
The invention relates to newly identified pentamine based surfactant compounds, to the use of such compounds and their production. The invention also relates to the use of the pentamine based compounds to facilitate the transfer of polynucleotides into cells.
US07772410B2
Processes comprising: (a) providing a reactant comprising a component selected from the group consisting of o-xylene, naphthalene and mixtures thereof, and a gas comprising oxygen; (b) reacting the reactant and the gas in a reaction system, in the presence of a catalyst, to form phthalic anhydride; wherein the reaction system comprises: (i) at least two reaction zones, each reaction zone cooled with a coolant; and (ii) an intermediate cooling zone disposed between a first of the at least two reaction zones and a second of the at least two reaction zones; and wherein the coolant entering the first of the at least two reaction zones has a temperature which is more than 20° C. higher than a temperature of the coolant entering the second of the at leas two reaction zones.
US07772397B2
This invention relates to derivatives of hemiasterlin or Geodiamolide G having anti-mitotic activities and useful in treating cancer. These derivatives are represented by general formula I, wherein Y, n, R1, R2, R3, R6, R7, R70, R71, R72, R74, and R75 are as defined in the specification.
US07772379B2
13-benzenesulfonylhydrazone anthracyclines useful in producing improved yields in the synthesis 13-deoxyanthrcyclines, and an improved method of reducing 13-benzene-sulfonylhydrazone anthracyclines to 13-deoxyanthrcyclines wherein the reduction reaction is maintained at temperatures of about 55° C. to 64° C. without stirring or agitation. The reaction is completed with the addition of aqueous bicarbonate which forms the 13-deoxyanthracycline and precipitates. The precipitates are filtered and the precipitate and filtrate are extracted separately with organic solvents. The crude 13-deoxy anthracycline can be converted to 5-imino-13-deoxy anthracycline by reaction with methanolic ammonia. The reaction can also be performed with an acidic pyridinium salt instead of a strong acid so that neutralization of the reaction or extraction of the product is not necessary, thereby facilitating purification.
US07772361B2
A PBI compound that includes imidazole nitrogens, at least a portion of which are substituted with an organic-inorganic hybrid moiety. At least 85% of the imidazole nitrogens may be substituted. The organic-inorganic hybrid moiety may be an organosilane moiety, for example, (R)Me2SiCH2—, where R is selected from among methyl, phenyl, vinyl, and allyl. The PBI compound may exhibit similar thermal properties in comparison to the unsubstituted PBI. The PBI compound may exhibit a solubility in an organic solvent greater than the solubility of the unsubstituted PBI. The PBI compound may be included in separatory media. A substituted PBI synthesis method may include providing a parent PBI in a less than 5 wt % solvent solution. Substituting may occur at about room temperature and/or at about atmospheric pressure. Substituting may use at least five equivalents in relation to the imidazole nitrogens to be substituted or, preferably, about fifteen equivalents.
US07772350B2
A method for preparing polyorganosiloxanes (POS) by a ring-opening polymerization and/or linear, non-linear or cyclic POS redistribution in the presence of a nucleophilic carbene. The initial efficiency of the POS conversion is substantially increased at low temperature, resulting in less residual content of initial POS.
US07772348B2
A compound having two or more thiol groups and an atom selected from metal atoms in a molecule, a polythiol composition containing such a compound, a polymerizable composition containing such a polythiol composition, a resin obtained by polymerization of such a polymerizable composition, and an optical component obtained from such a resin are provided. The polymerizable composition can be a raw material for a resin having high transparency, good heat resistance and mechanical strength required for optical components such as plastic lenses and the like, while attaining a high refractive index (nd) exceeding 1.7.
US07772339B2
A process for producing electrophoretic particles containing core particles includes a step of forming the core particles by polymerization of a composition comprising a colorant, a first polymerizable monomer, a second polymerizable monomer having a functional group which is capable of reacting with a living radical polymerization initiation group precursor, and a polymerization initiator; a step of providing a living radical polymerization initiation group at a surface of each core particle by reacting a compound having the living radical polymerization initiation group precursor with the functional group; and a step of providing a polymer chain to the living radical polymerization initiation group by living radical polymerization.
US07772337B2
This invention provides a method of making a molecular sieve catalyst composition comprising the steps of: a) combining molecular sieve crystals with binder and liquid to form a binder-sieve mixture; b) combining the binder-sieve mixture with matrix material to form a binder-sieve-matrix mixture; c) mixing the binder-sieve-matrix mixture under conditions sufficient to form a slurry having a solids content of at least 40 wt %, based on total weight of the slurry; d) progressing the mixing until slurry viscosity decreases without significant additional dilution of the slurry, so that the slurry solids content does not significantly decrease; and e) drying the decreased viscosity slurry to produce a dried molecular sieve catalyst composition having an attrition rate index of not greater than 1 wt %/hr. The aforementioned catalyst compositions can be used in processes for making olefin product from oxygenate feedstock, which olefin products can be further used for making (co)polymer products.
US07772336B2
An object of the present invention is to provide highly pure α-methylstyrene by efficiently removing polar substances present in the α-methylstyrene. The present invention discloses a method for purifying α-methylstyrene by reacting polar substances contained in the α-methylstyrene in the presence of a basic substance, and separating a reaction product of the polar substance and the α-methylstyrene.
US07772329B2
A toughened nylon that comprises a matrix nylon and a long-chain nylon is described. The matrix nylon is prepared by the homopolymerization or copolymerization of cyclic lactams monomers and their corresponding amino acids. The structure of said cyclic lactams is represented by Formula (I) and the structure of amino acids is represented by (I′). In Formula (I) and (I′) A is H or alkyl with 1-8 carbon and 3≦n≦11. The long-chain nylon is selected from nylons that contain repeating units having structures represented by Formula (II), (III) or (IV). In Formula (II) D is —(CH2)x—, in which H may be substituted with C1-4 alkyl optionally; E is —(CH2)y— or phenylene, in which H may be substituted with C1-4 alkyl optionally; 4≦x≦34 and 4≦y≦34. In Formula (IV) 5≦u≦34, 5≦v≦34, and u≠v. The proportion of said long-chain nylon in the total weight of toughened nylon is 2-45%. As the toughened nylon has very good interface combination, only one melting peak is detected with differential scanning calorimetry. Besides the preparation process and application of the toughened nylon are described hereafter too.
US07772316B2
A high temperature polyamide coating and a fastener coated with a composition that includes from about 60 wt. % to about 80 wt. % of an aliphatic polyamide having a repeating unit. The composition also includes from about 3 wt. % to about 9 wt. % of an epoxy based resin having a molecular weight in the range from about 525 to about 585, from about 4 wt. % to about 10 wt. % of a ceramic microsphere material and from about 2 wt. % to about 5 wt. % of a thermoplastic methacrylate binder, from about 4 wt. % to about 12 wt. % of crushed glass, from about 0.1 wt. % to about 1 wt. % of a polyamide with a secondary amino group as a curing agent, and the balance of an epoxy based curing agent.
US07772311B2
A composition is provided that is applicable for providing a non-stick abrasion-resistant coating on a surface, but not as a primer layer, said composition comprising fluoropolymer and an effective amount of ceramic particles having an average size of at least about 10 micrometers to improve the abrasion resistance of said coating on said surface by at least 10% as determined by the dry SBAR method, said composition optionally containing adhesion promoter in an amount up to about 10 wt % of the wt. of said fluoropolymer.