Invention Grant
- Patent Title: Semiconductor device having pinned layer with enhanced thermal endurance
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Application No.: US14741446Application Date: 2015-06-16
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Publication No.: US09666789B2Publication Date: 2017-05-30
- Inventor: Jeong-Heon Park , Ki-Woong Kim , Hee-Ju Shin , Joon-Myoung Lee , Woo-Jin Kim , Jae-Hoon Kim , Se-Chung Oh , Yun-Jae Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR
- Agency: Renaissance IP Law Group LLP
- Priority: KR10-2013-0096009 20130813
- Main IPC: H01L43/02
- IPC: H01L43/02 ; H01F10/32 ; H01L43/08 ; G11C11/16 ; H01L23/528 ; H01L27/22 ; H01F10/30

Abstract:
A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
Public/Granted literature
- US20150280108A1 SEMICONDUCTOR DEVICE HAVING PINNED LAYER WITH ENHANCED THERMAL ENDURANCE Public/Granted day:2015-10-01
Information query
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