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公开(公告)号:US12295268B2
公开(公告)日:2025-05-06
申请号:US17723845
申请日:2022-04-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byongguk Park , Jeong-Heon Park , Kyung-Jin Lee , Jeongchun Ryu
Abstract: A magnetic memory device includes a conductive line extending in a first direction, a magnetic tunnel junction structure on a first surface of the conductive line, the magnetic tunnel junction structure comprising at least two magnetic patterns and a barrier pattern between the at least two magnetic patterns, and a magnetic layer on a second surface of the conductive line, which is opposite to the first surface. The magnetic layer includes magnetization components having a magnetization in a direction which is parallel to the second surface and intersects the first direction.
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公开(公告)号:US11942128B2
公开(公告)日:2024-03-26
申请号:US17576047
申请日:2022-01-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Whankyun Kim , Jeong-Heon Park , Heeju Shin , Youngjun Cho , Joonmyoung Lee , Junho Jeong
CPC classification number: G11C11/161 , H10B61/00 , H10N50/10 , H10N50/80 , H10N50/85
Abstract: Disclosed is a magnetic memory device including a pinned magnetic pattern and a free magnetic pattern that are sequentially stacked on a substrate, a tunnel barrier pattern between the pinned magnetic pattern and the free magnetic pattern, a top electrode on the free magnetic pattern, and a capping pattern between the free magnetic pattern and the top electrode. The capping pattern includes a lower capping pattern, an upper capping pattern between the lower capping pattern and the top electrode, a first non-magnetic pattern between the lower capping pattern and the upper capping pattern, and a second non-magnetic pattern between the first non-magnetic pattern and the upper capping pattern. Each of the lower capping pattern and the upper capping pattern includes a non-magnetic metal. The first non-magnetic pattern and the second non-magnetic pattern include different metals from each other.
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公开(公告)号:US10559746B2
公开(公告)日:2020-02-11
申请号:US16108192
申请日:2018-08-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yong-Sung Park , Woo-Jin Kim , Jeong-Heon Park , Se-Chung Oh , Joon-Myoung Lee , Hyun Cho
Abstract: The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
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4.
公开(公告)号:US10510390B2
公开(公告)日:2019-12-17
申请号:US15616297
申请日:2017-06-07
Inventor: Guohan Hu , Jeong-Heon Park , Daniel C. Worledge
Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element that includes a reference layer, a tunnel barrier and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The reference layer has a fixed magnetization direction. The free layer includes a first region, a second region and a third region. The third region is formed from a third material that is configured to magnetically couple the first region and the second region. The first region is formed from a first material having a first predetermined magnetic moment, and the second region is formed from a second material having a second predetermined magnetic moment. The first predetermined magnetic moment is lower that the second predetermined magnetic moment.
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公开(公告)号:US20190371998A1
公开(公告)日:2019-12-05
申请号:US16540146
申请日:2019-08-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dae-Shik Kim , Jeong-Heon Park , Gwan-Hyeob Koh
Abstract: In a method of manufacturing an MRAM device, first and second lower electrodes may be formed on first and second regions, respectively, of a substrate. First and second MTJ structures having different switching current densities from each other may be formed on the first and second lower electrodes, respectively. First and second upper electrodes may be formed on the first and second MTJ structures, respectively.
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公开(公告)号:US10230043B2
公开(公告)日:2019-03-12
申请号:US15465050
申请日:2017-03-21
Inventor: Guohan Hu , Younghyun Kim , Chandrasekara Kothandaraman , Jeong-Heon Park
Abstract: Memory devices and methods of forming the same include forming a memory stack over a bottom electrode. The memory stack has a fixed magnetic layer, a tunnel barrier layer on the fixed magnetic layer, and a free magnetic layer formed on the tunnel barrier layer. A boron-segregating layer is formed directly on the free magnetic layer. The memory stack is etched into a pillar. A top electrode is formed over the pillar.
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公开(公告)号:US09893273B2
公开(公告)日:2018-02-13
申请号:US15094052
申请日:2016-04-08
Inventor: Guohan Hu , Junghyuk Lee , Jeong-Heon Park
CPC classification number: H01L43/10 , G11C11/161 , H01L43/08 , H01L43/12
Abstract: Techniques relate to forming a semiconductor device. A magnetic pinned layer is formed adjacent to a tunnel barrier layer. A magnetic free layer is formed adjacent to the tunnel barrier layer, such that the tunnel barrier layer is sandwiched between the magnetic pinned layer and the magnetic free layer. The magnetic free layer includes a first magnetic layer, a second magnetic layer disposed on top of the first magnetic layer, and a third magnetic layer disposed on top of the second magnetic layer. The second magnetic layer of the magnetic free layer includes an additional material, and the additional material is a selection of at least one of Be, Mg, Al, Ca, B, C, Si, V, Cr, Ti, and Mn.
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8.
公开(公告)号:US09698339B1
公开(公告)日:2017-07-04
申请号:US14982540
申请日:2015-12-29
Inventor: Anthony J. Annunziata , Marinus Hopstaken , Chandrasekara Kothandaraman , JungHyuk Lee , Deborah A. Neumayer , Jeong-Heon Park
Abstract: Embodiments are directed to an electromagnetic memory device having a memory cell and an encapsulation layer formed over the memory cell. The memory cell may include a magnetic tunnel junction (MTJ), and the encapsulation layer may be formed from a layer of hydrogenated amorphous silicon. Amorphous silicon improves the coercivity of the MTJ but by itself is conductive. Adding hydrogen to amorphous silicon passivates dangling bonds of the amorphous silicon, thereby reducing the ability of the resulting hydrogenated amorphous silicon layer to provide a parasitic current path to the MTJ. The hydrogenated amorphous silicon layer may be formed using a plasma-enhanced chemical vapor deposition, which can be tuned to enable a hydrogen level of approximately 10 to approximately 20 percent. By keeping subsequent processing operations at or below about 400 Celsius, the resulting layer of hydrogenated amorphous silicon can maintain its hydrogen level of approximately 10 to 20 percent.
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公开(公告)号:US12262648B2
公开(公告)日:2025-03-25
申请号:US17723845
申请日:2022-04-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byongguk Park , Jeong-Heon Park , Kyung-Jin Lee , Jeongchun Ryu
Abstract: A magnetic memory device includes a conductive line extending in a first direction, a magnetic tunnel junction structure on a first surface of the conductive line, the magnetic tunnel junction structure comprising at least two magnetic patterns and a barrier pattern between the at least two magnetic patterns, and a magnetic layer on a second surface of the conductive line, which is opposite to the first surface. The magnetic layer includes magnetization components having a magnetization in a direction which is parallel to the second surface and intersects the first direction.
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公开(公告)号:US11127786B2
公开(公告)日:2021-09-21
申请号:US16556599
申请日:2019-08-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Joonmyoung Lee , Whankyun Kim , Jeong-Heon Park , Woo Chang Lim , Junho Jeong
Abstract: Disclosed is a magnetic memory device including a line pattern on a substrate, a magnetic tunnel junction pattern on the line pattern, and an upper conductive line that is spaced apart from the line pattern across the magnetic tunnel junction pattern and is connected to the magnetic tunnel junction pattern. The line pattern provides the magnetic tunnel junction pattern with spin-orbit torque. The line pattern includes a chalcogen-based topological insulator.
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