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公开(公告)号：US20190123263A1
公开(公告)日：2019-04-25
申请号：US16108192
申请日：2018-08-22
发明人： Yong-Sung PARK , Woo-Jin Kim , Jeong-Heon Park , Se-Chung Oh , Joon-Myoung Lee , Hyun Cho
摘要： The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
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公开(公告)号：US11293091B2
公开(公告)日：2022-04-05
申请号：US16862791
申请日：2020-04-30
发明人： Joon-Myoung Lee , Yong-Sung Park , Whan-Kyun Kim , Se-Chung Oh , Young-Man Jang
IPC分类号： C23C14/34 , H01J37/32 , C23C16/455
摘要： A substrate processing apparatus including a chamber accommodating a substrate; a substrate support in the chamber, the substrate support supporting the substrate; a gas injector to inject an oxidizing gas for oxidizing a metal layer to be disposed on the substrate; a cooler under the substrate to cool the substrate; a target mount disposed on the substrate, the target mount including a target for performing a sputtering process; and a blocker between the target and the gas injector, the blocker shielding the target from the oxidizing gas injected from the gas injector.
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公开(公告)号：US10559746B2
公开(公告)日：2020-02-11
申请号：US16108192
申请日：2018-08-22
发明人： Yong-Sung Park , Woo-Jin Kim , Jeong-Heon Park , Se-Chung Oh , Joon-Myoung Lee , Hyun Cho
摘要： The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
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公开(公告)号：US09899594B2
公开(公告)日：2018-02-20
申请号：US15169775
申请日：2016-06-01
发明人： Ki-Woong Kim , Ju-Hyun Kim , Yong-Sung Park , Se-Chung Oh , Joon-Myoung Lee
CPC分类号： H01L43/10 , H01L27/224 , H01L27/228 , H01L43/08 , H01L43/12
摘要： A magnetic memory device includes a substrate, a circuit device on the substrate, a lower electrode electrically connected to the circuit device, a magnetic tunnel junction structure (MTJ structure) on the lower electrode, and an upper electrode on the MTJ structure. The MTJ structure includes a pinned layer structure including at least one crystalline ferromagnetic layer and at least one amorphous ferromagnetic layer, a free layer, and a tunnel barrier layer between the pinned layer structure and the free layer.
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公开(公告)号：US10714678B2
公开(公告)日：2020-07-14
申请号：US16727986
申请日：2019-12-27
发明人： Yong-Sung Park , Woo-Jin Kim , Jeong-Heon Park , Se-Chung Oh , Joon-Myoung Lee , Hyun Cho
摘要： The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
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公开(公告)号：US09666789B2
公开(公告)日：2017-05-30
申请号：US14741446
申请日：2015-06-16
发明人： Jeong-Heon Park , Ki-Woong Kim , Hee-Ju Shin , Joon-Myoung Lee , Woo-Jin Kim , Jae-Hoon Kim , Se-Chung Oh , Yun-Jae Lee
CPC分类号： H01L43/02 , G11C11/161 , H01F10/30 , H01F10/32 , H01F10/3254 , H01F10/3272 , H01L23/528 , H01L27/222 , H01L43/08 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
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