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1.
公开(公告)号:US10817640B2
公开(公告)日:2020-10-27
申请号:US16420721
申请日:2019-05-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jae-Hoon Kim , Yong-Durk Kim , Woo-Tae Kim , Hyung-Ock Kim , Joon-Young Shin
IPC: G06F30/392 , G06F30/394 , G06F119/18
Abstract: A method of generating an integrated circuit design includes receiving input data defining input cells of the integrated circuit design, selecting first standard cells from a first standard cell library to represent the input cells having a first characteristic, selecting second standard cells from a second standard cell library to represent the input cells having a second characteristic different from the first characteristic, and generating output data representing the integrated circuit design by performing placement and routing on the selected first standard cells and the selected second standard cells. The first standard cell library includes a first type of standard cells manufactured using a first diffusion break scheme. The second standard cell library includes a second type of standard cells manufactured using a second diffusion break scheme. Each of the second type of standard cells has a same function as a respective one of the first type of standard cells.
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公开(公告)号:US10148242B2
公开(公告)日:2018-12-04
申请号:US14872798
申请日:2015-10-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jae-Hoon Kim
Abstract: An electronic device for reproducing data and a method thereof are provided. The electronic device includes a memory; and a processor. The processor is configured to determine a spatial characteristic of a space where content is reproduced, store the spatial characteristic in the memory, and change a sound of the content based on the spatial characteristic when the content is reproduced.
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公开(公告)号:US09666789B2
公开(公告)日:2017-05-30
申请号:US14741446
申请日:2015-06-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeong-Heon Park , Ki-Woong Kim , Hee-Ju Shin , Joon-Myoung Lee , Woo-Jin Kim , Jae-Hoon Kim , Se-Chung Oh , Yun-Jae Lee
CPC classification number: H01L43/02 , G11C11/161 , H01F10/30 , H01F10/32 , H01F10/3254 , H01F10/3272 , H01L23/528 , H01L27/222 , H01L43/08 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
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