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公开(公告)号：US09159914B2
公开(公告)日：2015-10-13
申请号：US14136522
申请日：2013-12-20
发明人： Eun-Kyung Yim , In-Gyu Baek , Jang-Eun Lee , Se-Chung Oh , Kyung-Tae Nam , Jin-Shi Zhao
IPC分类号： H01L27/108 , H01L27/112 , H01L45/00 , H01L27/24
CPC分类号： H01L45/1253 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/145 , H01L45/146
摘要： A nonvolatile memory device includes a bottom electrode on a semiconductor substrate, a data storage layer on the bottom electrode, the data storage layer including a transition metal oxide, and a switching layer provided on a top surface and/or a bottom surface of the data storage layer, wherein a bond energy of material included in the switching layer and oxygen is more than a bond energy of a transition metal in the transition metal oxide and oxygen.
摘要翻译： 非易失性存储器件包括半导体衬底上的底电极，底电极上的数据存储层，包含过渡金属氧化物的数据存储层以及设置在数据的顶表面和/或底表面上的开关层 存储层，其中包含在所述开关层中的材料的键能和氧比所述过渡金属氧化物和氧中的过渡金属的键能大。
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公开(公告)号：US11293091B2
公开(公告)日：2022-04-05
申请号：US16862791
申请日：2020-04-30
发明人： Joon-Myoung Lee , Yong-Sung Park , Whan-Kyun Kim , Se-Chung Oh , Young-Man Jang
IPC分类号： C23C14/34 , H01J37/32 , C23C16/455
摘要： A substrate processing apparatus including a chamber accommodating a substrate; a substrate support in the chamber, the substrate support supporting the substrate; a gas injector to inject an oxidizing gas for oxidizing a metal layer to be disposed on the substrate; a cooler under the substrate to cool the substrate; a target mount disposed on the substrate, the target mount including a target for performing a sputtering process; and a blocker between the target and the gas injector, the blocker shielding the target from the oxidizing gas injected from the gas injector.
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公开(公告)号：US10559746B2
公开(公告)日：2020-02-11
申请号：US16108192
申请日：2018-08-22
发明人： Yong-Sung Park , Woo-Jin Kim , Jeong-Heon Park , Se-Chung Oh , Joon-Myoung Lee , Hyun Cho
摘要： The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
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公开(公告)号：US09899594B2
公开(公告)日：2018-02-20
申请号：US15169775
申请日：2016-06-01
发明人： Ki-Woong Kim , Ju-Hyun Kim , Yong-Sung Park , Se-Chung Oh , Joon-Myoung Lee
CPC分类号： H01L43/10 , H01L27/224 , H01L27/228 , H01L43/08 , H01L43/12
摘要： A magnetic memory device includes a substrate, a circuit device on the substrate, a lower electrode electrically connected to the circuit device, a magnetic tunnel junction structure (MTJ structure) on the lower electrode, and an upper electrode on the MTJ structure. The MTJ structure includes a pinned layer structure including at least one crystalline ferromagnetic layer and at least one amorphous ferromagnetic layer, a free layer, and a tunnel barrier layer between the pinned layer structure and the free layer.
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公开(公告)号：US10714678B2
公开(公告)日：2020-07-14
申请号：US16727986
申请日：2019-12-27
发明人： Yong-Sung Park , Woo-Jin Kim , Jeong-Heon Park , Se-Chung Oh , Joon-Myoung Lee , Hyun Cho
摘要： The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
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公开(公告)号：US09666789B2
公开(公告)日：2017-05-30
申请号：US14741446
申请日：2015-06-16
发明人： Jeong-Heon Park , Ki-Woong Kim , Hee-Ju Shin , Joon-Myoung Lee , Woo-Jin Kim , Jae-Hoon Kim , Se-Chung Oh , Yun-Jae Lee
CPC分类号： H01L43/02 , G11C11/161 , H01F10/30 , H01F10/32 , H01F10/3254 , H01F10/3272 , H01L23/528 , H01L27/222 , H01L43/08 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
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公开(公告)号：US10672978B2
公开(公告)日：2020-06-02
申请号：US16122056
申请日：2018-09-05
发明人： Jung-Min Lee , Ju-Hyun Kim , Jung-Hwan Park , Se-Chung Oh , Dong-Kyu Lee , Kyung-Il Hong
IPC分类号： H01L43/12 , H01L43/08 , H01L43/10 , H01L27/22 , H01L45/00 , H01L43/02 , H01L27/24 , H01L29/66
摘要： In a method of manufacturing a variable resistance memory device, an MTJ structure layer is formed on a substrate. The MTJ structure layer is etched in an etching chamber to form an MTJ structure. The substrate having the MTJ structure thereon is transferred to a deposition chamber through a transfer chamber. A protection layer covering a sidewall of the MTJ structure is formed in the deposition chamber. The etching chamber, the transfer chamber, and the deposition chamber are kept in a high vacuum state equal to or more than about 10−8 Torr.
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公开(公告)号：US20190123263A1
公开(公告)日：2019-04-25
申请号：US16108192
申请日：2018-08-22
发明人： Yong-Sung PARK , Woo-Jin Kim , Jeong-Heon Park , Se-Chung Oh , Joon-Myoung Lee , Hyun Cho
摘要： The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
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公开(公告)号：US20140124727A1
公开(公告)日：2014-05-08
申请号：US14136522
申请日：2013-12-20
发明人： Eun-Kyung Yim , In-Gyu Baek , Jang-Eun Lee , Se-Chung Oh , Kyung-Tae Nam , Jin-Shi Zhao
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/145 , H01L45/146
摘要： A nonvolatile memory device includes a bottom electrode on a semiconductor substrate, a data storage layer on the bottom electrode, the data storage layer including a transition metal oxide, and a switching layer provided on a top surface and/or a bottom surface of the data storage layer, wherein a bond energy of material included in the switching layer and oxygen is more than a bond energy of a transition metal in the transition metal oxide and oxygen.
摘要翻译： 非易失性存储器件包括半导体衬底上的底电极，底电极上的数据存储层，包含过渡金属氧化物的数据存储层以及设置在数据的顶表面和/或底表面上的开关层 存储层，其中包含在所述开关层中的材料的键能和氧比所述过渡金属氧化物和氧中的过渡金属的键能大。
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