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    OSCILLATOR SCHEME CAPABLE OF REDUCING FAR-OUT PHASE NOISE AND CLOSED-IN PHASE NOISE
    16.
    发明公开
    OSCILLATOR SCHEME CAPABLE OF REDUCING FAR-OUT PHASE NOISE AND CLOSED-IN PHASE NOISE 审中-公开
    振荡器方案能够减少远距离相位噪声和闭合相位噪声

    公开(公告)号：EP3182583A3

    公开(公告)日：2017-09-06

    申请号：EP16198335.8

    申请日：2016-11-11

    申请人： MediaTek Inc.

    发明人： HUANG, Hao-Wei ,  CHEN, Yen-Tso ,  WANG, Kun-Yin

    IPC分类号： H03B5/36 ,  H03B1/04

    CPC分类号： H03B1/04 ,  H03B5/00 ,  H03B5/362 ,  H03B5/366 ,  H03B2200/0062 ,  H03B2200/009

    摘要： An oscillator apparatus (100) includes an oscillator core circuit (105). The oscillator core circuit (105) includes an inverting transconductance amplifier (1052), at least one first capacitor (1053A, 4053A), at least one second capacitor (1053B, 4053B), and a resonator (1054). The at least one first capacitor (1053A, 4053A) is connected between an input of the inverting transconductance amplifier (1052) and a ground level. The at least one second capacitor (1053B, 4053B) is connected between an output of the inverting transconductance amplifier (1052) and the ground level. The resonator (1054) has a first port connected to the input of the inverting transconductance amplifier (1052) and a second port connected to the output of the inverting transconductance amplifier (1052). The first port is decoupled from the second port.

    摘要翻译： 振荡器装置（100）包括振荡器核心电路（105）。 振荡器核心电路（105）包括反相跨导放大器（1052），至少一个第一电容器（1053A，4053A），至少一个第二电容器（1053B，4053B）和谐振器（1054）。 至少一个第一电容器（1053A，4053A）连接在反相跨导放大器（1052）的输入和地电平之间。 至少一个第二电容器（1053B，4053B）连接在反相跨导放大器（1052）的输出与地电平之间。 谐振器（1054）具有连接到反相跨导放大器（1052）的输入的第一端口和连接到反相跨导放大器（1052）的输出的第二端口。 第一个端口与第二个端口分离。

    SCHALTUNGSANORDNUNG ZUR ERZEUGUNG EINES REFERENZSTROMES UND OSZILLATORSCHALTUNG MIT DER SCHALTUNGSANORDNUNG
    17.
    发明公开
    SCHALTUNGSANORDNUNG ZUR ERZEUGUNG EINES REFERENZSTROMES UND OSZILLATORSCHALTUNG MIT DER SCHALTUNGSANORDNUNG 有权
    电路，用于产生参考电流和振荡器电路与电路

    公开(公告)号：EP1481469A2

    公开(公告)日：2004-12-01

    申请号：EP03704288.4

    申请日：2003-02-04

    申请人： Infineon Technologies AG

    发明人： OEHM, Jürgen

    IPC分类号： H03B1/04

    CPC分类号： H03B5/1271 ,  H03B5/129 ,  H03B2201/0283

    摘要： Disclosed is a circuit system generating a reference current (Iref) and an oscillator circuit which comprises said circuit system and a capacitor (8) that is connected to the input of a voltage-controlled source of electric power (1). Said capacitor (8) is triggered by two inter-switchable amplifiers (4, 6) with different driving capacities (gm1, gm2). According to said principle, an LC oscillator (14), for example, can be electrically controlled while being fed with the reference current (Iref) at a particularly low noise level.

    Reference oscillator phase noise compensation circuitry
    18.
    发明公开
    Reference oscillator phase noise compensation circuitry 审中-公开
    Schaltung zum Phasenrauschkompensieren eines参考文献

    公开(公告)号：EP1443640A1

    公开(公告)日：2004-08-04

    申请号：EP03425048.0

    申请日：2003-01-29

    申请人： Siemens Mobile Communications S.p.A.

    发明人： Colosimo, Aurelio

    IPC分类号： H03B1/04

    CPC分类号： H03B1/04

    摘要： A phase noise compensation circuitry is connectible to a reference oscillator (14) which generates a reference signal, affected by phase noise ϕ( t ), exploitable either for modulation, demodulation, or simply frequency conversion. The compensation circuitry includes an mixer (17) which receives the reference signal, and a copy of the reference signal after π/2 phase shifting and delaying by a fixed delay τ spanning an integer number N of periods of the reference signal. The baseband signal at the output of the mixer (17) is proportional to the time derivative of the phase noise voltage. In a preferred embodiment the baseband signal is filtered and A/D converted before reaching a downstream numerical integrator (21) which provides a phase noise estimation voltage proportional to the difference between the phase noise voltage across the delay τ. The delay τ also spans an integer L N periods of the digital clock: L =1 is the preferred value. The output of the integrator (21), opportunely scaled out, acts as an address ϕ of two look-up tables (23, 24) for obtaining in correspondence respective digital samples sin (ϕ) and cos ( ϕ ). These digital samples are sent to a complex multiplier (11) which carries out the following digital products: ( r )=[ s I ( r )· cos ϕ] and ( r )=[ s Q ( r )· sin ϕ], in order to perform a digital compensation of the phase noise due to the reference signal. In case the compensation circuit is used by the transmitter the ( r ), ( r ) products are In-phase and In-quadrature phase-noise precompensated modulating components. In case the compensation circuit is used by the receiver the ( r ), ( r ) products are In-phase and In-quadrature phase-noise postcompensated demodulated components (fig.2).

    摘要翻译： 相位噪声补偿电路可连接到参考振荡器（14），其产生受相位噪声φ（t）影响的参考信号，可用于调制，解调或简单的频率转换。 补偿电路包括接收参考信号的混频器（17）和在pi / 2相移之后的参考信号的副本以及跨越参考信号的整数N个周期的固定延迟τ的延迟。 混频器（17）的输出端的基带信号与相位噪声电压的时间导数成比例。 在优选实施例中，在到达下游数字积分器（21）之前对基带信号进行滤波和A / D转换，该下行数字积分器提供与跨越延迟τ的相位噪声电压之间的差成比例的相位噪声估计电压。 延迟τ还跨越数字时钟的整数L