公开(公告)号：EP0474224B1

公开(公告)日：1996-06-19

申请号：EP91114960.7

申请日：1991-09-04

申请人： HITACHI, LTD.

发明人： Nishimura, Asao ,  Kitano, Makoto ,  Yaguchi, Akihiro ,  Yoneda, Nae ,  Kohno, Ryuji, ,  Murakami, Gen ,  Anjoh,Ichiro, Koganeinishi Paku Homuzu 304

IPC分类号： H01L25/065

CPC分类号： H01L23/49524 ,  H01L23/49575 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079

公开(公告)号：EP0474224A1

公开(公告)日：1992-03-11

申请号：EP91114960.7

申请日：1991-09-04

申请人： HITACHI, LTD.

发明人： Nishimura, Asao ,  Kitano, Makoto ,  Yaguchi, Akihiro ,  Yoneda, Nae ,  Kohno, Ryuji, ,  Murakami, Gen ,  Anjoh,Ichiro, Koganeinishi Paku Homuzu 304

IPC分类号： H01L25/065

CPC分类号： H01L23/49524 ,  H01L23/49575 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079

摘要： A semiconductor device comprises a plurality of semiconductor chips (1a, 1 b, 1c), electrodes formed on circuit surfaces of said plurality of semiconductor chips (1a, 1b, 1c); inner leads (3a, 3b) made of a metal foil and bonded at one ends thereof to the electrodes, outer leads (4, 4a, 4b, 4c) bonded at one ends thereof to the other ends of the inner leads (3a, 3b), and a sealing material (5) sealing said plurality of semiconductor chips (1a, 1b, 1c), the electrodes, the inner leads, and part of each of the outer leads. The semiconductor chips (1a, 1b, 1c) are laminated in such a manner that those surfaces of the semi- conductor chips (1a, 1b, 1c) on which their respective circuits are formed are disposed in facing relation to each other. This provides a semiconductor device which is excellent in assembling efficiency.

摘要翻译： 半导体器件包括多个半导体芯片（1a，1b，1c），形成在所述多个半导体芯片（1a，1b，1c）的电路表面上的电极; 内部引线（3a，3b）由金属箔制成并在其一端接合到电极，外引线（4,4a，4b，4c）的一端接合到内引线（3a，3b）的另一端 ）和密封所述多个半导体芯片（1a，1b，1c），电极，内引线和每个外引线的一部分的密封材料（5）。 半导体芯片（1a，1b，1c）以使得形成有它们各自的电路的半导体芯片（1a，1b，1c）的那些表面彼此面对的方式层叠。 这提供了组装效率优异的半导体器件。

公开(公告)号：EP0269410A3

公开(公告)日：1989-02-08

申请号：EP87310344.4

申请日：1987-11-24

申请人： HITACHI, LTD.

发明人： Kitamura, Wahei ,  Murakami, Gen ,  Nishi, Kunihiko

IPC分类号： B65D81/26

CPC分类号： B32B27/08 ,  B32B27/18 ,  B32B27/304 ,  B32B27/32 ,  B32B2307/7246 ,  B32B2311/24 ,  B32B2323/04 ,  B32B2327/06 ,  B32B2439/00 ,  B65D79/02 ,  B65D81/266 ,  H01L21/67121 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/49506 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20753 ,  H05K13/0084 ,  Y10S174/08 ,  Y10S428/922 ,  Y10T29/49121 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A plurality of semiconductor elements 12 are located within suitahble carriers 13, and a plurality of such carriers 13 are enclosed within a bag 17 or other container. The bag 17 is made from a moisture-proof film 11 which is air sealed to enclose the elements 12. To eliminate moisture within the bag 17, a desiccant may be provided within the bag 17 and/or within the carriers 13. Furthermore a humidity indicator 15 may be provided within the bag 17, which is visible from the outside of the bag 17, and hence provides a visual indication if there is condensation within the bag 17 which could affect the elements 12. As a further step, the film 11 may be multi-­layered with one layer being a metal sheet. In this way, contamination by moisture of the semiconductor elements during storage or transport may be reduced, thereby reducing the risk of damage when the semiconductor elements are mounted on a substrate.

摘要翻译： 多个半导体元件12位于西装载体13内，并且多个这样的载体13被封装在袋17或其它容器内。 袋17由空气密封以包围元件12的防潮膜11制成。为了消除袋17内的水分，可以在袋17内和/或载体13内设置干燥剂。此外，湿度 指示器15可以设置在袋17内，袋17可以从袋17的外部看到，并且因此提供视觉指示，如果袋17内存在可能影响元件12的冷凝。作为另外的步骤，膜11 可以是多层的，其中一层是金属片。 以这种方式，可以减少在存储或运输期间半导体元件的湿度的污染，从而降低当将半导体元件安装在基板上时的损坏风险。

公开(公告)号：EP0512579B1

公开(公告)日：1996-01-24

申请号：EP92110466.7

申请日：1987-11-24

申请人： HITACHI, LTD.

发明人： Kitamura, Wahei ,  Nishi, Kunihiko ,  Murakami, Gen

IPC分类号： B65D81/26 ,  B65D65/40 ,  H05K13/00 ,  H01L21/00

CPC分类号： B32B27/08 ,  B32B27/18 ,  B32B27/304 ,  B32B27/32 ,  B32B2307/7246 ,  B32B2311/24 ,  B32B2323/04 ,  B32B2327/06 ,  B32B2439/00 ,  B65D79/02 ,  B65D81/266 ,  H01L21/67121 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/49506 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20753 ,  H05K13/0084 ,  Y10S174/08 ,  Y10S428/922 ,  Y10T29/49121 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

公开(公告)号：EP0458423A3

公开(公告)日：1991-12-11

申请号：EP91202052.6

申请日：1987-11-24

申请人： HITACHI, LTD.

发明人： Kitamura, Wahei ,  Nishi, Kunihiko ,  Murakami, Gen

IPC分类号： B65D81/26

CPC分类号： B32B27/08 ,  B32B27/18 ,  B32B27/304 ,  B32B27/32 ,  B32B2307/7246 ,  B32B2311/24 ,  B32B2323/04 ,  B32B2327/06 ,  B32B2439/00 ,  B65D79/02 ,  B65D81/266 ,  H01L21/67121 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/49506 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20753 ,  H05K13/0084 ,  Y10S174/08 ,  Y10S428/922 ,  Y10T29/49121 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： In surface packaging of thin resin packages such as resin molded memory ICs or the like, cracks of the package occur frequently at a solder reflow step where thermal impact is applied to the package because the resin has absorbed moisture before packaging. To solve this problem, the devices are packaged moisture-tight at an assembly step of the resin molded devices where the resin is still dry, and are taken out from the bags immediately before the execution of surface packaging.

摘要翻译： 多个半导体元件12位于西装载体13内，并且多个这样的载体13被封装在袋17或其它容器内。 袋17由空气密封以包围元件12的防潮膜11制成。为了消除袋17内的水分，可以在袋17内和/或载体13内设置干燥剂。此外，湿度 指示器15可以设置在袋17内，袋17可以从袋17的外部看到，并且因此提供视觉指示，如果袋17内存在可能影响元件12的冷凝。作为另外的步骤，膜11 可以是多层的，其中一层是金属片。 以这种方式，可以减少在存储或运输期间半导体元件的湿度的污染，从而降低当将半导体元件安装在基板上时的损坏风险。

公开(公告)号：EP0329317A3

公开(公告)日：1991-06-12

申请号：EP89301124.7

申请日：1989-02-06

申请人： HITACHI, LTD.

发明人： Yasuhara, Toshihiro ,  Masuda, Masachika ,  Murakami, Gen

IPC分类号： H01L23/50 ,  H01L23/14 ,  H01L21/58

CPC分类号： H01L24/32 ,  H01L23/3135 ,  H01L23/3164 ,  H01L23/4951 ,  H01L23/49513 ,  H01L23/556 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4826 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83855 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/48227 ,  H01L2924/20753 ,  H01L2224/05599

摘要： A semiconductor device has an insulating filmy resin sheet (2) stuck on the principal surface of a semiconductor chip (4) formed with circuits. The inner lead portions (15) of a lead frame (14) are arranged on the insulating sheet (2), so that the semiconductor chip having the highest possible density of integration may be received in a standardized package. The inner lead portions (15) lie within a sealing member (6) and are substantially entirely arrayed over the semiconductor chip (4). The fore ends of the inner lead portions (15) and the external terminals of the semiconductor chip (4) are electrically connected on the shorter latus side of the semiconductor chip (4) by pieces of bonding wire (5).

公开(公告)号：EP0454447A3

公开(公告)日：1993-12-08

申请号：EP91303709.9

申请日：1991-04-24

申请人： HITACHI, LTD.

发明人： Oguchi, Satoshi ,  Ishihara, Masamichi ,  Ito, Kazuya ,  Murakami, Gen ,  Anjo, Ichiro ,  Sakuta, Toshiyuki ,  Yamaguchi, Yasunori ,  Kasama, Yasuhiro ,  Udagawa, Tetsu ,  Miyamoto, Eiji ,  Matsuno, Youichi ,  Satoh, Hiroshi ,  Nozoe, Atsusi

IPC分类号： H01L25/065 ,  H01L23/495 ,  G06F11/20

CPC分类号： H01L24/06 ,  G11C5/00 ,  G11C5/02 ,  G11C5/06 ,  H01L23/4951 ,  H01L23/49537 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A pair of DRAM chips 1A and 1B are mounted opposedly to each other with wiring means such as lead frames put therebetween, the lead frames being substantially integral with external terminals 3B. Then, these DRAM chips and lead frames are connected together by the conventional wire bonding method. Plural pairs of the thus-connected DRAM chips and lead frames are stacked and corresponding leads of the lead frames are connected in common to form a laminate. The plural DRAM chips thus mounted are activated selectively in accordance with a predetermined chip selection signal. Additionally, partial DRAM chips capable of partially functioning normally are combined together by utilizing the above chip mounting method to constitute a single DRAM package.

公开(公告)号：EP0512579A1

公开(公告)日：1992-11-11

申请号：EP92110466.7

申请日：1987-11-24

申请人： HITACHI, LTD.

发明人： Kitamura, Wahei ,  Nishi, Kunihiko ,  Murakami, Gen

IPC分类号： B65D81/26 ,  B65D65/40 ,  H05K13/00 ,  H01L21/00

CPC分类号： B32B27/08 ,  B32B27/18 ,  B32B27/304 ,  B32B27/32 ,  B32B2307/7246 ,  B32B2311/24 ,  B32B2323/04 ,  B32B2327/06 ,  B32B2439/00 ,  B65D79/02 ,  B65D81/266 ,  H01L21/67121 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/49506 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20753 ,  H05K13/0084 ,  Y10S174/08 ,  Y10S428/922 ,  Y10T29/49121 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A package of semiconductor elements comprises:
   at least one surface-mounting semiconductor device;
   a desiccant; and
   a moisture-proofing bag member which is made of multi-layered film, said multi-layered film comprising a barrier layer for preventing intrusion of moisture, an inner charge preventing layer formed inside of said barrier, and an outer charge preventing layer formed outside of said barrier layer,
   the furface-mounting semiconductor device and the desiccant being sealed in said moisture-proofing bag member.

摘要翻译： 一种半导体元件包括：至少一个表面安装半导体器件; 干燥剂 以及由多层膜制成的防潮袋构件，所述多层膜包括防止水分侵入的阻挡层，形成在所述阻挡层内部的内部电荷防止层，以及形成在外部的外部电荷防止层 的所述阻挡层，所述表面安装半导体装置和所述干燥剂被密封在所述防潮袋构件中。

公开(公告)号：EP0454447A2

公开(公告)日：1991-10-30

申请号：EP91303709.9

申请日：1991-04-24

申请人： HITACHI, LTD.

发明人： Oguchi, Satoshi ,  Ishihara, Masamichi ,  Ito, Kazuya ,  Murakami, Gen ,  Anjo, Ichiro ,  Sakuta, Toshiyuki ,  Yamaguchi, Yasunori ,  Kasama, Yasuhiro ,  Udagawa, Tetsu ,  Miyamoto, Eiji ,  Matsuno, Youichi ,  Satoh, Hiroshi ,  Nozoe, Atsusi

IPC分类号： H01L25/065 ,  H01L23/495 ,  G06F11/20

CPC分类号： H01L24/06 ,  G11C5/00 ,  G11C5/02 ,  G11C5/06 ,  H01L23/4951 ,  H01L23/49537 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A pair of DRAM chips 1A and 1B are mounted opposedly to each other with wiring means such as lead frames put therebetween, the lead frames being substantially integral with external terminals 3B. Then, these DRAM chips and lead frames are connected together by the conventional wire bonding method. Plural pairs of the thus-connected DRAM chips and lead frames are stacked and corresponding leads of the lead frames are connected in common to form a laminate. The plural DRAM chips thus mounted are activated selectively in accordance with a predetermined chip selection signal. Additionally, partial DRAM chips capable of partially functioning normally are combined together by utilizing the above chip mounting method to constitute a single DRAM package.

摘要翻译： 一对DRAM芯片1A和1B通过诸如引线框架之间的布线装置彼此相对地安装，引线框架与外部端子3B基本上是一体的。 然后，这些DRAM芯片和引线框架通过常规的引线键合方法连接在一起。 层叠这样连接的DRAM芯片和引线框架的多对，引线框架的相应引线共同连接以形成层叠体。 这样安装的多个DRAM芯片根据预定的芯片选择信号选择性地被激活。 此外，能够通过利用上述芯片安装方法将能够正常部分功能的部分DRAM芯片组合在一起以构成单个DRAM封装。

公开(公告)号：EP0269410A2

公开(公告)日：1988-06-01

申请号：EP87310344.4

申请日：1987-11-24

申请人： HITACHI, LTD.

发明人： Kitamura, Wahei ,  Murakami, Gen ,  Nishi, Kunihiko

IPC分类号： B65D81/26

CPC分类号： B32B27/08 ,  B32B27/18 ,  B32B27/304 ,  B32B27/32 ,  B32B2307/7246 ,  B32B2311/24 ,  B32B2323/04 ,  B32B2327/06 ,  B32B2439/00 ,  B65D79/02 ,  B65D81/266 ,  H01L21/67121 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/49506 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20753 ,  H05K13/0084 ,  Y10S174/08 ,  Y10S428/922 ,  Y10T29/49121 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A plurality of semiconductor elements 12 are located within suitahble carriers 13, and a plurality of such carriers 13 are enclosed within a bag 17 or other container. The bag 17 is made from a moisture-proof film 11 which is air sealed to enclose the elements 12. To eliminate moisture within the bag 17, a desiccant may be provided within the bag 17 and/or within the carriers 13. Furthermore a humidity indicator 15 may be provided within the bag 17, which is visible from the outside of the bag 17, and hence provides a visual indication if there is condensation within the bag 17 which could affect the elements 12. As a further step, the film 11 may be multi-­layered with one layer being a metal sheet.
In this way, contamination by moisture of the semiconductor elements during storage or transport may be reduced, thereby reducing the risk of damage when the semiconductor elements are mounted on a substrate.