公开(公告)号：EP4403674A1

公开(公告)日：2024-07-24

申请号：EP24151241.7

申请日：2024-01-10

申请人： Mitsui High-Tec, Inc.

发明人： KUBO, Kimihiko ,  FURUNO, Ryota ,  KUNITAKE, Tomokatsu

IPC分类号： C25D5/00 ,  C25D7/00 ,  H01L23/495

CPC分类号： C25D3/46 ,  C25D7/00 ,  C25D5/605 ,  H01L23/49582 ,  H01L23/49548 ,  H01L23/3142 ,  H01L23/3107 ,  H01L23/562

摘要： Provided is a metal component that is used for manufacturing a semiconductor device, the metal component including a substrate having a conductivity; and a noble metal plating layer formed on all or part of a surface of the substrate, wherein the noble metal plating layer has a lumpy protrusion on a surface of the noble metal plating layer.

公开(公告)号：EP3093883B1

公开(公告)日：2018-09-05

申请号：EP16164236.8

申请日：2016-04-07

申请人： Shin-Etsu Chemical Co., Ltd.

发明人： Osada, Shoichi ,  Kushihara, Naoyuki ,  Yokota, Ryuhei

IPC分类号： H01L23/29 ,  C09D161/06 ,  C09D179/04 ,  C08L61/06 ,  C08L79/04 ,  C08K5/55 ,  C08L63/00 ,  C08L83/10 ,  C08G8/04 ,  C08G73/06 ,  C08G77/50

CPC分类号： H01L23/293 ,  C08G8/04 ,  C08G73/0655 ,  C08G77/50 ,  C08K5/55 ,  C08L61/06 ,  C08L63/00 ,  C08L79/04 ,  C08L83/10 ,  C09D161/06 ,  C09D179/00 ,  C09D179/04 ,  H01L23/296 ,  H01L23/3107 ,  H01L23/49582 ,  H01L29/1608 ,  H01L29/2003

摘要： Provided is a semiconductor encapsulation resin composition exhibiting an insignificant heat decomposition when left under a high temperature of 200 to 250°C for a long period of time; and a superior reliability and adhesion to a Cu LF and Ag plating under a high-temperature and high-humidity environment. The composition comprises: (A) a cyanate ester compound having not less than two cyanato groups in one molecule; (B) a phenolic compound; (C) at least one epoxy resin; (D) a copolymer obtained by a hydrosilylation reaction of an alkenyl group-containing epoxy compound and an organopolysiloxane; and (E) at least one compound selected from a tetraphenylborate salt of a tetra-substituted phosphonium compound and a tetraphenylborate salt, wherein the molar ratio of phenolic hydroxyl groups in (B) to cyanato groups in (A) is 0,08 to 0,25, and the molar ratio of epoxy groups in (C) and (D) to cyanato groups in (A) is 0,04 to 0,25.

公开(公告)号：EP3360154A2

公开(公告)日：2018-08-15

申请号：EP16777954.5

申请日：2016-09-28

申请人： Heraeus Deutschland GmbH & Co. KG

发明人： HINRICH, Andreas ,  DUCH, Susanne ,  MIRIC, Anton ,  SCHÄFER, Michael

IPC分类号： H01L21/58 ,  H01L21/60 ,  H01L21/683 ,  H01L23/488 ,  H01L21/48 ,  H01L23/373 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36 ,  H01L23/14 ,  H01L23/495

CPC分类号： H01L24/83 ,  H01L21/4821 ,  H01L21/4867 ,  H01L21/4871 ,  H01L21/6836 ,  H01L23/142 ,  H01L23/3735 ,  H01L23/49582 ,  H01L24/27 ,  H01L24/29 ,  H01L24/75 ,  H01L24/95 ,  H01L24/97 ,  H01L2221/68331 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/2731 ,  H01L2224/27312 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/27418 ,  H01L2224/2744 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/2939 ,  H01L2224/75272 ,  H01L2224/753 ,  H01L2224/83192 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/83898 ,  H01L2224/83907 ,  H01L2224/95 ,  H01L2224/97 ,  H05K3/305 ,  H05K3/3436 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2224/27 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/0781

摘要： The invention relates to a method for producing a substrate arrangement (10; 10'; 10") for connecting to an electronic component (30; 30"), comprising the steps of: - providing a substrate (11) having a first side (12) and a second side (13), - applying a contacting material layer (15) to the first side (12) of said substrate (11), and - applying a pre-fixation agent (18) to at least some sections of a side (16) of the contacting material layer (15) that faces away from said substrate (11).

公开(公告)号：EP3340286A1

公开(公告)日：2018-06-27

申请号：EP17203245.0

申请日：2017-11-23

申请人： Renesas Electronics Corporation

发明人： MATSUBARA, Yuko

IPC分类号： H01L21/607 ,  H01L23/495

CPC分类号： H01L24/48 ,  H01L21/4825 ,  H01L21/565 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/02166 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/78353 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83855 ,  H01L2224/85012 ,  H01L2224/85045 ,  H01L2224/85181 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85206 ,  H01L2224/92247 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/00015 ,  H01L2924/20301 ,  H01L2924/20305 ,  H01L2924/00

摘要： As one embodiment, a method of manufacturing a semiconductor device, the method comprising the steps of:
(a) preparing a semiconductor chip having an insulating film, and a first main surface in which a plurality of electrodes respectively exposed in a plurality of openings formed in the insulating film are formed;
(b) preparing a base material including a second main surface over which the semiconductor chip is mounted, and a plurality of terminals;
(c) after the step (a) and the step (b), mounting the semiconductor chip over the second main surface of the base material;
(d) after the step (c), electrically connecting the plurality of electrodes and the plurality of terminals via a plurality of wires, respectively; and
(e) after the step (d), resin-sealing the semiconductor chip and the plurality of wires,
wherein in that , in the step (a),
each of the plurality of electrodes of the semiconductor chip includes a first electrode having a first bonding surface exposed in a first opening among the plurality of openings, and
in a plan view, each of the plurality of openings of the semiconductor chip has a plurality of sides including a first side extending in a first direction and a second side extending in a second direction intersecting the first direction, and
wherein in that the step (d) includes the steps of:
(ST2) bringing a ball portion of a first wire among the plurality of wires into contact with the first bonding surface of the first electrode ;
(ST3) after the step (ST2), pressing the ball portion of the first wire toward the first bonding surface with a first load;
(ST4) after the step (ST3), moving the ball portion of the first wire in a plurality of directions including two directions crossing each other in a plan view while pressing the ball portion against the first electrode with a second load smaller than the first load;
(ST5) after the step (ST4), by applying a first ultrasonic wave having a first frequency to the ball portion of the first wire while pressing the ball portion against the first electrode with a third load equal to the second load or smaller than the second load, making the ball portion reciprocate along a third direction in a plan view; and
(ST6) after the step (ST5), by applying the first ultrasonic wave having the first frequency while pressing the ball portion of the first wire against the first electrode with a fourth load larger than the third load and smaller than the first load, making the ball portion reciprocate along the third direction in a plan view, thereby bonding the ball portion and the first electrode.

公开(公告)号：EP3319122A1

公开(公告)日：2018-05-09

申请号：EP17190245.5

申请日：2017-09-08

申请人： Nexperia B.V.

发明人： Lam, Kan Wae ,  Walcyzk, Sven ,  Xue, Ke ,  Keung Ho, Wai ,  Onn Chaw, Wing

IPC分类号： H01L23/495 ,  H01L21/48 ,  H01L23/31 ,  H01L21/56

CPC分类号： H01L23/49555 ,  H01L21/4825 ,  H01L21/4842 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/49805 ,  H01L24/48 ,  H01L2224/48245 ,  H01L2224/48479 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/3841 ,  H01L2224/48471 ,  H01L2924/00012

摘要： A semiconductor device has wettable corner leads. A semiconductor die is mounted on a lead frame. Die bonding pads are electrically connected to leads of the lead frame. The die and electrical connections are encapsulated with a mold compound. The leads are exposed and flush with the corners of the device. The leads include dimples so that they are wettable, which facilitates inspection when the device is mounted on a circuit board or substrate.

摘要翻译： 半导体器件具有可润湿的拐角引线。 半导体管芯安装在引线框架上。 管芯键合焊盘电连接到引线框架的引线。 模具和电气连接用模具化合物封装。 引线暴露并与设备的角落齐平。 引线包括凹痕，因此它们是可润湿的，这便于在器件安装在电路板或基板上时进行检查。

公开(公告)号：EP3262679A1

公开(公告)日：2018-01-03

申请号：EP16706349.4

申请日：2016-02-24

申请人： Heraeus Deutschland GmbH & Co. KG

发明人： KRÜGER, Frank ,  FREISE, Gerald

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L24/32 ,  H01L21/4821 ,  H01L23/14 ,  H01L23/49513 ,  H01L23/49582 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/27418 ,  H01L2224/29139 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/3201 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/32505 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83439 ,  H01L2224/83455 ,  H01L2224/83464 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/00012

摘要： The invention relates to a power electronics module (10) comprising at least one semiconductor element (11), in particular a power semiconductor element, and a support (12) with at least one functional surface (13) for indirectly connecting to the semiconductor element (11). According to the invention, a barrier layer (15) made of palladium is formed directly or indirectly on at least some regions of the functional surface (13) of the support (12), and the semiconductor element (11) is directly or indirectly connected to the barrier layer (15) face (16) facing away from the support (12) functional surface (13) by means of a layer (19) made of a sintering silver paste. A silver layer (17) can be formed on the barrier layer (15), and a nickel layer (14) can be formed between the functional surface of the support (12) and the barrier layer (15). While the semiconductor element (11) is being connected or joined with the support (12), a palladium/silver diffusion layer (21) is formed in the power electronics module by means of the diffusion of the palladium of the barrier layer (15) into the silver layer (17) or into the layer (19) made of a sintering silver paste on the basis of an application of pressure and/or heat, said palladium/silver diffusion layer forming a barrier against the permeation or diffusion of oxygen through the sintering silver paste layer (19) and the silver layer (17) to the metal (for example copper) of the support (12). As a result, the adhesion of the sintering silver paste or sintering silver layer (19) on the support is not decreased during the aging of the power electronics module (10), and the release of the sintering silver paste or the sintering silver layer (19) and thus the release of the semiconductor element (11) from the support (12) is prevented.

公开(公告)号：EP3226292A1

公开(公告)日：2017-10-04

申请号：EP15863679.5

申请日：2015-10-06

申请人： Shindengen Electric Manufacturing Co., Ltd.

发明人： KAMIYAMA Yoshihiro ,  UMEDA Soichiro

IPC分类号： H01L23/50

CPC分类号： H01L23/49551 ,  H01L21/4842 ,  H01L23/3735 ,  H01L23/49531 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49582 ,  H01L23/49811 ,  H01L23/62 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2924/0002 ,  H01L2924/00014 ,  H01L2924/00

摘要： The occurrence of crack in a soldering joint between a terminal portion of a lead and a wiring board due to a temperature change is reduced even with the use of a mold resin with a low coefficient of linear expansion. A lead frame 1 according to one embodiment includes a lead part 2 including an inner lead 3 and an outer lead 4 connected to the inner lead 3, and a frame unit 5 supporting the lead part 2. The inner lead 3 has a terminal portion 3a having a facing surface 3b and a back surface 3c in the opposite side from the facing surface 3b. The facing surface 3b faces a conductive pattern of a wiring board. An outer region of the terminal portion 3a is provided with a solder thickness ensuring portion 6 where the facing surface 3b is depressed toward the back surface 3c. The solder thickness ensuring portion 6 is thinner than a center region of the facing surface 3b. A center region of the back surface 3c is flat without a depression.

摘要翻译： 即使使用具有低线性膨胀系数的模制树脂，由于温度变化引起的引线的端子部分与布线板之间的焊接接缝中的裂纹的发生也被减少。 根据一个实施例的引线框架1包括：引线部分2，其包括连接到内引线3的内引线3和外引线4以及支撑引线部分2的框架单元5.内引线3具有端子部分3a 在相对表面3b的相对侧具有面对表面3b和背面3c。 面对表面3b面对布线板的导电图案。 端子部分3a的外部区域设置有焊料厚度保证部分6，其中相对表面3b朝背表面3c凹陷。 焊料厚度确保部分6比对向表面3b的中心区域薄。 背面3c的中央区域是平坦的，没有凹陷。

公开(公告)号：EP3163602A3

公开(公告)日：2017-08-09

申请号：EP16002297.6

申请日：2010-01-20

申请人： Nichia Corporation

发明人： Kuramoto, Masafumi ,  Ogawa, Satoru ,  Niwa, Miki

IPC分类号： H01L21/58 ,  H01L21/60 ,  H01L33/40 ,  H01L33/48 ,  H01L33/62 ,  H01S5/022

CPC分类号： H01L33/44 ,  H01L23/08 ,  H01L23/293 ,  H01L23/49579 ,  H01L23/49582 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/83 ,  H01L33/62 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/2712 ,  H01L2224/2745 ,  H01L2224/275 ,  H01L2224/29023 ,  H01L2224/2908 ,  H01L2224/29083 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29187 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73265 ,  H01L2224/83048 ,  H01L2224/83055 ,  H01L2224/83075 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83207 ,  H01L2224/83439 ,  H01L2224/83487 ,  H01L2224/8383 ,  H01L2224/8384 ,  H01L2224/83894 ,  H01L2224/83895 ,  H01L2224/83896 ,  H01L2224/83907 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01063 ,  H01L2924/01064 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/0541 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/201 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/3025 ,  H01L2933/0066 ,  H01S5/0226 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/48 ,  H01L2224/05599

摘要： An object of the invention is to provide a method for producing a conductive member having low electrical resistance, and the conductive member is obtained using a low-cost stable conductive material composition that does not contain an adhesive. Disclosed is a method for producing a semiconductor device in which silver (520, 620, 720) formed by silver sputtering, silver vapour deposition or silver plating and provided on a surface of a base (500, 600, 700) and silver (140, 240, 340) formed by silver sputtering, silver vapour deposition or silver plating and provided on a surface of a semiconductor element (100, 200, 300) are bonded, the method comprising the steps of arranging the semiconductor element (100, 200, 300) on the base (500, 600, 700) such that said silver (140, 240, 340) provided on a surface of the semiconductor element (100, 200, 300) is in contact with said silver (520, 620, 720) provided on a surface of the base (500, 600, 700), temporarily bonding the semiconductor element (100, 200, 300) and the base (500, 600, 700) by applying a pressure or an ultrasonic vibration to the semiconductor element (100, 200, 300) or the base (500, 600, 700), and permanently bonding the semiconductor element (100, 200, 300) and the base (500, 600, 700) by applying heat having a temperature of 150 to 900°C to the semiconductor element (100, 200, 300) and the base (500, 600, 700) in air or in an oxygen environment. The step of temporarily bonding and the step of permanently bonding may be performed simultaneously. The semiconductor element (100, 200, 300) and the base (500, 600, 700) may be heated in advance at 150 to 900°C before the step of temporarily bonding. A pressure of 5 to 50 MPa may be applied before the step of temporarily bonding. The semiconductor element (100, 200, 300) may be a light emitting semiconductor element.

摘要翻译： 本发明的目的是提供一种制造具有低电阻的导电构件的方法，并且使用不含粘合剂的低成本稳定导电材料组合物获得导电构件。 本发明公开了一种用于制造半导体器件的方法，其中通过银溅射，银气相沉积或镀银形成并设置在基底（500,600,700）和银（140,160）的表面上的银（520,620,720） （100,200,300）的表面上通过银溅射，银气相沉积或镀银形成的半导体元件（100,200,300）的方法包括以下步骤：将半导体元件（100,200,300） ）设置在所述基座（500,600,700）上，使得设置在所述半导体元件（100,200,300）的表面上的所述银（140,240,340）与所述银（520,620,720）接触， 设置在所述基座（500,600,700）的表面上，通过对所述半导体元件（500,600,700）施加压力或超声波振动来暂时接合所述半导体元件（100,200,300）和所述基座（500,600,700） （100,200,300）或所述基座（500,600,700）之间，并且永久地将所述半导体元件（100,200,300）和所述半导体元件 通过在空气中或在氧气环境中向半导体元件（100,200,300）和基座（500,600,700）施加具有150至900℃的温度的热量，从而在基座（500,600,700）上形成基座（500,600,700）。 暂时键合的步骤和永久键合的步骤可以同时进行。 在临时键合步骤之前，半导体元件（100,200,300）和基座（500,600,700）可预先在150至900℃加热。 临时粘合步骤之前可施加5至50MPa的压力。 半导体元件（100,200,300）可以是发光半导体元件。

公开(公告)号：EP3151268A3

公开(公告)日：2017-08-09

申请号：EP16002295.0

申请日：2010-01-20

申请人： Nichia Corporation

发明人： Kuramoto, Masafumi ,  Ogawa, Satoru ,  Niwa, Miki

IPC分类号： H01L21/58 ,  H01L21/60 ,  H01L33/40 ,  H01L33/48 ,  H01L33/62 ,  H01S5/022

CPC分类号： H01L33/44 ,  H01L23/08 ,  H01L23/293 ,  H01L23/49579 ,  H01L23/49582 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/83 ,  H01L33/62 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/2712 ,  H01L2224/2745 ,  H01L2224/275 ,  H01L2224/29023 ,  H01L2224/2908 ,  H01L2224/29083 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29187 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73265 ,  H01L2224/83048 ,  H01L2224/83055 ,  H01L2224/83075 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83207 ,  H01L2224/83439 ,  H01L2224/83487 ,  H01L2224/8383 ,  H01L2224/8384 ,  H01L2224/83894 ,  H01L2224/83895 ,  H01L2224/83896 ,  H01L2224/83907 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01063 ,  H01L2924/01064 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/0541 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/201 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/3025 ,  H01L2933/0066 ,  H01S5/0226 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/48 ,  H01L2224/05599

摘要： An object of the invention is to provide a method for producing a conductive member having low electrical resistance, and the conductive member is obtained using a low-cost stable conductive material composition that does not contain an adhesive. Disclosed is a method for producing a semiconductor device in which silver or silver oxide (520, 620, 720) provided on a surface of a base (500, 600, 700) and silver oxide (140, 240, 340) provided on a surface of a semiconductor element (100, 200, 300) are bonded, the method including the steps of arranging a semiconductor element (100, 200, 300) on a base (500, 600, 700) such that silver oxide (140, 240, 340) provided on a surface of the semiconductor element (100, 200, 300) is in contact with silver or silver oxide (520, 620, 720) provided on a surface of the base (500, 600, 700), temporarily bonding the semiconductor element (100, 200, 300) and the base (500, 600, 700) by applying a pressure or an ultrasonic vibration to the semiconductor element (100, 200, 300) or the base (500, 600, 700), and permanently bonding the semiconductor element (100, 200, 300) and the base (500, 600, 700) by applying heat having a temperature of 150 to 900°C to the semiconductor element (100, 200, 300) and the base (500, 600, 700). The step of temporarily bonding and the step of permanently bonding may be performed simultaneously. The step of permanently bonding may be performed in air or in an oxygen environment, or in a nitrogen environment. The semiconductor element (100, 200, 300) and the base (500, 600, 700) may be heated in advance at 150 to 900°C before the step of temporarily bonding. A pressure of 5 to 50 MPa may be applied before the step of temporarily bonding. The semiconductor element (100, 200, 300) may be a light emitting semiconductor element.

摘要翻译： 本发明的目的是提供一种制造具有低电阻的导电构件的方法，并且使用不含粘合剂的低成本稳定导电材料组合物获得导电构件。 公开了一种用于制造半导体器件的方法，其中在基体（500,600,700）的表面上提供的银或氧化银（520,620,720）和在表面上提供的氧化银（140,240,340） 的半导体元件（100,200,300）接合，所述方法包括以下步骤：在基座（500,600,700）上布置半导体元件（100,200,300），使得氧化银（140,240,340） 设置在半导体元件（100,200,300）的表面上的银或氧化银（520,620,720）与设置在基部（500,600,700）的表面上的银或氧化银（520,620,720）接触， 通过对所述半导体元件（100,200,300）或所述基座（500,600,700）施加压力或超声波振动来对所述半导体元件（100,200,300）和所述基座（500,600,700）进行加热，以及 通过向半导体元件（100,200,300）施加温度为150至900℃的热量来永久地结合半导体元件（100,200,300）和基座（500,600,700） 和底座（500,600,700）。 暂时键合的步骤和永久键合的步骤可以同时进行。 永久结合的步骤可以在空气中或氧气环境中或在氮气环境中进行。 在临时键合步骤之前，半导体元件（100,200,300）和基座（500,600,700）可预先在150至900℃加热。 临时粘合步骤之前可施加5至50MPa的压力。 半导体元件（100,200,300）可以是发光半导体元件。

公开(公告)号：EP3163601A2

公开(公告)日：2017-05-03

申请号：EP16002296

申请日：2010-01-20

申请人： NICHIA CORP

发明人： KURAMOTO MASAFUMI ,  OGAWA SATORU ,  NIWA MIKI

IPC分类号： H01L21/58 ,  H01L21/60 ,  H01L33/40 ,  H01L33/48 ,  H01L33/62 ,  H01S5/022

CPC分类号： H01L33/44 ,  H01L23/08 ,  H01L23/293 ,  H01L23/49579 ,  H01L23/49582 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/83 ,  H01L33/62 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/2712 ,  H01L2224/2745 ,  H01L2224/275 ,  H01L2224/29023 ,  H01L2224/2908 ,  H01L2224/29083 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29187 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73265 ,  H01L2224/83048 ,  H01L2224/83055 ,  H01L2224/83075 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83207 ,  H01L2224/83439 ,  H01L2224/83487 ,  H01L2224/8383 ,  H01L2224/8384 ,  H01L2224/83894 ,  H01L2224/83895 ,  H01L2224/83896 ,  H01L2224/83907 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01063 ,  H01L2924/01064 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/0541 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/201 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/3025 ,  H01L2933/0066 ,  H01S5/0226 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/48 ,  H01L2224/05599

摘要： An object of the invention is to provide a method for producing a conductive member having low electrical resistance, and the conductive member is obtained using a low-cost stable conductive material composition that does not contain an adhesive. Disclosed is a method for producing a semiconductor device in which silver oxide (520, 620, 720) provided on a surface of a base (500, 600, 700) and silver or silver oxide (140, 240, 340) provided on a surface of a semiconductor element (100, 200, 300) are bonded, the method including the steps of arranging a semiconductor element (100, 200, 300) on a base (500, 600, 700) such that silver or silver oxide (140, 240, 340) provided on a surface of the semiconductor element (100, 200, 300) is in contact with silver oxide (520, 620, 720) provided on a surface of the base (500, 600, 700), temporarily bonding the semiconductor element (100, 200, 300) and the base (500, 600, 700) by applying a pressure or an ultrasonic vibration to the semiconductor element (100, 200, 300) or the base (500, 600, 700), and permanently bonding the semiconductor element (100, 200, 300) and the base (500, 600, 700) by applying heat having a temperature of 150 to 900°C to the semiconductor element (100, 200, 300) and the base (500, 600, 700). The step of temporarily bonding and the step of permanently bonding may be performed simultaneously. The step of permanently bonding may be performed in air or in an oxygen environment, or in a nitrogen environment. The semiconductor element (100, 200, 300) and the base (500, 600, 700) may be heated in advance at 150 to 900°C before the step of temporarily bonding. A pressure of 5 to 50 MPa may be applied in the step of temporarily bonding. The semiconductor element (100, 200, 300) may be a light emitting semiconductor element.

摘要翻译： 本发明的一个目的是提供一种用于生产具有低电阻的导电性构件的方法，所述导电构件是用一种低成本的稳定的导电材料组合物并不含有获得，在粘接剂。 是（340 140，240）的表面上设置用于在其中氧化银（520，620，720）的半导体器件提供了一种基站（500，600，700），并且银或氧化银的表面上的方法公开 的半导体元件（100，200，300）键合的，该方法包括在基体上布置的半导体元件（100，200，300）的步骤（500，600，700）检测没有银或氧化银（140， 设置在半导体元件（100，200,300）的表面上的240，340）与设置在基座（500，600，700的表面上的氧化银（520，620，720）接触），暂时接合 半导体元件（100，200，300）和基部（500，600，700）通过施加到所述半导体元件（100，200，300）或所述基部（500，600,700）的压力或超声波振动，和 半导体元件（100，200，300）和基部（500，600，700）通过施加具有150至900℃的温度下对半导体元件的热永久地结合（100，200，300） 和所述基部（500，600，700）。 的暂时接合步骤和永久地结合的步骤可以同时进行。 永久接合的步骤可以在空气中或在氧气中进行，以环境，或在氮气环境中。 半导体元件（100，200，300）和基部（500，600，700）可以预先在150的临时粘结步骤之前被加热到900℃。 5至50MPa的压力可以以临时粘结的步骤中施加。 半导体元件（100，200，300）可以是半导体发光元件。