公开(公告)号：EP2234129A2

公开(公告)日：2010-09-29

申请号：EP10169160.8

申请日：2006-11-17

申请人： Hitachi Ltd.

发明人： Azuma, Katsunori ,  Inaba, Masamitsu ,  Mori, Mutsuhiro ,  Nakajima, Kenichiro

IPC分类号： H01G4/38

CPC分类号： H01G4/38 ,  B60K1/02 ,  B60K6/28 ,  B60K6/48 ,  B60L3/003 ,  B60L11/005 ,  B60L11/123 ,  B60L11/14 ,  B60L15/007 ,  B60L2200/26 ,  B60L2240/525 ,  B60L2270/145 ,  B60W10/06 ,  B60W10/08 ,  B60W20/00 ,  H01G2/04 ,  H01G4/228 ,  H01G9/008 ,  H01G9/08 ,  H01G9/14 ,  H01G9/26 ,  H01L2224/48091 ,  H01L2224/49111 ,  H01L2924/00011 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M7/003 ,  Y02T10/6217 ,  Y02T10/6221 ,  Y02T10/6286 ,  Y02T10/645 ,  Y02T10/7022 ,  Y02T10/7077 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01033

摘要： The present invention relates to a capacitor module (CM) in which the structure of a connecting portion (3b, 4b) is highly resistant against vibration and has a low inductance. The capacitor module (CM) includes a plurality of capacitors (CDS) and a laminate (8, 9, 10) made up of a first wide conductor (8) and a second wide conductor (9) joined in a layered form with an insulation sheet (10) interposed between the first and second wide conductors (8, 9). The laminate (8, 9, 10) comprises a first flat portion including the plurality of capacitors (CDS) which are supported thereon and electrically connected thereto, a second flat portion continuously extending from the first flat portion while being bent, and connecting portions (3b, 4b) formed at ends of the first flat portion and the second flat portion and electrically connected to the exterior.

摘要翻译： 本发明涉及一种电容器模块（CM），其中连接部分（3b，4b）的结构具有高抗振动性和低电感性。 电容器模块（CM）包括多个电容器（CDS）和由第一宽导体（8）和第二宽导体（9）组成的叠层体（8,9,10），所述第一宽导体（8）和第二宽导体（9） 介于第一和第二宽导体（8,9）之间的片（10）。 层叠体（8,9,10）包括：第一平坦部，包括被支撑在其上并与其电连接的多个电容器（CDS）;第二平坦部分，在弯曲的同时从第一平坦部连续延伸;以及连接部 3b，4b）形成在第一平坦部分和第二平坦部分的端部处并且电连接到外部。

公开(公告)号：EP2568787B1

公开(公告)日：2016-10-12

申请号：EP12178021.7

申请日：2006-08-17

申请人： Hitachi, Ltd.

发明人： Morita, Toshiaki ,  Azuma, Katsunori ,  Hozoji, Hiroshi ,  Suzuki, Kazuhiro ,  Satoh, Toshiya ,  Otsuka, Osamu

IPC分类号： H05K7/14 ,  H01L25/07

CPC分类号： H05K7/1432 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/40091 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/45124 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2224/48 ,  H01L2924/00 ,  H01L2224/37099

公开(公告)号：EP2590309B1

公开(公告)日：2014-06-18

申请号：EP12190662.2

申请日：2012-10-30

申请人： Hitachi, Ltd.

发明人： Horiuchi, Keisuke ,  Nishihara, Atsuo ,  Mori, Mutsuhiro ,  Nemoto, Yasuhiro ,  Azuma, Katsunori

IPC分类号： H02M7/00

CPC分类号： H02M7/003 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/4809 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

摘要： An object of the present invention is to mount, for example, 12 arms compactly on a single semiconductor power module, to dispose DC terminals and AC terminals on an edge of the module and to keep inductance of a power circuit at a low level. According to the invention, two sets of upper arms (100,104 and 102,106) are disposed on the upper right and left sides of an insulated substrate 108, two sets of lower arms (101,105 and 103,107) are disposed on the lower right and left sides of the insulated substrate, the two sets of upper arms are mounted on a first wiring pattern C01 as wiring patterns on the insulated substrate, the two sets of lower arms are mounted respectively on second and third wiring patterns CO2 and CO2 disposed under the first wiring pattern, the first wiring pattern C01 is extended between the second and third wiring patterns, wiring from a positive terminal T01 is connected to the extended end portion, and three insulated substrates 108 are mounted in parallel to constitute a 12-in-1 module.

公开(公告)号：EP2372763A2

公开(公告)日：2011-10-05

申请号：EP11160367.6

申请日：2011-03-30

申请人： Hitachi Ltd.

发明人： Azuma, Katsunori

IPC分类号： H01L25/07 ,  H01L23/31 ,  H01L23/367 ,  H01L23/495

CPC分类号： H01L24/73 ,  H01L23/051 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/473 ,  H01L23/49524 ,  H01L23/49551 ,  H01L24/31 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L25/115 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48724 ,  H01L2224/73265 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/83801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012

摘要： In a power semiconductor module, a semiconductor device (40) including electrode surfaces for connection on its front side and back side is connected on its back side to a first extraction electrode (60) through soldering (20); a metal surface of one side of a laminated conductor (30) having a laminated structure in which at least two types of metals (32,33) are laminated is directly, intermetallically connected to the front side of the semiconductor device; a second extraction electrode (10) is connected to a metal surface of another side of the laminated conductor through soldering (21); and the laminated conductor (30) includes a plurality of arch-like protrusions (35) and a straight section (36) connecting the arch-like protrusions, the straight section (36) is connected with the front side of the semiconductor device (40), and the protrusions (35) are connected with the second extraction electrode (10).

摘要翻译： 在功率半导体模块中，包括用于在其前侧和后侧连接的电极表面的半导体器件（40）在其背面通过焊接（20）连接到第一引出电极（60）。 具有叠层结构的层压导体（30）的一侧的金属表面，其中至少两种类型的金属（32,33）被层压在一起，与半导体器件的正面直接金属间连接; 第二提取电极（10）通过焊接（21）连接到层压导体的另一侧的金属表面; 并且所述层叠导体（30）包括多个拱形突起（35）和连接所述拱形突起部的直线部（36），所述直线部（36）与所述半导体装置（40）的前侧连接 ），并且突起（35）与第二引出电极（10）连接。

公开(公告)号：EP2234129B1

公开(公告)日：2017-01-11

申请号：EP10169160.8

申请日：2006-11-17

申请人： Hitachi, Ltd.

发明人： Azuma, Katsunori ,  Inaba, Masamitsu ,  Mori, Mutsuhiro ,  Nakajima, Kenichiro

IPC分类号： H01G9/08 ,  H01G4/38 ,  H02M7/00 ,  H01G4/228 ,  H01G9/008 ,  H01G9/26 ,  B60W20/00 ,  B60W10/06 ,  B60W10/08 ,  H01G9/14 ,  H01G2/04

CPC分类号： H01G4/38 ,  B60K1/02 ,  B60K6/28 ,  B60K6/48 ,  B60L3/003 ,  B60L11/005 ,  B60L11/123 ,  B60L11/14 ,  B60L15/007 ,  B60L2200/26 ,  B60L2240/525 ,  B60L2270/145 ,  B60W10/06 ,  B60W10/08 ,  B60W20/00 ,  H01G2/04 ,  H01G4/228 ,  H01G9/008 ,  H01G9/08 ,  H01G9/14 ,  H01G9/26 ,  H01L2224/48091 ,  H01L2224/49111 ,  H01L2924/00011 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M7/003 ,  Y02T10/6217 ,  Y02T10/6221 ,  Y02T10/6286 ,  Y02T10/645 ,  Y02T10/7022 ,  Y02T10/7077 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01033

摘要： The present invention relates to a capacitor module (CM) in which the structure of a connecting portion (3b, 4b) is highly resistant against vibration and has a low inductance. The capacitor module (CM) includes a plurality of capacitors (CDS) and a laminate (8, 9, 10) made up of a first wide conductor (8) and a second wide conductor (9) joined in a layered form with an insulation sheet (10) interposed between the first and second wide conductors (8, 9). The laminate (8, 9, 10) comprises a first flat portion including the plurality of capacitors (CDS) which are supported thereon and electrically connected thereto, a second flat portion continuously extending from the first flat portion while being bent, and connecting portions (3b, 4b) formed at ends of the first flat portion and the second flat portion and electrically connected to the exterior.

公开(公告)号：EP2590309A1

公开(公告)日：2013-05-08

申请号：EP12190662.2

申请日：2012-10-30

申请人： Hitachi Ltd.

发明人： Horiuchi, Keisuke ,  Nishihara, Atsuo ,  Mori, Mutsuhiro ,  Nemoto, Yasuhiro ,  Azuma, Katsunori

IPC分类号： H02M7/00

CPC分类号： H02M7/003 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/4809 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

摘要： An object of the present invention is to mount, for example, 12 arms compactly on a single semiconductor power module, to dispose DC terminals and AC terminals on an edge of the module and to keep inductance of a power circuit at a low level. According to the invention, two sets of upper arms (100,104 and 102,106) are disposed on the upper right and left sides of an insulated substrate 108, two sets of lower arms (101,105 and 103,107) are disposed on the lower right and left sides of the insulated substrate, the two sets of upper arms are mounted on a first wiring pattern C01 as wiring patterns on the insulated substrate, the two sets of lower arms are mounted respectively on second and third wiring patterns CO2 and CO2 disposed under the first wiring pattern, the first wiring pattern C01 is extended between the second and third wiring patterns, wiring from a positive terminal T01 is connected to the extended end portion, and three insulated substrates 108 are mounted in parallel to constitute a 12-in-1 module.

摘要翻译： 本发明的目的是例如将12个臂紧凑地安装在单个半导体功率模块上，以将DC端子和AC端子布置在模块的边缘上并且将电源电路的电感保持在低水平。 根据本发明，两组上臂（100,104和102,106）设置在绝缘基板108的右上和左侧，两组下臂（101,105和103,107）设置在绝缘基板108的右下侧和左下侧 绝缘基板，两组上臂安装在第一布线图案C01上作为绝缘基板上的布线图案，两组下臂分别安装在布置在第一布线图案下方的第二和第三布线图案CO 2和CO 2上 ，第一布线图案C01在第二布线图案和第三布线图案之间延伸，来自正端子T01的布线连接到延伸端部，并且三个绝缘基板108平行安装以构成12合1模块。

公开(公告)号：EP2568787A1

公开(公告)日：2013-03-13

申请号：EP12178021.7

申请日：2006-08-17

申请人： Hitachi Ltd.

发明人： Morita, Toshiaki ,  Azuma, Katsunori ,  Hozoji, Hiroshi ,  Suzuki, Kazuhiro ,  Satoh, Toshiya ,  Otsuka, Osamu

IPC分类号： H05K7/14 ,  H01L25/07

CPC分类号： H05K7/1432 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/40091 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/45124 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2224/48 ,  H01L2924/00 ,  H01L2224/37099

摘要： The power conversion apparatus 30 uses the semiconductor device 29. Said semiconductor device 29 includes a first group of power semiconductor elements 1a, 1b at least one of which is electrically connected between a first potential 5a and a third potential 6a, a second group of power semiconductor elements 2a-2d at least one of which is electrically connected between a second potential 7a and the third potential 6a, and a third group of power semiconductor elements lc, ld at least one of which is electrically connected between the first potential 5a and the third potential 6a. The second group 2a-2d is disposed between the first group 1a, 1b and third group 1c, 1d.
Thereby, a low-loss semiconductor device 29 having both inductance reducibility and heat generation balancing capability and an electric power conversion apparatus 30 using the same are provided.

摘要翻译： 电力转换装置30使用半导体器件29.所述半导体器件29包括第一组功率半导体元件1a，1b，其中至少一个电连接在第一电位5a和第三电位6a之间，第二组功率 半导体元件2a-2d，其至少一个电连接在第二电位7a和第三电位6a之间，第三组功率半导体元件1c，1d，其中至少一个电连接在第一电位5a和 第三潜力6a。 第二组2a-2d设置在第一组1a，1b和第三组1c，1d之间。 因此，提供具有电感还原性和发热平衡能力的低损耗半导体器件29和使用其的电力转换装置30。

公开(公告)号：EP1881590B1

公开(公告)日：2016-08-17

申请号：EP07014404.3

申请日：2007-07-23

申请人： Hitachi, Ltd.

发明人： Azuma, Katsunori ,  Mori, Mutsuhiro ,  Nakatsu, Kinya

IPC分类号： H02M7/00 ,  B60L3/12 ,  B60L11/00 ,  H05K7/20

CPC分类号： H02M7/003 ,  B60L3/003 ,  B60L3/12 ,  B60L11/123 ,  B60L11/14 ,  B60L11/18 ,  B60L15/007 ,  B60L2210/40 ,  B60L2240/525 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K7/20927 ,  Y02T10/6217 ,  Y02T10/645 ,  Y02T10/7005 ,  Y02T10/7022 ,  Y02T10/7077 ,  Y02T10/7241 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A highly reliable electric power converter (200) with reduced parasitic inductance including a capacitor module (300) having a DC terminal, an inverter converting a direct current into an alternating current, and heat release fins (506,507) cooling the inverter (200). The inverter (200) has a power module (500) including a plurality of power semiconductor elements, a metallic base (944), a dielectric substrate (956) provided on one face of the metallic base, a power semiconductor element fixed to the dielectric substrate (956), and a DC terminal; the metallic base has heat release fins (506,507) on the other face; the DC terminals are each formed by stacking flat plate conductors via an insulator; the two positive and negative DC terminals have respective front ends bent in opposite directions; a plane including the bent sections is used for connecting the power module (500) and the capacitor module (300); and the insulators overlap each other at the connection surface.

公开(公告)号：EP2372763A3

公开(公告)日：2016-07-27

申请号：EP11160367.6

申请日：2011-03-30

申请人： Hitachi, Ltd.

发明人： Azuma, Katsunori

IPC分类号： H01L25/07 ,  H01L23/31 ,  H01L23/367 ,  H01L23/495 ,  H01L23/051 ,  H01L23/433 ,  H01L23/00 ,  H01L25/11 ,  H01L23/473

CPC分类号： H01L24/73 ,  H01L23/051 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/473 ,  H01L23/49524 ,  H01L23/49551 ,  H01L24/31 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L25/115 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48724 ,  H01L2224/73265 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/83801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012

摘要： In a power semiconductor module, a semiconductor device (40) including electrode surfaces for connection on its front side and back side is connected on its back side to a first extraction electrode (60) through soldering (20); a metal surface of one side of a laminated conductor (30) having a laminated structure in which at least two types of metals (32,33) are laminated is directly, intermetallically connected to the front side of the semiconductor device; a second extraction electrode (10) is connected to a metal surface of another side of the laminated conductor through soldering (21); and the laminated conductor (30) includes a plurality of arch-like protrusions (35) and a straight section (36) connecting the arch-like protrusions, the straight section (36) is connected with the front side of the semiconductor device (40), and the protrusions (35) are connected with the second extraction electrode (10).

摘要翻译： 在功率半导体模块中，包括在其正面和背面上用于连接的电极表面的半导体器件（40）的背面通过焊接（20）连接到第一引出电极（60）; 具有其中层叠至少两种金属（32,33）的层压结构的层压导体（30）的一侧的金属表面直接金属连接到半导体器件的前侧; 通过焊接（21）将第二引出电极（10）连接到层压导体的另一侧的金属表面; （30）包括多个拱形突起（35）和连接拱形突起的直线部分（36），直线部分（36）与半导体器件（40）的正面 ），并且突起（35）与第二引出电极（10）连接。

公开(公告)号：EP2541596A1

公开(公告)日：2013-01-02

申请号：EP12173902.3

申请日：2012-06-27

申请人： Hitachi Ltd.

发明人： Azuma, Katsunori ,  Yasuda, Kentaro ,  Fujita, Takahiro ,  Saito, Katsuaki ,  Koike, Yoshihiko ,  Hiyoshi, Michiaki

IPC分类号： H01L25/07

摘要： The respective main electrodes (52, 52') of the semiconductor switching elements (50, 50') such as IGBTs, which are respectively mounted on the plurality of insulating boards (20, 20'), are electrically connected to each other via the conductor member (45). This configuration makes it possible to suppress the occurrence of the resonant voltage due to the junction capacity and the parasitic inductance of each semiconductor switching element (50, 50').

摘要翻译： 分别安装在多个绝缘板（20,20'）上的诸如IGBT的半导体开关元件（50,50'）的各个主电极（52,52'）经由 导体构件（45）。 这种结构使得可以抑制由于每个半导体开关元件（50,50'）的结电容和寄生电感引起的谐振电压的发生。