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    Method for producing a group III nitride compound semiconductor substrate
    3.
    发明公开
    Method for producing a group III nitride compound semiconductor substrate 有权
    格雷普三世 - 西伯利亚革命

    公开(公告)号：EP1045431A1

    公开(公告)日：2000-10-18

    申请号：EP00107908.6

    申请日：2000-04-13

    申请人： Matsushita Electronics Corporation

    发明人： Yuri, Masaaki ,  Imafuji, Osamu ,  Nakamura, Shinji ,  Ishida, Masahiro ,  Orita, Kenji

    IPC分类号： H01L21/20 ,  H01L33/00 ,  H01L31/18

    CPC分类号： H01L33/0075 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/02661 ,  H01L21/02664 ,  H01L31/184 ,  H01L31/1852 ,  Y02E10/544 ,  Y02P70/521

    摘要： The present invention provides a method for producing a group III nitride compound semiconductor substrate including: (a) forming a first semiconductor film over a substrate, the first semiconductor film made of a first group III nitride compound semiconductor and provided with a step; (b) forming a second semiconductor film made of a second group III nitride compound semiconductor having a different thermal expansion coefficient from that of the first group III nitride compound semiconductor on the first semiconductor film; and (c) cooling the substrate and separating the second semiconductor film from the first semiconductor film. Thus, a large-area group III nitride compound semiconductor substrate can be produced in high yields and with high reproducibility.

    摘要翻译： 本发明提供一种III族氮化物化合物半导体衬底的制造方法，包括：（a）在衬底上形成第一半导体膜，所述第一半导体膜由第一III族氮化物化合物半导体制成，并具有步骤; （b）形成由第一半导体膜上的第一III族氮化物半导体的热膨胀系数不同的第二III族氮化物化合物半导体制成的第二半导体膜; 和（c）冷却基板并将第二半导体膜与第一半导体膜分离。 因此，可以以高产率和高重现性制造大面积III族氮化物化合物半导体衬底。

    Semiconductor device and method for fabricating the same
    5.
    发明公开
    Semiconductor device and method for fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：EP0997996A3

    公开(公告)日：2000-11-08

    申请号：EP99120838.0

    申请日：1999-10-25

    申请人： Matsushita Electronics Corporation

    发明人： Nakamura, Shinji ,  Yuri, Masaaki ,  Orita, Kenji

    IPC分类号： H01S5/323 ,  H01L33/00

    CPC分类号： H01L33/32 ,  H01L33/007 ,  H01S5/32341

    摘要： A semiconductor device includes a substrate, a multi-layer structure provided on the substrate, a first-conductive-type etch stop layer of a III nitride provided on the multi-layer structure, and a second-conductive-type first semiconductor layer of a III nitride provided on the etch stop layer. A molar fraction of Al is lower in a composition of the III nitride included in the first semiconductor layer than in a composition of the III nitride included in the etch stop layer.

    摘要翻译： 一种半导体器件，包括衬底，设置在衬底上的多层结构，设置在多层结构上的III族氮化物的第一导电型蚀刻停止层以及设置在衬底上的第二导电型第一半导体层 III族氮化物提供在蚀刻停止层上。 包含在第一半导体层中的III族氮化物的组成中的Al的摩尔分数低于包含在蚀刻停止层中的III族氮化物的组成中的Al的摩尔分数。

    Semiconductor device and method of fabricating the same
    6.
    发明公开
    Semiconductor device and method of fabricating the same 审中-公开
    半导体器件及其制造方法

    公开(公告)号：EP1032099A2

    公开(公告)日：2000-08-30

    申请号：EP00103996.5

    申请日：2000-02-25

    申请人： Matsushita Electronics Corporation

    发明人： Ishida, Masahiro ,  Yuri, Masaaki ,  Imafuji, Osamu ,  Nakamura, Shinji ,  Orita, Kenji

    IPC分类号： H01S5/323 ,  H01L33/00

    CPC分类号： H01L33/007 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L33/0079 ,  H01S5/32341

    摘要： A semiconductor device comprises a substrate having a first thermal expansion coefficient T1, a strain reducing layer formed on the substrate and having a second thermal expansion coefficient T2, and a semiconductor layer formed on the strain reducing layer, having a third thermal expansion coefficient T3, and made of a nitride compound represented by Al y Ga 1-y-z In z N (0 ≦ y ≦ 1, 0 ≦ z ≦ 1). The second thermal expansion coefficient T2 is lower than the first thermal expansion coefficient T1. The third thermal expansion coefficient T3 is lower than the first thermal expansion coefficient T1 and higher than the second thermal expansion coefficient T2.

    摘要翻译： 一种半导体器件包括：具有第一热膨胀系数T 1的衬底，形成在衬底上并具有第二热膨胀系数T 2的应变减小层以及形成在应变减小层上的具有第三热膨胀系数T 3的半导体层， 并且由由AlyGa1-y-zInzN（0≤y≤1,0≤z≤1）表示的氮化合物制成。 第二热膨胀系数T2低于第一热膨胀系数T1。 第三热膨胀系数T3低于第一热膨胀系数T1并高于第二热膨胀系数T2。